xref: /dragonfly/sys/dev/drm/radeon/radeon_gem.c (revision 4ad7b37a)
1 /*
2  * Copyright 2008 Advanced Micro Devices, Inc.
3  * Copyright 2008 Red Hat Inc.
4  * Copyright 2009 Jerome Glisse.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: Dave Airlie
25  *          Alex Deucher
26  *          Jerome Glisse
27  *
28  * $FreeBSD: head/sys/dev/drm2/radeon/radeon_gem.c 254885 2013-08-25 19:37:15Z dumbbell $
29  */
30 
31 #include <drm/drmP.h>
32 #include <drm/radeon_drm.h>
33 #include "radeon.h"
34 #include "radeon_gem.h"
35 
36 void radeon_gem_object_free(struct drm_gem_object *gobj)
37 {
38 	struct radeon_bo *robj = gem_to_radeon_bo(gobj);
39 
40 	if (robj) {
41 #ifdef DUMBBELL_WIP
42 		if (robj->gem_base.import_attach)
43 			drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
44 #endif /* DUMBBELL_WIP */
45 		radeon_bo_unref(&robj);
46 	}
47 }
48 
49 int radeon_gem_object_create(struct radeon_device *rdev, unsigned long size,
50 				int alignment, int initial_domain,
51 				u32 flags, bool kernel,
52 				struct drm_gem_object **obj)
53 {
54 	struct radeon_bo *robj;
55 	unsigned long max_size;
56 	int r;
57 
58 	*obj = NULL;
59 	/* At least align on page size */
60 	if (alignment < PAGE_SIZE) {
61 		alignment = PAGE_SIZE;
62 	}
63 
64 	/* Maximum bo size is the unpinned gtt size since we use the gtt to
65 	 * handle vram to system pool migrations.
66 	 */
67 	max_size = rdev->mc.gtt_size - rdev->gart_pin_size;
68 	if (size > max_size) {
69 		DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n",
70 			  size >> 20, max_size >> 20);
71 		return -ENOMEM;
72 	}
73 
74 retry:
75 	r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain,
76 			     flags, NULL, &robj);
77 	if (r) {
78 		if (r != -ERESTARTSYS) {
79 			if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
80 				initial_domain |= RADEON_GEM_DOMAIN_GTT;
81 				goto retry;
82 			}
83 			DRM_ERROR("Failed to allocate GEM object (%ld, %d, %u, %d)\n",
84 				  size, initial_domain, alignment, r);
85 		}
86 		return r;
87 	}
88 	*obj = &robj->gem_base;
89 	robj->pid = curproc ? curproc->p_pid : 0;
90 
91 	mutex_lock(&rdev->gem.mutex);
92 	list_add_tail(&robj->list, &rdev->gem.objects);
93 	mutex_unlock(&rdev->gem.mutex);
94 
95 	return 0;
96 }
97 
98 static int radeon_gem_set_domain(struct drm_gem_object *gobj,
99 			  uint32_t rdomain, uint32_t wdomain)
100 {
101 	struct radeon_bo *robj;
102 	uint32_t domain;
103 	long r;
104 
105 	/* FIXME: reeimplement */
106 	robj = gem_to_radeon_bo(gobj);
107 	/* work out where to validate the buffer to */
108 	domain = wdomain;
109 	if (!domain) {
110 		domain = rdomain;
111 	}
112 	if (!domain) {
113 		/* Do nothings */
114 		printk(KERN_WARNING "Set domain without domain !\n");
115 		return 0;
116 	}
117 	if (domain == RADEON_GEM_DOMAIN_CPU) {
118 		/* Asking for cpu access wait for object idle */
119 		r = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
120 		if (!r)
121 			r = -EBUSY;
122 
123 		if (r < 0 && r != -EINTR) {
124 			printk(KERN_ERR "Failed to wait for object: %li\n", r);
125 			return r;
126 		}
127 	}
128 	return 0;
129 }
130 
131 int radeon_gem_init(struct radeon_device *rdev)
132 {
133 	INIT_LIST_HEAD(&rdev->gem.objects);
134 	return 0;
135 }
136 
137 void radeon_gem_fini(struct radeon_device *rdev)
138 {
139 	radeon_bo_force_delete(rdev);
140 }
141 
142 /*
143  * Call from drm_gem_handle_create which appear in both new and open ioctl
144  * case.
145  */
146 int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
147 {
148 	struct radeon_bo *rbo = gem_to_radeon_bo(obj);
149 	struct radeon_device *rdev = rbo->rdev;
150 	struct radeon_fpriv *fpriv = file_priv->driver_priv;
151 	struct radeon_vm *vm = &fpriv->vm;
152 	struct radeon_bo_va *bo_va;
153 	int r;
154 
155 	if (rdev->family < CHIP_CAYMAN) {
156 		return 0;
157 	}
158 
159 	r = radeon_bo_reserve(rbo, false);
160 	if (r) {
161 		return r;
162 	}
163 
164 	bo_va = radeon_vm_bo_find(vm, rbo);
165 	if (!bo_va) {
166 		bo_va = radeon_vm_bo_add(rdev, vm, rbo);
167 	} else {
168 		++bo_va->ref_count;
169 	}
170 	radeon_bo_unreserve(rbo);
171 
172 	return 0;
173 }
174 
175 void radeon_gem_object_close(struct drm_gem_object *obj,
176 			     struct drm_file *file_priv)
177 {
178 	struct radeon_bo *rbo = gem_to_radeon_bo(obj);
179 	struct radeon_device *rdev = rbo->rdev;
180 	struct radeon_fpriv *fpriv = file_priv->driver_priv;
181 	struct radeon_vm *vm = &fpriv->vm;
182 	struct radeon_bo_va *bo_va;
183 	int r;
184 
185 	if (rdev->family < CHIP_CAYMAN) {
186 		return;
187 	}
188 
189 	r = radeon_bo_reserve(rbo, true);
190 	if (r) {
191 		dev_err(rdev->dev, "leaking bo va because "
192 			"we fail to reserve bo (%d)\n", r);
193 		return;
194 	}
195 	bo_va = radeon_vm_bo_find(vm, rbo);
196 	if (bo_va) {
197 		if (--bo_va->ref_count == 0) {
198 			radeon_vm_bo_rmv(rdev, bo_va);
199 		}
200 	}
201 	radeon_bo_unreserve(rbo);
202 }
203 
204 static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
205 {
206 	if (r == -EDEADLK) {
207 		r = radeon_gpu_reset(rdev);
208 		if (!r)
209 			r = -EAGAIN;
210 	}
211 	return r;
212 }
213 
214 /*
215  * GEM ioctls.
216  */
217 int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
218 			  struct drm_file *filp)
219 {
220 	struct radeon_device *rdev = dev->dev_private;
221 	struct drm_radeon_gem_info *args = data;
222 	struct ttm_mem_type_manager *man;
223 
224 	man = &rdev->mman.bdev.man[TTM_PL_VRAM];
225 
226 	args->vram_size = rdev->mc.real_vram_size;
227 	args->vram_visible = (u64)man->size << PAGE_SHIFT;
228 	args->vram_visible -= rdev->vram_pin_size;
229 	args->gart_size = rdev->mc.gtt_size;
230 	args->gart_size -= rdev->gart_pin_size;
231 
232 	return 0;
233 }
234 
235 int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
236 			   struct drm_file *filp)
237 {
238 	/* TODO: implement */
239 	DRM_ERROR("unimplemented %s\n", __func__);
240 	return -ENOSYS;
241 }
242 
243 int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
244 			    struct drm_file *filp)
245 {
246 	/* TODO: implement */
247 	DRM_ERROR("unimplemented %s\n", __func__);
248 	return -ENOSYS;
249 }
250 
251 int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
252 			    struct drm_file *filp)
253 {
254 	struct radeon_device *rdev = dev->dev_private;
255 	struct drm_radeon_gem_create *args = data;
256 	struct drm_gem_object *gobj;
257 	uint32_t handle;
258 	int r;
259 
260 	lockmgr(&rdev->exclusive_lock, LK_SHARED);
261 	/* create a gem object to contain this object in */
262 	args->size = roundup(args->size, PAGE_SIZE);
263 	r = radeon_gem_object_create(rdev, args->size, args->alignment,
264 				     args->initial_domain, args->flags,
265 				     false, &gobj);
266 	if (r) {
267 		if (r == -ERESTARTSYS)
268 			r = -EINTR;
269 		lockmgr(&rdev->exclusive_lock, LK_RELEASE);
270 		r = radeon_gem_handle_lockup(rdev, r);
271 		return r;
272 	}
273 	handle = 0;
274 	r = drm_gem_handle_create(filp, gobj, &handle);
275 	/* drop reference from allocate - handle holds it now */
276 	drm_gem_object_unreference_unlocked(gobj);
277 	if (r) {
278 		lockmgr(&rdev->exclusive_lock, LK_RELEASE);
279 		r = radeon_gem_handle_lockup(rdev, r);
280 		return r;
281 	}
282 	args->handle = handle;
283 	lockmgr(&rdev->exclusive_lock, LK_RELEASE);
284 	return 0;
285 }
286 
287 #if 0
288 int radeon_gem_userptr_ioctl(struct drm_device *dev, void *data,
289 			     struct drm_file *filp)
290 {
291 	struct radeon_device *rdev = dev->dev_private;
292 	struct drm_radeon_gem_userptr *args = data;
293 	struct drm_gem_object *gobj;
294 	struct radeon_bo *bo;
295 	uint32_t handle;
296 	int r;
297 
298 	if (offset_in_page(args->addr | args->size))
299 		return -EINVAL;
300 
301 	/* reject unknown flag values */
302 	if (args->flags & ~(RADEON_GEM_USERPTR_READONLY |
303 	    RADEON_GEM_USERPTR_ANONONLY | RADEON_GEM_USERPTR_VALIDATE |
304 	    RADEON_GEM_USERPTR_REGISTER))
305 		return -EINVAL;
306 
307 	if (args->flags & RADEON_GEM_USERPTR_READONLY) {
308 		/* readonly pages not tested on older hardware */
309 		if (rdev->family < CHIP_R600)
310 			return -EINVAL;
311 
312 	} else if (!(args->flags & RADEON_GEM_USERPTR_ANONONLY) ||
313 		   !(args->flags & RADEON_GEM_USERPTR_REGISTER)) {
314 
315 		/* if we want to write to it we must require anonymous
316 		   memory and install a MMU notifier */
317 		return -EACCES;
318 	}
319 
320 	down_read(&rdev->exclusive_lock);
321 
322 	/* create a gem object to contain this object in */
323 	r = radeon_gem_object_create(rdev, args->size, 0,
324 				     RADEON_GEM_DOMAIN_CPU, 0,
325 				     false, &gobj);
326 	if (r)
327 		goto handle_lockup;
328 
329 	bo = gem_to_radeon_bo(gobj);
330 	r = radeon_ttm_tt_set_userptr(bo->tbo.ttm, args->addr, args->flags);
331 	if (r)
332 		goto release_object;
333 
334 	if (args->flags & RADEON_GEM_USERPTR_REGISTER) {
335 		r = radeon_mn_register(bo, args->addr);
336 		if (r)
337 			goto release_object;
338 	}
339 
340 	if (args->flags & RADEON_GEM_USERPTR_VALIDATE) {
341 		down_read(&current->mm->mmap_sem);
342 		r = radeon_bo_reserve(bo, true);
343 		if (r) {
344 			up_read(&current->mm->mmap_sem);
345 			goto release_object;
346 		}
347 
348 		radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_GTT);
349 		r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
350 		radeon_bo_unreserve(bo);
351 		up_read(&current->mm->mmap_sem);
352 		if (r)
353 			goto release_object;
354 	}
355 
356 	r = drm_gem_handle_create(filp, gobj, &handle);
357 	/* drop reference from allocate - handle holds it now */
358 	drm_gem_object_unreference_unlocked(gobj);
359 	if (r)
360 		goto handle_lockup;
361 
362 	args->handle = handle;
363 	up_read(&rdev->exclusive_lock);
364 	return 0;
365 
366 release_object:
367 	drm_gem_object_unreference_unlocked(gobj);
368 
369 handle_lockup:
370 	up_read(&rdev->exclusive_lock);
371 	r = radeon_gem_handle_lockup(rdev, r);
372 
373 	return r;
374 }
375 #endif
376 
377 int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
378 				struct drm_file *filp)
379 {
380 	/* transition the BO to a domain -
381 	 * just validate the BO into a certain domain */
382 	struct radeon_device *rdev = dev->dev_private;
383 	struct drm_radeon_gem_set_domain *args = data;
384 	struct drm_gem_object *gobj;
385 	struct radeon_bo *robj;
386 	int r;
387 
388 	/* for now if someone requests domain CPU -
389 	 * just make sure the buffer is finished with */
390 	lockmgr(&rdev->exclusive_lock, LK_SHARED);
391 
392 	/* just do a BO wait for now */
393 	gobj = drm_gem_object_lookup(filp, args->handle);
394 	if (gobj == NULL) {
395 		lockmgr(&rdev->exclusive_lock, LK_RELEASE);
396 		return -ENOENT;
397 	}
398 	robj = gem_to_radeon_bo(gobj);
399 
400 	r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
401 
402 	drm_gem_object_unreference_unlocked(gobj);
403 	lockmgr(&rdev->exclusive_lock, LK_RELEASE);
404 	r = radeon_gem_handle_lockup(robj->rdev, r);
405 	return r;
406 }
407 
408 int radeon_mode_dumb_mmap(struct drm_file *filp,
409 			  struct drm_device *dev,
410 			  uint32_t handle, uint64_t *offset_p)
411 {
412 	struct drm_gem_object *gobj;
413 	struct radeon_bo *robj;
414 
415 	gobj = drm_gem_object_lookup(filp, handle);
416 	if (gobj == NULL) {
417 		return -ENOENT;
418 	}
419 	robj = gem_to_radeon_bo(gobj);
420 	*offset_p = radeon_bo_mmap_offset(robj);
421 	drm_gem_object_unreference_unlocked(gobj);
422 	return 0;
423 }
424 
425 int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
426 			  struct drm_file *filp)
427 {
428 	struct drm_radeon_gem_mmap *args = data;
429 
430 	return radeon_mode_dumb_mmap(filp, dev, args->handle, (uint64_t *)&args->addr_ptr);
431 }
432 
433 int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
434 			  struct drm_file *filp)
435 {
436 	struct radeon_device *rdev = dev->dev_private;
437 	struct drm_radeon_gem_busy *args = data;
438 	struct drm_gem_object *gobj;
439 	struct radeon_bo *robj;
440 	int r;
441 	uint32_t cur_placement = 0;
442 
443 	gobj = drm_gem_object_lookup(filp, args->handle);
444 	if (gobj == NULL) {
445 		return -ENOENT;
446 	}
447 	robj = gem_to_radeon_bo(gobj);
448 	r = radeon_bo_wait(robj, &cur_placement, true);
449 	args->domain = radeon_mem_type_to_domain(cur_placement);
450 	drm_gem_object_unreference_unlocked(gobj);
451 	r = radeon_gem_handle_lockup(rdev, r);
452 	return r;
453 }
454 
455 int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
456 			      struct drm_file *filp)
457 {
458 	struct radeon_device *rdev = dev->dev_private;
459 	struct drm_radeon_gem_wait_idle *args = data;
460 	struct drm_gem_object *gobj;
461 	struct radeon_bo *robj;
462 	int r = 0;
463 	uint32_t cur_placement = 0;
464 	long ret;
465 
466 	gobj = drm_gem_object_lookup(filp, args->handle);
467 	if (gobj == NULL) {
468 		return -ENOENT;
469 	}
470 	robj = gem_to_radeon_bo(gobj);
471 
472 	ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
473 	if (ret == 0)
474 		r = -EBUSY;
475 	else if (ret < 0)
476 		r = ret;
477 
478 	/* Flush HDP cache via MMIO if necessary */
479 	if (rdev->asic->mmio_hdp_flush &&
480 	    radeon_mem_type_to_domain(cur_placement) == RADEON_GEM_DOMAIN_VRAM)
481 		robj->rdev->asic->mmio_hdp_flush(rdev);
482 	drm_gem_object_unreference_unlocked(gobj);
483 	if (r == -ERESTARTSYS)
484 		r = -EINTR;
485 	r = radeon_gem_handle_lockup(rdev, r);
486 	return r;
487 }
488 
489 int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
490 				struct drm_file *filp)
491 {
492 	struct drm_radeon_gem_set_tiling *args = data;
493 	struct drm_gem_object *gobj;
494 	struct radeon_bo *robj;
495 	int r = 0;
496 
497 	DRM_DEBUG("%d \n", args->handle);
498 	gobj = drm_gem_object_lookup(filp, args->handle);
499 	if (gobj == NULL)
500 		return -ENOENT;
501 	robj = gem_to_radeon_bo(gobj);
502 	r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
503 	drm_gem_object_unreference_unlocked(gobj);
504 	return r;
505 }
506 
507 int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
508 				struct drm_file *filp)
509 {
510 	struct drm_radeon_gem_get_tiling *args = data;
511 	struct drm_gem_object *gobj;
512 	struct radeon_bo *rbo;
513 	int r = 0;
514 
515 	DRM_DEBUG("\n");
516 	gobj = drm_gem_object_lookup(filp, args->handle);
517 	if (gobj == NULL)
518 		return -ENOENT;
519 	rbo = gem_to_radeon_bo(gobj);
520 	r = radeon_bo_reserve(rbo, false);
521 	if (unlikely(r != 0))
522 		goto out;
523 	radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
524 	radeon_bo_unreserve(rbo);
525 out:
526 	drm_gem_object_unreference_unlocked(gobj);
527 	return r;
528 }
529 
530 int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
531 			  struct drm_file *filp)
532 {
533 	struct drm_radeon_gem_va *args = data;
534 	struct drm_gem_object *gobj;
535 	struct radeon_device *rdev = dev->dev_private;
536 	struct radeon_fpriv *fpriv = filp->driver_priv;
537 	struct radeon_bo *rbo;
538 	struct radeon_bo_va *bo_va;
539 	u32 invalid_flags;
540 	int r = 0;
541 
542 	if (!rdev->vm_manager.enabled) {
543 		args->operation = RADEON_VA_RESULT_ERROR;
544 		return -ENOTTY;
545 	}
546 
547 	/* !! DONT REMOVE !!
548 	 * We don't support vm_id yet, to be sure we don't have have broken
549 	 * userspace, reject anyone trying to use non 0 value thus moving
550 	 * forward we can use those fields without breaking existant userspace
551 	 */
552 	if (args->vm_id) {
553 		args->operation = RADEON_VA_RESULT_ERROR;
554 		return -EINVAL;
555 	}
556 
557 	if (args->offset < RADEON_VA_RESERVED_SIZE) {
558 		dev_err(&dev->pdev->dev,
559 			"offset 0x%lX is in reserved area 0x%X\n",
560 			(unsigned long)args->offset,
561 			RADEON_VA_RESERVED_SIZE);
562 		args->operation = RADEON_VA_RESULT_ERROR;
563 		return -EINVAL;
564 	}
565 
566 	/* don't remove, we need to enforce userspace to set the snooped flag
567 	 * otherwise we will endup with broken userspace and we won't be able
568 	 * to enable this feature without adding new interface
569 	 */
570 	invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
571 	if ((args->flags & invalid_flags)) {
572 		dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
573 			args->flags, invalid_flags);
574 		args->operation = RADEON_VA_RESULT_ERROR;
575 		return -EINVAL;
576 	}
577 
578 	switch (args->operation) {
579 	case RADEON_VA_MAP:
580 	case RADEON_VA_UNMAP:
581 		break;
582 	default:
583 		dev_err(&dev->pdev->dev, "unsupported operation %d\n",
584 			args->operation);
585 		args->operation = RADEON_VA_RESULT_ERROR;
586 		return -EINVAL;
587 	}
588 
589 	gobj = drm_gem_object_lookup(filp, args->handle);
590 	if (gobj == NULL) {
591 		args->operation = RADEON_VA_RESULT_ERROR;
592 		return -ENOENT;
593 	}
594 	rbo = gem_to_radeon_bo(gobj);
595 	r = radeon_bo_reserve(rbo, false);
596 	if (r) {
597 		args->operation = RADEON_VA_RESULT_ERROR;
598 		drm_gem_object_unreference_unlocked(gobj);
599 		return r;
600 	}
601 	bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
602 	if (!bo_va) {
603 		args->operation = RADEON_VA_RESULT_ERROR;
604 		drm_gem_object_unreference_unlocked(gobj);
605 		return -ENOENT;
606 	}
607 
608 	switch (args->operation) {
609 	case RADEON_VA_MAP:
610 		if (bo_va->it.start) {
611 			args->operation = RADEON_VA_RESULT_VA_EXIST;
612 			args->offset = bo_va->it.start * RADEON_GPU_PAGE_SIZE;
613 			radeon_bo_unreserve(rbo);
614 			goto out;
615 		}
616 		r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
617 		break;
618 	case RADEON_VA_UNMAP:
619 		r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
620 		break;
621 	default:
622 		break;
623 	}
624 	args->operation = RADEON_VA_RESULT_OK;
625 	if (r) {
626 		args->operation = RADEON_VA_RESULT_ERROR;
627 	}
628 out:
629 	radeon_bo_unreserve(rbo);
630 	drm_gem_object_unreference_unlocked(gobj);
631 	return r;
632 }
633 
634 int radeon_gem_op_ioctl(struct drm_device *dev, void *data,
635 			struct drm_file *filp)
636 {
637 	struct drm_radeon_gem_op *args = data;
638 	struct drm_gem_object *gobj;
639 	struct radeon_bo *robj;
640 	int r;
641 
642 	gobj = drm_gem_object_lookup(filp, args->handle);
643 	if (gobj == NULL) {
644 		return -ENOENT;
645 	}
646 	robj = gem_to_radeon_bo(gobj);
647 	r = radeon_bo_reserve(robj, false);
648 	if (unlikely(r))
649 		goto out;
650 
651 	switch (args->op) {
652 	case RADEON_GEM_OP_GET_INITIAL_DOMAIN:
653 		args->value = robj->initial_domain;
654 		break;
655 	case RADEON_GEM_OP_SET_INITIAL_DOMAIN:
656 		robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM |
657 						      RADEON_GEM_DOMAIN_GTT |
658 						      RADEON_GEM_DOMAIN_CPU);
659 		break;
660 	default:
661 		r = -EINVAL;
662 	}
663 
664 	radeon_bo_unreserve(robj);
665 out:
666 	drm_gem_object_unreference_unlocked(gobj);
667 	return r;
668 }
669 
670 int radeon_mode_dumb_create(struct drm_file *file_priv,
671 			    struct drm_device *dev,
672 			    struct drm_mode_create_dumb *args)
673 {
674 	struct radeon_device *rdev = dev->dev_private;
675 	struct drm_gem_object *gobj;
676 	uint32_t handle;
677 	int r;
678 
679 	args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
680 	args->size = args->pitch * args->height;
681 	args->size = ALIGN(args->size, PAGE_SIZE);
682 
683 	r = radeon_gem_object_create(rdev, args->size, 0,
684 				     RADEON_GEM_DOMAIN_VRAM, 0,
685 				     false, &gobj);
686 	if (r)
687 		return -ENOMEM;
688 
689 	r = drm_gem_handle_create(file_priv, gobj, &handle);
690 	/* drop reference from allocate - handle holds it now */
691 	drm_gem_object_unreference_unlocked(gobj);
692 	if (r) {
693 		return r;
694 	}
695 	args->handle = handle;
696 	return 0;
697 }
698 
699 #if defined(CONFIG_DEBUG_FS)
700 static int radeon_debugfs_gem_info(struct seq_file *m, void *data)
701 {
702 	struct drm_info_node *node = (struct drm_info_node *)m->private;
703 	struct drm_device *dev = node->minor->dev;
704 	struct radeon_device *rdev = dev->dev_private;
705 	struct radeon_bo *rbo;
706 	unsigned i = 0;
707 
708 	mutex_lock(&rdev->gem.mutex);
709 	list_for_each_entry(rbo, &rdev->gem.objects, list) {
710 		unsigned domain;
711 		const char *placement;
712 
713 		domain = radeon_mem_type_to_domain(rbo->tbo.mem.mem_type);
714 		switch (domain) {
715 		case RADEON_GEM_DOMAIN_VRAM:
716 			placement = "VRAM";
717 			break;
718 		case RADEON_GEM_DOMAIN_GTT:
719 			placement = " GTT";
720 			break;
721 		case RADEON_GEM_DOMAIN_CPU:
722 		default:
723 			placement = " CPU";
724 			break;
725 		}
726 		seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n",
727 			   i, radeon_bo_size(rbo) >> 10, radeon_bo_size(rbo) >> 20,
728 			   placement, (unsigned long)rbo->pid);
729 		i++;
730 	}
731 	mutex_unlock(&rdev->gem.mutex);
732 	return 0;
733 }
734 
735 static struct drm_info_list radeon_debugfs_gem_list[] = {
736 	{"radeon_gem_info", &radeon_debugfs_gem_info, 0, NULL},
737 };
738 #endif
739 
740 int radeon_gem_debugfs_init(struct radeon_device *rdev)
741 {
742 #if defined(CONFIG_DEBUG_FS)
743 	return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1);
744 #endif
745 	return 0;
746 }
747