1 /* 2 * Copyright 2008 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * Copyright 2009 Jerome Glisse. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Dave Airlie 25 * Alex Deucher 26 * Jerome Glisse 27 * 28 * $FreeBSD: head/sys/dev/drm2/radeon/radeon_gem.c 254885 2013-08-25 19:37:15Z dumbbell $ 29 */ 30 31 #include <drm/drmP.h> 32 #include <drm/radeon_drm.h> 33 #include "radeon.h" 34 #include "radeon_gem.h" 35 36 void radeon_gem_object_free(struct drm_gem_object *gobj) 37 { 38 struct radeon_bo *robj = gem_to_radeon_bo(gobj); 39 40 if (robj) { 41 #ifdef DUMBBELL_WIP 42 if (robj->gem_base.import_attach) 43 drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg); 44 #endif /* DUMBBELL_WIP */ 45 radeon_mn_unregister(robj); 46 radeon_bo_unref(&robj); 47 } 48 } 49 50 int radeon_gem_object_create(struct radeon_device *rdev, unsigned long size, 51 int alignment, int initial_domain, 52 u32 flags, bool kernel, 53 struct drm_gem_object **obj) 54 { 55 struct radeon_bo *robj; 56 unsigned long max_size; 57 int r; 58 59 *obj = NULL; 60 /* At least align on page size */ 61 if (alignment < PAGE_SIZE) { 62 alignment = PAGE_SIZE; 63 } 64 65 /* Maximum bo size is the unpinned gtt size since we use the gtt to 66 * handle vram to system pool migrations. 67 */ 68 max_size = rdev->mc.gtt_size - rdev->gart_pin_size; 69 if (size > max_size) { 70 DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n", 71 size >> 20, max_size >> 20); 72 return -ENOMEM; 73 } 74 75 retry: 76 r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, 77 flags, NULL, NULL, &robj); 78 if (r) { 79 if (r != -ERESTARTSYS) { 80 if (initial_domain == RADEON_GEM_DOMAIN_VRAM) { 81 initial_domain |= RADEON_GEM_DOMAIN_GTT; 82 goto retry; 83 } 84 DRM_ERROR("Failed to allocate GEM object (%ld, %d, %u, %d)\n", 85 size, initial_domain, alignment, r); 86 } 87 return r; 88 } 89 *obj = &robj->gem_base; 90 robj->pid = curproc ? curproc->p_pid : 0; 91 92 mutex_lock(&rdev->gem.mutex); 93 list_add_tail(&robj->list, &rdev->gem.objects); 94 mutex_unlock(&rdev->gem.mutex); 95 96 return 0; 97 } 98 99 static int radeon_gem_set_domain(struct drm_gem_object *gobj, 100 uint32_t rdomain, uint32_t wdomain) 101 { 102 struct radeon_bo *robj; 103 uint32_t domain; 104 long r; 105 106 /* FIXME: reeimplement */ 107 robj = gem_to_radeon_bo(gobj); 108 /* work out where to validate the buffer to */ 109 domain = wdomain; 110 if (!domain) { 111 domain = rdomain; 112 } 113 if (!domain) { 114 /* Do nothings */ 115 printk(KERN_WARNING "Set domain without domain !\n"); 116 return 0; 117 } 118 if (domain == RADEON_GEM_DOMAIN_CPU) { 119 /* Asking for cpu access wait for object idle */ 120 r = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ); 121 if (!r) 122 r = -EBUSY; 123 124 if (r < 0 && r != -EINTR) { 125 printk(KERN_ERR "Failed to wait for object: %li\n", r); 126 return r; 127 } 128 } 129 return 0; 130 } 131 132 int radeon_gem_init(struct radeon_device *rdev) 133 { 134 INIT_LIST_HEAD(&rdev->gem.objects); 135 return 0; 136 } 137 138 void radeon_gem_fini(struct radeon_device *rdev) 139 { 140 radeon_bo_force_delete(rdev); 141 } 142 143 /* 144 * Call from drm_gem_handle_create which appear in both new and open ioctl 145 * case. 146 */ 147 int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv) 148 { 149 struct radeon_bo *rbo = gem_to_radeon_bo(obj); 150 struct radeon_device *rdev = rbo->rdev; 151 struct radeon_fpriv *fpriv = file_priv->driver_priv; 152 struct radeon_vm *vm = &fpriv->vm; 153 struct radeon_bo_va *bo_va; 154 int r; 155 156 if ((rdev->family < CHIP_CAYMAN) || 157 (!rdev->accel_working)) { 158 return 0; 159 } 160 161 r = radeon_bo_reserve(rbo, false); 162 if (r) { 163 return r; 164 } 165 166 bo_va = radeon_vm_bo_find(vm, rbo); 167 if (!bo_va) { 168 bo_va = radeon_vm_bo_add(rdev, vm, rbo); 169 } else { 170 ++bo_va->ref_count; 171 } 172 radeon_bo_unreserve(rbo); 173 174 return 0; 175 } 176 177 void radeon_gem_object_close(struct drm_gem_object *obj, 178 struct drm_file *file_priv) 179 { 180 struct radeon_bo *rbo = gem_to_radeon_bo(obj); 181 struct radeon_device *rdev = rbo->rdev; 182 struct radeon_fpriv *fpriv = file_priv->driver_priv; 183 struct radeon_vm *vm = &fpriv->vm; 184 struct radeon_bo_va *bo_va; 185 int r; 186 187 if ((rdev->family < CHIP_CAYMAN) || 188 (!rdev->accel_working)) { 189 return; 190 } 191 192 r = radeon_bo_reserve(rbo, true); 193 if (r) { 194 dev_err(rdev->dev, "leaking bo va because " 195 "we fail to reserve bo (%d)\n", r); 196 return; 197 } 198 bo_va = radeon_vm_bo_find(vm, rbo); 199 if (bo_va) { 200 if (--bo_va->ref_count == 0) { 201 radeon_vm_bo_rmv(rdev, bo_va); 202 } 203 } 204 radeon_bo_unreserve(rbo); 205 } 206 207 static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r) 208 { 209 if (r == -EDEADLK) { 210 r = radeon_gpu_reset(rdev); 211 if (!r) 212 r = -EAGAIN; 213 } 214 return r; 215 } 216 217 /* 218 * GEM ioctls. 219 */ 220 int radeon_gem_info_ioctl(struct drm_device *dev, void *data, 221 struct drm_file *filp) 222 { 223 struct radeon_device *rdev = dev->dev_private; 224 struct drm_radeon_gem_info *args = data; 225 struct ttm_mem_type_manager *man; 226 227 man = &rdev->mman.bdev.man[TTM_PL_VRAM]; 228 229 args->vram_size = rdev->mc.real_vram_size; 230 args->vram_visible = (u64)man->size << PAGE_SHIFT; 231 args->vram_visible -= rdev->vram_pin_size; 232 args->gart_size = rdev->mc.gtt_size; 233 args->gart_size -= rdev->gart_pin_size; 234 235 return 0; 236 } 237 238 int radeon_gem_pread_ioctl(struct drm_device *dev, void *data, 239 struct drm_file *filp) 240 { 241 /* TODO: implement */ 242 DRM_ERROR("unimplemented %s\n", __func__); 243 return -ENOSYS; 244 } 245 246 int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data, 247 struct drm_file *filp) 248 { 249 /* TODO: implement */ 250 DRM_ERROR("unimplemented %s\n", __func__); 251 return -ENOSYS; 252 } 253 254 int radeon_gem_create_ioctl(struct drm_device *dev, void *data, 255 struct drm_file *filp) 256 { 257 struct radeon_device *rdev = dev->dev_private; 258 struct drm_radeon_gem_create *args = data; 259 struct drm_gem_object *gobj; 260 uint32_t handle; 261 int r; 262 263 lockmgr(&rdev->exclusive_lock, LK_SHARED); 264 /* create a gem object to contain this object in */ 265 args->size = roundup(args->size, PAGE_SIZE); 266 r = radeon_gem_object_create(rdev, args->size, args->alignment, 267 args->initial_domain, args->flags, 268 false, &gobj); 269 if (r) { 270 if (r == -ERESTARTSYS) 271 r = -EINTR; 272 lockmgr(&rdev->exclusive_lock, LK_RELEASE); 273 r = radeon_gem_handle_lockup(rdev, r); 274 return r; 275 } 276 handle = 0; 277 r = drm_gem_handle_create(filp, gobj, &handle); 278 /* drop reference from allocate - handle holds it now */ 279 drm_gem_object_unreference_unlocked(gobj); 280 if (r) { 281 lockmgr(&rdev->exclusive_lock, LK_RELEASE); 282 r = radeon_gem_handle_lockup(rdev, r); 283 return r; 284 } 285 args->handle = handle; 286 lockmgr(&rdev->exclusive_lock, LK_RELEASE); 287 return 0; 288 } 289 290 #if 0 291 int radeon_gem_userptr_ioctl(struct drm_device *dev, void *data, 292 struct drm_file *filp) 293 { 294 struct radeon_device *rdev = dev->dev_private; 295 struct drm_radeon_gem_userptr *args = data; 296 struct drm_gem_object *gobj; 297 struct radeon_bo *bo; 298 uint32_t handle; 299 int r; 300 301 if (offset_in_page(args->addr | args->size)) 302 return -EINVAL; 303 304 /* reject unknown flag values */ 305 if (args->flags & ~(RADEON_GEM_USERPTR_READONLY | 306 RADEON_GEM_USERPTR_ANONONLY | RADEON_GEM_USERPTR_VALIDATE | 307 RADEON_GEM_USERPTR_REGISTER)) 308 return -EINVAL; 309 310 if (args->flags & RADEON_GEM_USERPTR_READONLY) { 311 /* readonly pages not tested on older hardware */ 312 if (rdev->family < CHIP_R600) 313 return -EINVAL; 314 315 } else if (!(args->flags & RADEON_GEM_USERPTR_ANONONLY) || 316 !(args->flags & RADEON_GEM_USERPTR_REGISTER)) { 317 318 /* if we want to write to it we must require anonymous 319 memory and install a MMU notifier */ 320 return -EACCES; 321 } 322 323 down_read(&rdev->exclusive_lock); 324 325 /* create a gem object to contain this object in */ 326 r = radeon_gem_object_create(rdev, args->size, 0, 327 RADEON_GEM_DOMAIN_CPU, 0, 328 false, &gobj); 329 if (r) 330 goto handle_lockup; 331 332 bo = gem_to_radeon_bo(gobj); 333 r = radeon_ttm_tt_set_userptr(bo->tbo.ttm, args->addr, args->flags); 334 if (r) 335 goto release_object; 336 337 if (args->flags & RADEON_GEM_USERPTR_REGISTER) { 338 r = radeon_mn_register(bo, args->addr); 339 if (r) 340 goto release_object; 341 } 342 343 if (args->flags & RADEON_GEM_USERPTR_VALIDATE) { 344 down_read(¤t->mm->mmap_sem); 345 r = radeon_bo_reserve(bo, true); 346 if (r) { 347 up_read(¤t->mm->mmap_sem); 348 goto release_object; 349 } 350 351 radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_GTT); 352 r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false); 353 radeon_bo_unreserve(bo); 354 up_read(¤t->mm->mmap_sem); 355 if (r) 356 goto release_object; 357 } 358 359 r = drm_gem_handle_create(filp, gobj, &handle); 360 /* drop reference from allocate - handle holds it now */ 361 drm_gem_object_unreference_unlocked(gobj); 362 if (r) 363 goto handle_lockup; 364 365 args->handle = handle; 366 up_read(&rdev->exclusive_lock); 367 return 0; 368 369 release_object: 370 drm_gem_object_unreference_unlocked(gobj); 371 372 handle_lockup: 373 up_read(&rdev->exclusive_lock); 374 r = radeon_gem_handle_lockup(rdev, r); 375 376 return r; 377 } 378 #endif 379 380 int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data, 381 struct drm_file *filp) 382 { 383 /* transition the BO to a domain - 384 * just validate the BO into a certain domain */ 385 struct radeon_device *rdev = dev->dev_private; 386 struct drm_radeon_gem_set_domain *args = data; 387 struct drm_gem_object *gobj; 388 struct radeon_bo *robj; 389 int r; 390 391 /* for now if someone requests domain CPU - 392 * just make sure the buffer is finished with */ 393 lockmgr(&rdev->exclusive_lock, LK_SHARED); 394 395 /* just do a BO wait for now */ 396 gobj = drm_gem_object_lookup(filp, args->handle); 397 if (gobj == NULL) { 398 lockmgr(&rdev->exclusive_lock, LK_RELEASE); 399 return -ENOENT; 400 } 401 robj = gem_to_radeon_bo(gobj); 402 403 r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain); 404 405 drm_gem_object_unreference_unlocked(gobj); 406 lockmgr(&rdev->exclusive_lock, LK_RELEASE); 407 r = radeon_gem_handle_lockup(robj->rdev, r); 408 return r; 409 } 410 411 int radeon_mode_dumb_mmap(struct drm_file *filp, 412 struct drm_device *dev, 413 uint32_t handle, uint64_t *offset_p) 414 { 415 struct drm_gem_object *gobj; 416 struct radeon_bo *robj; 417 418 gobj = drm_gem_object_lookup(filp, handle); 419 if (gobj == NULL) { 420 return -ENOENT; 421 } 422 robj = gem_to_radeon_bo(gobj); 423 *offset_p = radeon_bo_mmap_offset(robj); 424 drm_gem_object_unreference_unlocked(gobj); 425 return 0; 426 } 427 428 int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data, 429 struct drm_file *filp) 430 { 431 struct drm_radeon_gem_mmap *args = data; 432 433 return radeon_mode_dumb_mmap(filp, dev, args->handle, (uint64_t *)&args->addr_ptr); 434 } 435 436 int radeon_gem_busy_ioctl(struct drm_device *dev, void *data, 437 struct drm_file *filp) 438 { 439 struct drm_radeon_gem_busy *args = data; 440 struct drm_gem_object *gobj; 441 struct radeon_bo *robj; 442 int r; 443 uint32_t cur_placement = 0; 444 445 gobj = drm_gem_object_lookup(filp, args->handle); 446 if (gobj == NULL) { 447 return -ENOENT; 448 } 449 robj = gem_to_radeon_bo(gobj); 450 451 r = reservation_object_test_signaled_rcu(robj->tbo.resv, true); 452 if (r == 0) 453 r = -EBUSY; 454 else 455 r = 0; 456 457 cur_placement = ACCESS_ONCE(robj->tbo.mem.mem_type); 458 args->domain = radeon_mem_type_to_domain(cur_placement); 459 drm_gem_object_unreference_unlocked(gobj); 460 return r; 461 } 462 463 int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data, 464 struct drm_file *filp) 465 { 466 struct radeon_device *rdev = dev->dev_private; 467 struct drm_radeon_gem_wait_idle *args = data; 468 struct drm_gem_object *gobj; 469 struct radeon_bo *robj; 470 int r = 0; 471 uint32_t cur_placement = 0; 472 long ret; 473 474 gobj = drm_gem_object_lookup(filp, args->handle); 475 if (gobj == NULL) { 476 return -ENOENT; 477 } 478 robj = gem_to_radeon_bo(gobj); 479 480 ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ); 481 if (ret == 0) 482 r = -EBUSY; 483 else if (ret < 0) 484 r = ret; 485 486 /* Flush HDP cache via MMIO if necessary */ 487 cur_placement = ACCESS_ONCE(robj->tbo.mem.mem_type); 488 if (rdev->asic->mmio_hdp_flush && 489 radeon_mem_type_to_domain(cur_placement) == RADEON_GEM_DOMAIN_VRAM) 490 robj->rdev->asic->mmio_hdp_flush(rdev); 491 drm_gem_object_unreference_unlocked(gobj); 492 if (r == -ERESTARTSYS) 493 r = -EINTR; 494 r = radeon_gem_handle_lockup(rdev, r); 495 return r; 496 } 497 498 int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data, 499 struct drm_file *filp) 500 { 501 struct drm_radeon_gem_set_tiling *args = data; 502 struct drm_gem_object *gobj; 503 struct radeon_bo *robj; 504 int r = 0; 505 506 DRM_DEBUG("%d \n", args->handle); 507 gobj = drm_gem_object_lookup(filp, args->handle); 508 if (gobj == NULL) 509 return -ENOENT; 510 robj = gem_to_radeon_bo(gobj); 511 r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch); 512 drm_gem_object_unreference_unlocked(gobj); 513 return r; 514 } 515 516 int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data, 517 struct drm_file *filp) 518 { 519 struct drm_radeon_gem_get_tiling *args = data; 520 struct drm_gem_object *gobj; 521 struct radeon_bo *rbo; 522 int r = 0; 523 524 DRM_DEBUG("\n"); 525 gobj = drm_gem_object_lookup(filp, args->handle); 526 if (gobj == NULL) 527 return -ENOENT; 528 rbo = gem_to_radeon_bo(gobj); 529 r = radeon_bo_reserve(rbo, false); 530 if (unlikely(r != 0)) 531 goto out; 532 radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch); 533 radeon_bo_unreserve(rbo); 534 out: 535 drm_gem_object_unreference_unlocked(gobj); 536 return r; 537 } 538 539 /** 540 * radeon_gem_va_update_vm -update the bo_va in its VM 541 * 542 * @rdev: radeon_device pointer 543 * @bo_va: bo_va to update 544 * 545 * Update the bo_va directly after setting it's address. Errors are not 546 * vital here, so they are not reported back to userspace. 547 */ 548 static void radeon_gem_va_update_vm(struct radeon_device *rdev, 549 struct radeon_bo_va *bo_va) 550 { 551 struct ttm_validate_buffer tv, *entry; 552 struct radeon_bo_list *vm_bos; 553 struct ww_acquire_ctx ticket; 554 struct list_head list; 555 unsigned domain; 556 int r; 557 558 INIT_LIST_HEAD(&list); 559 560 tv.bo = &bo_va->bo->tbo; 561 tv.shared = true; 562 list_add(&tv.head, &list); 563 564 vm_bos = radeon_vm_get_bos(rdev, bo_va->vm, &list); 565 if (!vm_bos) 566 return; 567 568 r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL); 569 if (r) 570 goto error_free; 571 572 list_for_each_entry(entry, &list, head) { 573 domain = radeon_mem_type_to_domain(entry->bo->mem.mem_type); 574 /* if anything is swapped out don't swap it in here, 575 just abort and wait for the next CS */ 576 if (domain == RADEON_GEM_DOMAIN_CPU) 577 goto error_unreserve; 578 } 579 580 mutex_lock(&bo_va->vm->mutex); 581 r = radeon_vm_clear_freed(rdev, bo_va->vm); 582 if (r) 583 goto error_unlock; 584 585 if (bo_va->it.start) 586 r = radeon_vm_bo_update(rdev, bo_va, &bo_va->bo->tbo.mem); 587 588 error_unlock: 589 mutex_unlock(&bo_va->vm->mutex); 590 591 error_unreserve: 592 ttm_eu_backoff_reservation(&ticket, &list); 593 594 error_free: 595 drm_free_large(vm_bos); 596 597 if (r && r != -ERESTARTSYS) 598 DRM_ERROR("Couldn't update BO_VA (%d)\n", r); 599 } 600 601 int radeon_gem_va_ioctl(struct drm_device *dev, void *data, 602 struct drm_file *filp) 603 { 604 struct drm_radeon_gem_va *args = data; 605 struct drm_gem_object *gobj; 606 struct radeon_device *rdev = dev->dev_private; 607 struct radeon_fpriv *fpriv = filp->driver_priv; 608 struct radeon_bo *rbo; 609 struct radeon_bo_va *bo_va; 610 u32 invalid_flags; 611 int r = 0; 612 613 if (!rdev->vm_manager.enabled) { 614 args->operation = RADEON_VA_RESULT_ERROR; 615 return -ENOTTY; 616 } 617 618 /* !! DONT REMOVE !! 619 * We don't support vm_id yet, to be sure we don't have have broken 620 * userspace, reject anyone trying to use non 0 value thus moving 621 * forward we can use those fields without breaking existant userspace 622 */ 623 if (args->vm_id) { 624 args->operation = RADEON_VA_RESULT_ERROR; 625 return -EINVAL; 626 } 627 628 if (args->offset < RADEON_VA_RESERVED_SIZE) { 629 dev_err(&dev->pdev->dev, 630 "offset 0x%lX is in reserved area 0x%X\n", 631 (unsigned long)args->offset, 632 RADEON_VA_RESERVED_SIZE); 633 args->operation = RADEON_VA_RESULT_ERROR; 634 return -EINVAL; 635 } 636 637 /* don't remove, we need to enforce userspace to set the snooped flag 638 * otherwise we will endup with broken userspace and we won't be able 639 * to enable this feature without adding new interface 640 */ 641 invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM; 642 if ((args->flags & invalid_flags)) { 643 dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n", 644 args->flags, invalid_flags); 645 args->operation = RADEON_VA_RESULT_ERROR; 646 return -EINVAL; 647 } 648 649 switch (args->operation) { 650 case RADEON_VA_MAP: 651 case RADEON_VA_UNMAP: 652 break; 653 default: 654 dev_err(&dev->pdev->dev, "unsupported operation %d\n", 655 args->operation); 656 args->operation = RADEON_VA_RESULT_ERROR; 657 return -EINVAL; 658 } 659 660 gobj = drm_gem_object_lookup(filp, args->handle); 661 if (gobj == NULL) { 662 args->operation = RADEON_VA_RESULT_ERROR; 663 return -ENOENT; 664 } 665 rbo = gem_to_radeon_bo(gobj); 666 r = radeon_bo_reserve(rbo, false); 667 if (r) { 668 args->operation = RADEON_VA_RESULT_ERROR; 669 drm_gem_object_unreference_unlocked(gobj); 670 return r; 671 } 672 bo_va = radeon_vm_bo_find(&fpriv->vm, rbo); 673 if (!bo_va) { 674 args->operation = RADEON_VA_RESULT_ERROR; 675 drm_gem_object_unreference_unlocked(gobj); 676 return -ENOENT; 677 } 678 679 switch (args->operation) { 680 case RADEON_VA_MAP: 681 if (bo_va->it.start) { 682 args->operation = RADEON_VA_RESULT_VA_EXIST; 683 args->offset = bo_va->it.start * RADEON_GPU_PAGE_SIZE; 684 radeon_bo_unreserve(rbo); 685 goto out; 686 } 687 r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags); 688 break; 689 case RADEON_VA_UNMAP: 690 r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0); 691 break; 692 default: 693 break; 694 } 695 if (!r) 696 radeon_gem_va_update_vm(rdev, bo_va); 697 args->operation = RADEON_VA_RESULT_OK; 698 if (r) { 699 args->operation = RADEON_VA_RESULT_ERROR; 700 } 701 out: 702 drm_gem_object_unreference_unlocked(gobj); 703 return r; 704 } 705 706 int radeon_gem_op_ioctl(struct drm_device *dev, void *data, 707 struct drm_file *filp) 708 { 709 struct drm_radeon_gem_op *args = data; 710 struct drm_gem_object *gobj; 711 struct radeon_bo *robj; 712 int r; 713 714 gobj = drm_gem_object_lookup(filp, args->handle); 715 if (gobj == NULL) { 716 return -ENOENT; 717 } 718 robj = gem_to_radeon_bo(gobj); 719 r = radeon_bo_reserve(robj, false); 720 if (unlikely(r)) 721 goto out; 722 723 switch (args->op) { 724 case RADEON_GEM_OP_GET_INITIAL_DOMAIN: 725 args->value = robj->initial_domain; 726 break; 727 case RADEON_GEM_OP_SET_INITIAL_DOMAIN: 728 robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM | 729 RADEON_GEM_DOMAIN_GTT | 730 RADEON_GEM_DOMAIN_CPU); 731 break; 732 default: 733 r = -EINVAL; 734 } 735 736 radeon_bo_unreserve(robj); 737 out: 738 drm_gem_object_unreference_unlocked(gobj); 739 return r; 740 } 741 742 int radeon_mode_dumb_create(struct drm_file *file_priv, 743 struct drm_device *dev, 744 struct drm_mode_create_dumb *args) 745 { 746 struct radeon_device *rdev = dev->dev_private; 747 struct drm_gem_object *gobj; 748 uint32_t handle; 749 int r; 750 751 args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8); 752 args->size = args->pitch * args->height; 753 args->size = ALIGN(args->size, PAGE_SIZE); 754 755 r = radeon_gem_object_create(rdev, args->size, 0, 756 RADEON_GEM_DOMAIN_VRAM, 0, 757 false, &gobj); 758 if (r) 759 return -ENOMEM; 760 761 r = drm_gem_handle_create(file_priv, gobj, &handle); 762 /* drop reference from allocate - handle holds it now */ 763 drm_gem_object_unreference_unlocked(gobj); 764 if (r) { 765 return r; 766 } 767 args->handle = handle; 768 return 0; 769 } 770 771 #if defined(CONFIG_DEBUG_FS) 772 static int radeon_debugfs_gem_info(struct seq_file *m, void *data) 773 { 774 struct drm_info_node *node = (struct drm_info_node *)m->private; 775 struct drm_device *dev = node->minor->dev; 776 struct radeon_device *rdev = dev->dev_private; 777 struct radeon_bo *rbo; 778 unsigned i = 0; 779 780 mutex_lock(&rdev->gem.mutex); 781 list_for_each_entry(rbo, &rdev->gem.objects, list) { 782 unsigned domain; 783 const char *placement; 784 785 domain = radeon_mem_type_to_domain(rbo->tbo.mem.mem_type); 786 switch (domain) { 787 case RADEON_GEM_DOMAIN_VRAM: 788 placement = "VRAM"; 789 break; 790 case RADEON_GEM_DOMAIN_GTT: 791 placement = " GTT"; 792 break; 793 case RADEON_GEM_DOMAIN_CPU: 794 default: 795 placement = " CPU"; 796 break; 797 } 798 seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n", 799 i, radeon_bo_size(rbo) >> 10, radeon_bo_size(rbo) >> 20, 800 placement, (unsigned long)rbo->pid); 801 i++; 802 } 803 mutex_unlock(&rdev->gem.mutex); 804 return 0; 805 } 806 807 static struct drm_info_list radeon_debugfs_gem_list[] = { 808 {"radeon_gem_info", &radeon_debugfs_gem_info, 0, NULL}, 809 }; 810 #endif 811 812 int radeon_gem_debugfs_init(struct radeon_device *rdev) 813 { 814 #if defined(CONFIG_DEBUG_FS) 815 return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1); 816 #endif 817 return 0; 818 } 819