1 /* 2 * Copyright 2008 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * Copyright 2009 Jerome Glisse. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Dave Airlie 25 * Alex Deucher 26 * Jerome Glisse 27 * 28 * $FreeBSD: head/sys/dev/drm2/radeon/radeon_irq_kms.c 254885 2013-08-25 19:37:15Z dumbbell $ 29 */ 30 31 #include <drm/drmP.h> 32 #include <drm/drm_crtc_helper.h> 33 #include <uapi_drm/radeon_drm.h> 34 #include "radeon_reg.h" 35 #include "radeon_irq_kms.h" 36 #include "radeon.h" 37 #include "atom.h" 38 39 #define RADEON_WAIT_IDLE_TIMEOUT 200 40 41 /** 42 * radeon_driver_irq_handler_kms - irq handler for KMS 43 * 44 * @DRM_IRQ_ARGS: args 45 * 46 * This is the irq handler for the radeon KMS driver (all asics). 47 * radeon_irq_process is a macro that points to the per-asic 48 * irq handler callback. 49 */ 50 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS) 51 { 52 struct drm_device *dev = (struct drm_device *) arg; 53 struct radeon_device *rdev = dev->dev_private; 54 55 return radeon_irq_process(rdev); 56 } 57 58 /* 59 * Handle hotplug events outside the interrupt handler proper. 60 */ 61 /** 62 * radeon_hotplug_work_func - display hotplug work handler 63 * 64 * @work: work struct 65 * 66 * This is the hot plug event work handler (all asics). 67 * The work gets scheduled from the irq handler if there 68 * was a hot plug interrupt. It walks the connector table 69 * and calls the hotplug handler for each one, then sends 70 * a drm hotplug event to alert userspace. 71 */ 72 static void radeon_hotplug_work_func(void *arg, int pending) 73 { 74 struct radeon_device *rdev = arg; 75 struct drm_device *dev = rdev->ddev; 76 struct drm_mode_config *mode_config = &dev->mode_config; 77 struct drm_connector *connector; 78 79 if (mode_config->num_connector) { 80 list_for_each_entry(connector, &mode_config->connector_list, head) 81 radeon_connector_hotplug(connector); 82 } 83 /* Just fire off a uevent and let userspace tell us what to do */ 84 drm_helper_hpd_irq_event(dev); 85 } 86 87 /** 88 * radeon_irq_reset_work_func - execute gpu reset 89 * 90 * @work: work struct 91 * 92 * Execute scheduled gpu reset (cayman+). 93 * This function is called when the irq handler 94 * thinks we need a gpu reset. 95 */ 96 static void radeon_irq_reset_work_func(void *arg, int pending) 97 { 98 struct radeon_device *rdev = arg; 99 100 radeon_gpu_reset(rdev); 101 } 102 103 /** 104 * radeon_driver_irq_preinstall_kms - drm irq preinstall callback 105 * 106 * @dev: drm dev pointer 107 * 108 * Gets the hw ready to enable irqs (all asics). 109 * This function disables all interrupt sources on the GPU. 110 */ 111 void radeon_driver_irq_preinstall_kms(struct drm_device *dev) 112 { 113 struct radeon_device *rdev = dev->dev_private; 114 unsigned i; 115 116 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 117 /* Disable *all* interrupts */ 118 for (i = 0; i < RADEON_NUM_RINGS; i++) 119 atomic_set(&rdev->irq.ring_int[i], 0); 120 rdev->irq.dpm_thermal = false; 121 for (i = 0; i < RADEON_MAX_HPD_PINS; i++) 122 rdev->irq.hpd[i] = false; 123 for (i = 0; i < RADEON_MAX_CRTCS; i++) { 124 rdev->irq.crtc_vblank_int[i] = false; 125 atomic_set(&rdev->irq.pflip[i], 0); 126 rdev->irq.afmt[i] = false; 127 } 128 radeon_irq_set(rdev); 129 lockmgr(&rdev->irq.lock, LK_RELEASE); 130 /* Clear bits */ 131 radeon_irq_process(rdev); 132 } 133 134 /** 135 * radeon_driver_irq_postinstall_kms - drm irq preinstall callback 136 * 137 * @dev: drm dev pointer 138 * 139 * Handles stuff to be done after enabling irqs (all asics). 140 * Returns 0 on success. 141 */ 142 int radeon_driver_irq_postinstall_kms(struct drm_device *dev) 143 { 144 dev->max_vblank_count = 0x001fffff; 145 return 0; 146 } 147 148 /** 149 * radeon_driver_irq_uninstall_kms - drm irq uninstall callback 150 * 151 * @dev: drm dev pointer 152 * 153 * This function disables all interrupt sources on the GPU (all asics). 154 */ 155 void radeon_driver_irq_uninstall_kms(struct drm_device *dev) 156 { 157 struct radeon_device *rdev = dev->dev_private; 158 unsigned i; 159 160 if (rdev == NULL) { 161 return; 162 } 163 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 164 /* Disable *all* interrupts */ 165 for (i = 0; i < RADEON_NUM_RINGS; i++) 166 atomic_set(&rdev->irq.ring_int[i], 0); 167 rdev->irq.dpm_thermal = false; 168 for (i = 0; i < RADEON_MAX_HPD_PINS; i++) 169 rdev->irq.hpd[i] = false; 170 for (i = 0; i < RADEON_MAX_CRTCS; i++) { 171 rdev->irq.crtc_vblank_int[i] = false; 172 atomic_set(&rdev->irq.pflip[i], 0); 173 rdev->irq.afmt[i] = false; 174 } 175 radeon_irq_set(rdev); 176 lockmgr(&rdev->irq.lock, LK_RELEASE); 177 } 178 179 /** 180 * radeon_msi_ok - asic specific msi checks 181 * 182 * @rdev: radeon device pointer 183 * 184 * Handles asic specific MSI checks to determine if 185 * MSIs should be enabled on a particular chip (all asics). 186 * Returns true if MSIs should be enabled, false if MSIs 187 * should not be enabled. 188 */ 189 int radeon_msi_ok(struct drm_device *dev, unsigned long flags) 190 { 191 int family; 192 193 family = flags & RADEON_FAMILY_MASK; 194 195 /* RV370/RV380 was first asic with MSI support */ 196 if (family < CHIP_RV380) 197 return false; 198 199 /* MSIs don't work on AGP */ 200 if (drm_device_is_agp(dev)) 201 return false; 202 203 /* force MSI on */ 204 if (radeon_msi == 1) 205 return true; 206 else if (radeon_msi == 0) 207 return false; 208 209 /* Quirks */ 210 /* HP RS690 only seems to work with MSIs. */ 211 if ((dev->pci_device == 0x791f) && 212 (dev->pci_subvendor == 0x103c) && 213 (dev->pci_subdevice == 0x30c2)) 214 return true; 215 216 /* Dell RS690 only seems to work with MSIs. */ 217 if ((dev->pci_device == 0x791f) && 218 (dev->pci_subvendor == 0x1028) && 219 (dev->pci_subdevice == 0x01fc)) 220 return true; 221 222 /* Dell RS690 only seems to work with MSIs. */ 223 if ((dev->pci_device == 0x791f) && 224 (dev->pci_subvendor == 0x1028) && 225 (dev->pci_subdevice == 0x01fd)) 226 return true; 227 228 /* Gateway RS690 only seems to work with MSIs. */ 229 if ((dev->pci_device == 0x791f) && 230 (dev->pci_subvendor == 0x107b) && 231 (dev->pci_subdevice == 0x0185)) 232 return true; 233 234 /* try and enable MSIs by default on all RS690s */ 235 if (family == CHIP_RS690) 236 return true; 237 238 /* RV515 seems to have MSI issues where it loses 239 * MSI rearms occasionally. This leads to lockups and freezes. 240 * disable it by default. 241 */ 242 if (family == CHIP_RV515) 243 return false; 244 if (flags & RADEON_IS_IGP) { 245 /* APUs work fine with MSIs */ 246 if (family >= CHIP_PALM) 247 return true; 248 /* lots of IGPs have problems with MSIs */ 249 return false; 250 } 251 252 return true; 253 } 254 255 /** 256 * radeon_irq_kms_init - init driver interrupt info 257 * 258 * @rdev: radeon device pointer 259 * 260 * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics). 261 * Returns 0 for success, error for failure. 262 */ 263 int radeon_irq_kms_init(struct radeon_device *rdev) 264 { 265 int r = 0; 266 267 268 lockinit(&rdev->irq.lock, "drm__radeon_device__irq__lock", 0, LK_CANRECURSE); 269 r = drm_vblank_init(rdev->ddev, rdev->num_crtc); 270 if (r) { 271 return r; 272 } 273 /* enable msi */ 274 rdev->msi_enabled = (rdev->ddev->irq_type == PCI_INTR_TYPE_MSI); 275 276 rdev->irq.installed = true; 277 DRM_UNLOCK(rdev->ddev); 278 r = drm_irq_install(rdev->ddev, rdev->ddev->irq); 279 DRM_LOCK(rdev->ddev); 280 if (r) { 281 rdev->irq.installed = false; 282 return r; 283 } 284 285 TASK_INIT(&rdev->hotplug_work, 0, radeon_hotplug_work_func, rdev); 286 TASK_INIT(&rdev->audio_work, 0, r600_audio_update_hdmi, rdev); 287 TASK_INIT(&rdev->reset_work, 0, radeon_irq_reset_work_func, rdev); 288 289 DRM_INFO("radeon: irq initialized.\n"); 290 return 0; 291 } 292 293 /** 294 * radeon_irq_kms_fini - tear down driver interrupt info 295 * 296 * @rdev: radeon device pointer 297 * 298 * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics). 299 */ 300 void radeon_irq_kms_fini(struct radeon_device *rdev) 301 { 302 drm_vblank_cleanup(rdev->ddev); 303 if (rdev->irq.installed) { 304 drm_irq_uninstall(rdev->ddev); 305 rdev->irq.installed = false; 306 } 307 taskqueue_drain(rdev->tq, &rdev->hotplug_work); 308 } 309 310 /** 311 * radeon_irq_kms_sw_irq_get - enable software interrupt 312 * 313 * @rdev: radeon device pointer 314 * @ring: ring whose interrupt you want to enable 315 * 316 * Enables the software interrupt for a specific ring (all asics). 317 * The software interrupt is generally used to signal a fence on 318 * a particular ring. 319 */ 320 void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring) 321 { 322 if (!rdev->ddev->irq_enabled) 323 return; 324 325 if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) { 326 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 327 radeon_irq_set(rdev); 328 lockmgr(&rdev->irq.lock, LK_RELEASE); 329 } 330 } 331 332 /** 333 * radeon_irq_kms_sw_irq_put - disable software interrupt 334 * 335 * @rdev: radeon device pointer 336 * @ring: ring whose interrupt you want to disable 337 * 338 * Disables the software interrupt for a specific ring (all asics). 339 * The software interrupt is generally used to signal a fence on 340 * a particular ring. 341 */ 342 void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring) 343 { 344 if (!rdev->ddev->irq_enabled) 345 return; 346 347 if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) { 348 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 349 radeon_irq_set(rdev); 350 lockmgr(&rdev->irq.lock, LK_RELEASE); 351 } 352 } 353 354 /** 355 * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt 356 * 357 * @rdev: radeon device pointer 358 * @crtc: crtc whose interrupt you want to enable 359 * 360 * Enables the pageflip interrupt for a specific crtc (all asics). 361 * For pageflips we use the vblank interrupt source. 362 */ 363 void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc) 364 { 365 if (crtc < 0 || crtc >= rdev->num_crtc) 366 return; 367 368 if (!rdev->ddev->irq_enabled) 369 return; 370 371 if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) { 372 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 373 radeon_irq_set(rdev); 374 lockmgr(&rdev->irq.lock, LK_RELEASE); 375 } 376 } 377 378 /** 379 * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt 380 * 381 * @rdev: radeon device pointer 382 * @crtc: crtc whose interrupt you want to disable 383 * 384 * Disables the pageflip interrupt for a specific crtc (all asics). 385 * For pageflips we use the vblank interrupt source. 386 */ 387 void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc) 388 { 389 if (crtc < 0 || crtc >= rdev->num_crtc) 390 return; 391 392 if (!rdev->ddev->irq_enabled) 393 return; 394 395 if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) { 396 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 397 radeon_irq_set(rdev); 398 lockmgr(&rdev->irq.lock, LK_RELEASE); 399 } 400 } 401 402 /** 403 * radeon_irq_kms_enable_afmt - enable audio format change interrupt 404 * 405 * @rdev: radeon device pointer 406 * @block: afmt block whose interrupt you want to enable 407 * 408 * Enables the afmt change interrupt for a specific afmt block (all asics). 409 */ 410 void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block) 411 { 412 if (!rdev->ddev->irq_enabled) 413 return; 414 415 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 416 rdev->irq.afmt[block] = true; 417 radeon_irq_set(rdev); 418 lockmgr(&rdev->irq.lock, LK_RELEASE); 419 } 420 421 /** 422 * radeon_irq_kms_disable_afmt - disable audio format change interrupt 423 * 424 * @rdev: radeon device pointer 425 * @block: afmt block whose interrupt you want to disable 426 * 427 * Disables the afmt change interrupt for a specific afmt block (all asics). 428 */ 429 void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block) 430 { 431 if (!rdev->ddev->irq_enabled) 432 return; 433 434 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 435 rdev->irq.afmt[block] = false; 436 radeon_irq_set(rdev); 437 lockmgr(&rdev->irq.lock, LK_RELEASE); 438 } 439 440 /** 441 * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt 442 * 443 * @rdev: radeon device pointer 444 * @hpd_mask: mask of hpd pins you want to enable. 445 * 446 * Enables the hotplug detect interrupt for a specific hpd pin (all asics). 447 */ 448 void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask) 449 { 450 int i; 451 452 if (!rdev->ddev->irq_enabled) 453 return; 454 455 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 456 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i) 457 rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i)); 458 radeon_irq_set(rdev); 459 lockmgr(&rdev->irq.lock, LK_RELEASE); 460 } 461 462 /** 463 * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt 464 * 465 * @rdev: radeon device pointer 466 * @hpd_mask: mask of hpd pins you want to disable. 467 * 468 * Disables the hotplug detect interrupt for a specific hpd pin (all asics). 469 */ 470 void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask) 471 { 472 int i; 473 474 if (!rdev->ddev->irq_enabled) 475 return; 476 477 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 478 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i) 479 rdev->irq.hpd[i] &= !(hpd_mask & (1 << i)); 480 radeon_irq_set(rdev); 481 lockmgr(&rdev->irq.lock, LK_RELEASE); 482 } 483 484