xref: /dragonfly/sys/dev/drm/radeon/radeon_object.h (revision c69bf40f)
1 /*
2  * Copyright 2008 Advanced Micro Devices, Inc.
3  * Copyright 2008 Red Hat Inc.
4  * Copyright 2009 Jerome Glisse.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: Dave Airlie
25  *          Alex Deucher
26  *          Jerome Glisse
27  */
28 
29 #ifndef __RADEON_OBJECT_H__
30 #define __RADEON_OBJECT_H__
31 
32 #include <uapi_drm/radeon_drm.h>
33 #include "radeon.h"
34 
35 /*
36  * Undefine max_offset (defined in vm/vm_map.h), because it conflicts
37  * with an argument of the function radeon_bo_pin_restricted().
38  */
39 #undef max_offset
40 
41 /**
42  * radeon_mem_type_to_domain - return domain corresponding to mem_type
43  * @mem_type:	ttm memory type
44  *
45  * Returns corresponding domain of the ttm mem_type
46  */
47 static inline unsigned radeon_mem_type_to_domain(u32 mem_type)
48 {
49 	switch (mem_type) {
50 	case TTM_PL_VRAM:
51 		return RADEON_GEM_DOMAIN_VRAM;
52 	case TTM_PL_TT:
53 		return RADEON_GEM_DOMAIN_GTT;
54 	case TTM_PL_SYSTEM:
55 		return RADEON_GEM_DOMAIN_CPU;
56 	default:
57 		break;
58 	}
59 	return 0;
60 }
61 
62 int radeon_bo_reserve(struct radeon_bo *bo, bool no_intr);
63 
64 static inline void radeon_bo_unreserve(struct radeon_bo *bo)
65 {
66 	ttm_bo_unreserve(&bo->tbo);
67 }
68 
69 /**
70  * radeon_bo_gpu_offset - return GPU offset of bo
71  * @bo:	radeon object for which we query the offset
72  *
73  * Returns current GPU offset of the object.
74  *
75  * Note: object should either be pinned or reserved when calling this
76  * function, it might be useful to add check for this for debugging.
77  */
78 static inline u64 radeon_bo_gpu_offset(struct radeon_bo *bo)
79 {
80 	return bo->tbo.offset;
81 }
82 
83 static inline unsigned long radeon_bo_size(struct radeon_bo *bo)
84 {
85 	return bo->tbo.num_pages << PAGE_SHIFT;
86 }
87 
88 static inline bool radeon_bo_is_reserved(struct radeon_bo *bo)
89 {
90 	return ttm_bo_is_reserved(&bo->tbo);
91 }
92 
93 static inline unsigned radeon_bo_ngpu_pages(struct radeon_bo *bo)
94 {
95 	return (bo->tbo.num_pages << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
96 }
97 
98 static inline unsigned radeon_bo_gpu_page_alignment(struct radeon_bo *bo)
99 {
100 	return (bo->tbo.mem.page_alignment << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
101 }
102 
103 /**
104  * radeon_bo_mmap_offset - return mmap offset of bo
105  * @bo:	radeon object for which we query the offset
106  *
107  * Returns mmap offset of the object.
108  *
109  * Note: addr_space_offset is constant after ttm bo init thus isn't protected
110  * by any lock.
111  */
112 static inline u64 radeon_bo_mmap_offset(struct radeon_bo *bo)
113 {
114 	return bo->tbo.addr_space_offset;
115 }
116 
117 extern int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type,
118 			  bool no_wait);
119 
120 extern int radeon_bo_create(struct radeon_device *rdev,
121 			    unsigned long size, int byte_align,
122 			    bool kernel, u32 domain, u32 flags,
123 			    struct sg_table *sg,
124 			    struct radeon_bo **bo_ptr);
125 extern int radeon_bo_kmap(struct radeon_bo *bo, void **ptr);
126 extern void radeon_bo_kunmap(struct radeon_bo *bo);
127 extern struct radeon_bo *radeon_bo_ref(struct radeon_bo *bo);
128 extern void radeon_bo_unref(struct radeon_bo **bo);
129 extern int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr);
130 extern int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain,
131 				    u64 max_offset, u64 *gpu_addr);
132 extern int radeon_bo_unpin(struct radeon_bo *bo);
133 extern int radeon_bo_evict_vram(struct radeon_device *rdev);
134 extern void radeon_bo_force_delete(struct radeon_device *rdev);
135 extern int radeon_bo_init(struct radeon_device *rdev);
136 extern void radeon_bo_fini(struct radeon_device *rdev);
137 extern int radeon_bo_list_validate(struct radeon_device *rdev,
138 				   struct ww_acquire_ctx *ticket,
139 				   struct list_head *head, int ring);
140 extern int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
141 				u32 tiling_flags, u32 pitch);
142 extern void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
143 				u32 *tiling_flags, u32 *pitch);
144 extern int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
145 				bool force_drop);
146 extern void radeon_bo_move_notify(struct ttm_buffer_object *bo,
147 				  struct ttm_mem_reg *new_mem);
148 extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
149 extern int radeon_bo_get_surface_reg(struct radeon_bo *bo);
150 
151 /*
152  * sub allocation
153  */
154 
155 static inline uint64_t radeon_sa_bo_gpu_addr(struct radeon_sa_bo *sa_bo)
156 {
157 	return sa_bo->manager->gpu_addr + sa_bo->soffset;
158 }
159 
160 static inline void * radeon_sa_bo_cpu_addr(struct radeon_sa_bo *sa_bo)
161 {
162 	return (char *)sa_bo->manager->cpu_ptr + sa_bo->soffset;
163 }
164 
165 extern int radeon_sa_bo_manager_init(struct radeon_device *rdev,
166 				     struct radeon_sa_manager *sa_manager,
167 				     unsigned size, u32 align, u32 domain,
168 				     u32 flags);
169 extern void radeon_sa_bo_manager_fini(struct radeon_device *rdev,
170 				      struct radeon_sa_manager *sa_manager);
171 extern int radeon_sa_bo_manager_start(struct radeon_device *rdev,
172 				      struct radeon_sa_manager *sa_manager);
173 extern int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
174 					struct radeon_sa_manager *sa_manager);
175 extern int radeon_sa_bo_new(struct radeon_device *rdev,
176 			    struct radeon_sa_manager *sa_manager,
177 			    struct radeon_sa_bo **sa_bo,
178 			    unsigned size, unsigned align);
179 extern void radeon_sa_bo_free(struct radeon_device *rdev,
180 			      struct radeon_sa_bo **sa_bo,
181 			      struct radeon_fence *fence);
182 #if defined(CONFIG_DEBUG_FS)
183 extern void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,
184 					 struct seq_file *m);
185 #endif
186 
187 
188 #endif
189