1 /*- 2 * Copyright (c) 2006-2008 Stanislav Sedov <stas@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 */ 27 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/conf.h> 32 #include <sys/fcntl.h> 33 #include <sys/ioccom.h> 34 #include <sys/malloc.h> 35 #include <sys/module.h> 36 #include <sys/priv.h> 37 #include <sys/proc.h> 38 #include <sys/queue.h> 39 #include <sys/sched.h> 40 #include <sys/kernel.h> 41 #include <sys/sysctl.h> 42 #include <sys/uio.h> 43 #include <sys/cpuctl.h> 44 #include <sys/device.h> 45 #include <sys/thread2.h> 46 47 #include <machine/cpufunc.h> 48 #include <machine/md_var.h> 49 #include <machine/specialreg.h> 50 51 static d_open_t cpuctl_open; 52 static d_ioctl_t cpuctl_ioctl; 53 54 #define CPUCTL_VERSION 1 55 56 #ifdef DEBUG 57 # define DPRINTF(format,...) kprintf(format, __VA_ARGS__); 58 #else 59 # define DPRINTF(format,...) 60 #endif 61 62 #define UCODE_SIZE_MAX (16 * 1024) 63 64 static int cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd); 65 static int cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data); 66 static int cpuctl_do_update(int cpu, cpuctl_update_args_t *data); 67 static int update_intel(int cpu, cpuctl_update_args_t *args); 68 static int update_amd(int cpu, cpuctl_update_args_t *args); 69 static int update_via(int cpu, cpuctl_update_args_t *args); 70 71 static cdev_t *cpuctl_devs; 72 static MALLOC_DEFINE(M_CPUCTL, "cpuctl", "CPUCTL buffer"); 73 74 static struct dev_ops cpuctl_cdevsw = { 75 .d_open = cpuctl_open, 76 .d_ioctl = cpuctl_ioctl, 77 .head = { .name = "cpuctl" }, 78 }; 79 80 int 81 cpuctl_ioctl(struct dev_ioctl_args *ap) 82 { 83 int ret; 84 int cpu = dev2unit(ap->a_head.a_dev); 85 u_long cmd = ap->a_cmd; 86 int flags = ap->a_fflag; 87 caddr_t data = ap->a_data; 88 89 if (cpu >= ncpus) { 90 DPRINTF("[cpuctl,%d]: bad cpu number %d\n", __LINE__, cpu); 91 return (ENXIO); 92 } 93 /* Require write flag for "write" requests. */ 94 if ((cmd == CPUCTL_WRMSR || cmd == CPUCTL_UPDATE) && 95 ((flags & FWRITE) == 0)) 96 return (EPERM); 97 switch (cmd) { 98 case CPUCTL_RDMSR: 99 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd); 100 break; 101 case CPUCTL_MSRSBIT: 102 case CPUCTL_MSRCBIT: 103 case CPUCTL_WRMSR: 104 ret = priv_check(curthread, PRIV_CPUCTL_WRMSR); 105 if (ret != 0) 106 goto fail; 107 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd); 108 break; 109 case CPUCTL_CPUID: 110 ret = cpuctl_do_cpuid(cpu, (cpuctl_cpuid_args_t *)data); 111 break; 112 case CPUCTL_UPDATE: 113 ret = priv_check(curthread, PRIV_CPUCTL_UPDATE); 114 if (ret != 0) 115 goto fail; 116 ret = cpuctl_do_update(cpu, (cpuctl_update_args_t *)data); 117 break; 118 default: 119 ret = EINVAL; 120 break; 121 } 122 fail: 123 return (ret); 124 } 125 126 /* 127 * Actually perform cpuid operation. 128 */ 129 static int 130 cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data) 131 { 132 int oldcpu; 133 134 KASSERT(cpu >= 0 && cpu < ncpus, 135 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 136 137 /* Explicitly clear cpuid data to avoid returning stale info. */ 138 bzero(data->data, sizeof(data->data)); 139 DPRINTF("[cpuctl,%d]: retrieving cpuid level %#0x for %d cpu\n", 140 __LINE__, data->level, cpu); 141 oldcpu = mycpuid; 142 lwkt_migratecpu(cpu); 143 cpuid_count(data->level, 0, data->data); 144 lwkt_migratecpu(oldcpu); 145 return (0); 146 } 147 148 /* 149 * Actually perform MSR operations. 150 */ 151 static int 152 cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd) 153 { 154 uint64_t reg; 155 int oldcpu; 156 int ret; 157 158 KASSERT(cpu >= 0 && cpu < ncpus , 159 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 160 161 /* 162 * Explicitly clear cpuid data to avoid returning stale 163 * info 164 */ 165 DPRINTF("[cpuctl,%d]: operating on MSR %#0x for %d cpu\n", __LINE__, 166 data->msr, cpu); 167 oldcpu = mycpuid; 168 lwkt_migratecpu(cpu); 169 if (cmd == CPUCTL_RDMSR) { 170 data->data = 0; 171 ret = rdmsr_safe(data->msr, &data->data); 172 } else if (cmd == CPUCTL_WRMSR) { 173 ret = wrmsr_safe(data->msr, data->data); 174 } else if (cmd == CPUCTL_MSRSBIT) { 175 crit_enter(); 176 ret = rdmsr_safe(data->msr, ®); 177 if (ret == 0) 178 ret = wrmsr_safe(data->msr, reg | data->data); 179 crit_exit(); 180 } else if (cmd == CPUCTL_MSRCBIT) { 181 crit_enter(); 182 ret = rdmsr_safe(data->msr, ®); 183 if (ret == 0) 184 ret = wrmsr_safe(data->msr, reg & ~data->data); 185 crit_exit(); 186 } else 187 panic("[cpuctl,%d]: unknown operation requested: %lu", __LINE__, cmd); 188 lwkt_migratecpu(oldcpu); 189 return (ret); 190 } 191 192 /* 193 * Actually perform microcode update. 194 */ 195 static int 196 cpuctl_do_update(int cpu, cpuctl_update_args_t *data) 197 { 198 cpuctl_cpuid_args_t args = { 199 .level = 0, 200 }; 201 char vendor[13]; 202 int ret; 203 204 KASSERT(cpu >= 0 && cpu < ncpus, 205 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 206 DPRINTF("[cpuctl,%d]: XXX %d", __LINE__, cpu); 207 208 ret = cpuctl_do_cpuid(cpu, &args); 209 if (ret != 0) { 210 DPRINTF("[cpuctl,%d]: cannot retrieve cpuid info for cpu %d", 211 __LINE__, cpu); 212 return (ENXIO); 213 } 214 ((uint32_t *)vendor)[0] = args.data[1]; 215 ((uint32_t *)vendor)[1] = args.data[3]; 216 ((uint32_t *)vendor)[2] = args.data[2]; 217 vendor[12] = '\0'; 218 if (strncmp(vendor, INTEL_VENDOR_ID, sizeof(INTEL_VENDOR_ID)) == 0) 219 ret = update_intel(cpu, data); 220 else if(strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) == 0) 221 ret = update_amd(cpu, data); 222 else if(strncmp(vendor, CENTAUR_VENDOR_ID, sizeof(CENTAUR_VENDOR_ID)) == 0) 223 ret = update_via(cpu, data); 224 else 225 ret = ENXIO; 226 return (ret); 227 } 228 229 static int 230 update_intel(int cpu, cpuctl_update_args_t *args) 231 { 232 void *ptr; 233 uint64_t rev0, rev1; 234 uint32_t tmp[4]; 235 int oldcpu; 236 int ret; 237 238 if (args->size == 0 || args->data == NULL) { 239 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 240 return (EINVAL); 241 } 242 if (args->size > UCODE_SIZE_MAX) { 243 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 244 return (EINVAL); 245 } 246 247 /* 248 * 16 byte alignment required. Rely on the fact that 249 * malloc(9) always returns the pointer aligned at least on 250 * the size of the allocation. 251 */ 252 ptr = kmalloc(args->size + 16, M_CPUCTL, M_WAITOK); 253 if (copyin(args->data, ptr, args->size) != 0) { 254 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 255 __LINE__, args->data, ptr, args->size); 256 ret = EFAULT; 257 goto fail; 258 } 259 oldcpu = mycpuid; 260 lwkt_migratecpu(cpu); 261 crit_enter(); 262 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */ 263 264 /* 265 * Perform update. 266 */ 267 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr)); 268 wrmsr_safe(MSR_BIOS_SIGN, 0); 269 270 /* 271 * Serialize instruction flow. 272 */ 273 do_cpuid(0, tmp); 274 crit_exit(); 275 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */ 276 lwkt_migratecpu(oldcpu); 277 kprintf("[cpu %d]: updated microcode from rev=0x%x to rev=0x%x\n", cpu, 278 (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32)); 279 280 if (rev1 > rev0) 281 ret = 0; 282 else 283 ret = EEXIST; 284 fail: 285 kfree(ptr, M_CPUCTL); 286 return (ret); 287 } 288 289 static int 290 update_amd(int cpu, cpuctl_update_args_t *args) 291 { 292 void *ptr = NULL; 293 uint32_t tmp[4]; 294 int oldcpu; 295 int ret; 296 297 if (args->size == 0 || args->data == NULL) { 298 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 299 return (EINVAL); 300 } 301 if (args->size > UCODE_SIZE_MAX) { 302 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 303 return (EINVAL); 304 } 305 /* 306 * XXX Might not require contignous address space - needs check 307 */ 308 ptr = contigmalloc(args->size, M_CPUCTL, 0, 0, 0xffffffff, 16, 0); 309 if (ptr == NULL) { 310 DPRINTF("[cpuctl,%d]: cannot allocate %zd bytes of memory", 311 __LINE__, args->size); 312 return (ENOMEM); 313 } 314 if (copyin(args->data, ptr, args->size) != 0) { 315 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 316 __LINE__, args->data, ptr, args->size); 317 ret = EFAULT; 318 goto fail; 319 } 320 oldcpu = mycpuid; 321 lwkt_migratecpu(cpu); 322 crit_enter(); 323 324 /* 325 * Perform update. 326 */ 327 wrmsr_safe(MSR_K8_UCODE_UPDATE, (uintptr_t)ptr); 328 329 /* 330 * Serialize instruction flow. 331 */ 332 do_cpuid(0, tmp); 333 crit_exit(); 334 lwkt_migratecpu(oldcpu); 335 ret = 0; 336 fail: 337 if (ptr != NULL) 338 contigfree(ptr, args->size, M_CPUCTL); 339 return (ret); 340 } 341 342 static int 343 update_via(int cpu, cpuctl_update_args_t *args) 344 { 345 void *ptr; 346 uint64_t rev0, rev1, res; 347 uint32_t tmp[4]; 348 int oldcpu; 349 int ret; 350 351 if (args->size == 0 || args->data == NULL) { 352 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 353 return (EINVAL); 354 } 355 if (args->size > UCODE_SIZE_MAX) { 356 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 357 return (EINVAL); 358 } 359 360 /* 361 * 4 byte alignment required. 362 */ 363 ptr = kmalloc(args->size, M_CPUCTL, M_WAITOK); 364 if (copyin(args->data, ptr, args->size) != 0) { 365 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 366 __LINE__, args->data, ptr, args->size); 367 ret = EFAULT; 368 goto fail; 369 } 370 oldcpu = mycpuid; 371 lwkt_migratecpu(cpu); 372 crit_enter(); 373 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */ 374 375 /* 376 * Perform update. 377 */ 378 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr)); 379 do_cpuid(1, tmp); 380 381 /* 382 * Result are in low byte of MSR FCR5: 383 * 0x00: No update has been attempted since RESET. 384 * 0x01: The last attempted update was successful. 385 * 0x02: The last attempted update was unsuccessful due to a bad 386 * environment. No update was loaded and any preexisting 387 * patches are still active. 388 * 0x03: The last attempted update was not applicable to this processor. 389 * No update was loaded and any preexisting patches are still 390 * active. 391 * 0x04: The last attempted update was not successful due to an invalid 392 * update data block. No update was loaded and any preexisting 393 * patches are still active 394 */ 395 rdmsr_safe(0x1205, &res); 396 res &= 0xff; 397 crit_exit(); 398 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */ 399 lwkt_migratecpu(oldcpu); 400 401 DPRINTF("[cpu,%d]: rev0=%x rev1=%x res=%x\n", __LINE__, 402 (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32), (unsigned)res); 403 404 if (res != 0x01) 405 ret = EINVAL; 406 else 407 ret = 0; 408 fail: 409 kfree(ptr, M_CPUCTL); 410 return (ret); 411 } 412 413 int 414 cpuctl_open(struct dev_open_args *ap) 415 { 416 int ret = 0; 417 int cpu; 418 419 cpu = dev2unit(ap->a_head.a_dev); 420 if (cpu > ncpus) { 421 DPRINTF("[cpuctl,%d]: incorrect cpu number %d\n", __LINE__, 422 cpu); 423 return (ENXIO); 424 } 425 if (ap->a_oflags & FWRITE) 426 ret = securelevel > 0 ? EPERM : 0; 427 return (ret); 428 } 429 430 static int 431 cpuctl_modevent(module_t mod __unused, int type, void *data __unused) 432 { 433 int cpu; 434 435 switch(type) { 436 case MOD_LOAD: 437 if ((cpu_feature & CPUID_MSR) == 0) { 438 if (bootverbose) 439 kprintf("cpuctl: not available.\n"); 440 return (ENODEV); 441 } 442 if (bootverbose) 443 kprintf("cpuctl: access to MSR registers/cpuid info.\n"); 444 cpuctl_devs = (struct cdev **)kmalloc(sizeof(void *) * ncpus, 445 M_CPUCTL, M_WAITOK | M_ZERO); 446 if (cpuctl_devs == NULL) { 447 DPRINTF("[cpuctl,%d]: cannot allocate memory\n", 448 __LINE__); 449 return (ENOMEM); 450 } 451 for (cpu = 0; cpu < ncpus; cpu++) 452 cpuctl_devs[cpu] = make_dev(&cpuctl_cdevsw, cpu, 453 UID_ROOT, GID_KMEM, 0640, "cpuctl%d", cpu); 454 break; 455 case MOD_UNLOAD: 456 for (cpu = 0; cpu < ncpus; cpu++) { 457 if (cpuctl_devs[cpu] != NULL) 458 destroy_dev(cpuctl_devs[cpu]); 459 } 460 kfree(cpuctl_devs, M_CPUCTL); 461 break; 462 case MOD_SHUTDOWN: 463 break; 464 default: 465 return (EOPNOTSUPP); 466 } 467 return (0); 468 } 469 470 DEV_MODULE(cpuctl, cpuctl_modevent, NULL); 471 MODULE_VERSION(cpuctl, CPUCTL_VERSION); 472