1 /*- 2 * Copyright (c) 2006-2008 Stanislav Sedov <stas@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/dev/cpuctl/cpuctl.c 275960 2014-12-20 16:40:49Z kib $ 27 */ 28 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/conf.h> 33 #include <sys/fcntl.h> 34 #include <sys/ioccom.h> 35 #include <sys/malloc.h> 36 #include <sys/module.h> 37 #include <sys/priv.h> 38 #include <sys/proc.h> 39 #include <sys/queue.h> 40 #include <sys/sched.h> 41 #include <sys/kernel.h> 42 #include <sys/sysctl.h> 43 #include <sys/uio.h> 44 #include <sys/cpuctl.h> 45 #include <sys/device.h> 46 #include <sys/thread2.h> 47 48 #include <machine/cpufunc.h> 49 #include <machine/md_var.h> 50 #include <machine/specialreg.h> 51 52 static d_open_t cpuctl_open; 53 static d_ioctl_t cpuctl_ioctl; 54 55 #define CPUCTL_VERSION 1 56 57 #ifdef DEBUG 58 # define DPRINTF(format,...) kprintf(format, __VA_ARGS__); 59 #else 60 # define DPRINTF(format,...) 61 #endif 62 63 #define UCODE_SIZE_MAX (32 * 1024) 64 65 static int cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd); 66 static void cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data); 67 static void cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data); 68 static int cpuctl_do_update(int cpu, cpuctl_update_args_t *data); 69 static int update_intel(int cpu, cpuctl_update_args_t *args); 70 static int update_amd(int cpu, cpuctl_update_args_t *args); 71 static int update_via(int cpu, cpuctl_update_args_t *args); 72 73 static cdev_t *cpuctl_devs; 74 static MALLOC_DEFINE(M_CPUCTL, "cpuctl", "CPUCTL buffer"); 75 76 static struct dev_ops cpuctl_cdevsw = { 77 .d_open = cpuctl_open, 78 .d_ioctl = cpuctl_ioctl, 79 .head = { .name = "cpuctl" }, 80 }; 81 82 int 83 cpuctl_ioctl(struct dev_ioctl_args *ap) 84 { 85 int ret; 86 int cpu = dev2unit(ap->a_head.a_dev); 87 u_long cmd = ap->a_cmd; 88 int flags = ap->a_fflag; 89 caddr_t data = ap->a_data; 90 91 if (cpu >= ncpus) { 92 DPRINTF("[cpuctl,%d]: bad cpu number %d\n", __LINE__, cpu); 93 return (ENXIO); 94 } 95 /* Require write flag for "write" requests. */ 96 if ((cmd == CPUCTL_WRMSR || cmd == CPUCTL_UPDATE) && 97 ((flags & FWRITE) == 0)) 98 return (EPERM); 99 switch (cmd) { 100 case CPUCTL_RDMSR: 101 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd); 102 break; 103 case CPUCTL_MSRSBIT: 104 case CPUCTL_MSRCBIT: 105 case CPUCTL_WRMSR: 106 ret = priv_check(curthread, PRIV_CPUCTL_WRMSR); 107 if (ret != 0) 108 goto fail; 109 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd); 110 break; 111 case CPUCTL_CPUID: 112 cpuctl_do_cpuid(cpu, (cpuctl_cpuid_args_t *)data); 113 ret = 0; 114 break; 115 case CPUCTL_UPDATE: 116 ret = priv_check(curthread, PRIV_CPUCTL_UPDATE); 117 if (ret != 0) 118 goto fail; 119 ret = cpuctl_do_update(cpu, (cpuctl_update_args_t *)data); 120 break; 121 case CPUCTL_CPUID_COUNT: 122 cpuctl_do_cpuid_count(cpu, (cpuctl_cpuid_count_args_t *)data); 123 ret = 0; 124 break; 125 default: 126 ret = EINVAL; 127 break; 128 } 129 fail: 130 return (ret); 131 } 132 133 /* 134 * Actually perform cpuid operation. 135 */ 136 static void 137 cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data) 138 { 139 int oldcpu; 140 141 KASSERT(cpu >= 0 && cpu < ncpus, 142 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 143 144 /* Explicitly clear cpuid data to avoid returning stale info. */ 145 bzero(data->data, sizeof(data->data)); 146 DPRINTF("[cpuctl,%d]: retrieving cpuid lev %#0x type %#0x for %d cpu\n", 147 __LINE__, data->level, data->level_type, cpu); 148 oldcpu = mycpuid; 149 lwkt_migratecpu(cpu); 150 cpuid_count(data->level, data->level_type, data->data); 151 lwkt_migratecpu(oldcpu); 152 } 153 154 static void 155 cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data) 156 { 157 cpuctl_cpuid_count_args_t cdata; 158 159 cdata.level = data->level; 160 /* Override the level type. */ 161 cdata.level_type = 0; 162 cpuctl_do_cpuid_count(cpu, &cdata); 163 bcopy(cdata.data, data->data, sizeof(data->data)); /* Ignore error */ 164 } 165 166 /* 167 * Actually perform MSR operations. 168 */ 169 static int 170 cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd) 171 { 172 uint64_t reg; 173 int oldcpu; 174 int ret; 175 176 KASSERT(cpu >= 0 && cpu < ncpus, 177 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 178 179 /* 180 * Explicitly clear cpuid data to avoid returning stale 181 * info 182 */ 183 DPRINTF("[cpuctl,%d]: operating on MSR %#0x for %d cpu\n", __LINE__, 184 data->msr, cpu); 185 oldcpu = mycpuid; 186 lwkt_migratecpu(cpu); 187 if (cmd == CPUCTL_RDMSR) { 188 data->data = 0; 189 ret = rdmsr_safe(data->msr, &data->data); 190 } else if (cmd == CPUCTL_WRMSR) { 191 ret = wrmsr_safe(data->msr, data->data); 192 } else if (cmd == CPUCTL_MSRSBIT) { 193 crit_enter(); 194 ret = rdmsr_safe(data->msr, ®); 195 if (ret == 0) 196 ret = wrmsr_safe(data->msr, reg | data->data); 197 crit_exit(); 198 } else if (cmd == CPUCTL_MSRCBIT) { 199 crit_enter(); 200 ret = rdmsr_safe(data->msr, ®); 201 if (ret == 0) 202 ret = wrmsr_safe(data->msr, reg & ~data->data); 203 crit_exit(); 204 } else 205 panic("[cpuctl,%d]: unknown operation requested: %lu", __LINE__, cmd); 206 lwkt_migratecpu(oldcpu); 207 return (ret); 208 } 209 210 /* 211 * Actually perform microcode update. 212 */ 213 static int 214 cpuctl_do_update(int cpu, cpuctl_update_args_t *data) 215 { 216 cpuctl_cpuid_args_t args = { 217 .level = 0, 218 }; 219 char vendor[13]; 220 int ret; 221 222 KASSERT(cpu >= 0 && cpu < ncpus, 223 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 224 DPRINTF("[cpuctl,%d]: XXX %d", __LINE__, cpu); 225 226 cpuctl_do_cpuid(cpu, &args); 227 ((uint32_t *)vendor)[0] = args.data[1]; 228 ((uint32_t *)vendor)[1] = args.data[3]; 229 ((uint32_t *)vendor)[2] = args.data[2]; 230 vendor[12] = '\0'; 231 if (strncmp(vendor, INTEL_VENDOR_ID, sizeof(INTEL_VENDOR_ID)) == 0) 232 ret = update_intel(cpu, data); 233 else if(strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) == 0) 234 ret = update_amd(cpu, data); 235 else if(strncmp(vendor, CENTAUR_VENDOR_ID, sizeof(CENTAUR_VENDOR_ID)) == 0) 236 ret = update_via(cpu, data); 237 else 238 ret = ENXIO; 239 return (ret); 240 } 241 242 static int 243 update_intel(int cpu, cpuctl_update_args_t *args) 244 { 245 void *ptr; 246 uint64_t rev0, rev1; 247 uint32_t tmp[4]; 248 int oldcpu; 249 int ret; 250 251 if (args->size == 0 || args->data == NULL) { 252 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 253 return (EINVAL); 254 } 255 if (args->size > UCODE_SIZE_MAX) { 256 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 257 return (EINVAL); 258 } 259 260 /* 261 * 16 byte alignment required. Rely on the fact that 262 * malloc(9) always returns the pointer aligned at least on 263 * the size of the allocation. 264 */ 265 ptr = kmalloc(args->size + 16, M_CPUCTL, M_WAITOK); 266 if (copyin(args->data, ptr, args->size) != 0) { 267 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 268 __LINE__, args->data, ptr, args->size); 269 ret = EFAULT; 270 goto fail; 271 } 272 oldcpu = mycpuid; 273 lwkt_migratecpu(cpu); 274 crit_enter(); 275 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */ 276 277 /* 278 * Perform update. 279 */ 280 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr)); 281 wrmsr_safe(MSR_BIOS_SIGN, 0); 282 283 /* 284 * Serialize instruction flow. 285 */ 286 do_cpuid(0, tmp); 287 crit_exit(); 288 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */ 289 lwkt_migratecpu(oldcpu); 290 kprintf("[cpu %d]: updated microcode from rev=0x%x to rev=0x%x\n", cpu, 291 (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32)); 292 293 if (rev1 > rev0) 294 ret = 0; 295 else 296 ret = EEXIST; 297 fail: 298 kfree(ptr, M_CPUCTL); 299 return (ret); 300 } 301 302 static int 303 update_amd(int cpu, cpuctl_update_args_t *args) 304 { 305 void *ptr = NULL; 306 uint32_t tmp[4]; 307 int oldcpu; 308 int ret; 309 310 if (args->size == 0 || args->data == NULL) { 311 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 312 return (EINVAL); 313 } 314 if (args->size > UCODE_SIZE_MAX) { 315 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 316 return (EINVAL); 317 } 318 /* 319 * XXX Might not require contignous address space - needs check 320 */ 321 ptr = contigmalloc(args->size, M_CPUCTL, 0, 0, 0xffffffff, 16, 0); 322 if (ptr == NULL) { 323 DPRINTF("[cpuctl,%d]: cannot allocate %zd bytes of memory", 324 __LINE__, args->size); 325 return (ENOMEM); 326 } 327 if (copyin(args->data, ptr, args->size) != 0) { 328 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 329 __LINE__, args->data, ptr, args->size); 330 ret = EFAULT; 331 goto fail; 332 } 333 oldcpu = mycpuid; 334 lwkt_migratecpu(cpu); 335 crit_enter(); 336 337 /* 338 * Perform update. 339 */ 340 wrmsr_safe(MSR_K8_UCODE_UPDATE, (uintptr_t)ptr); 341 342 /* 343 * Serialize instruction flow. 344 */ 345 do_cpuid(0, tmp); 346 crit_exit(); 347 lwkt_migratecpu(oldcpu); 348 ret = 0; 349 fail: 350 if (ptr != NULL) 351 contigfree(ptr, args->size, M_CPUCTL); 352 return (ret); 353 } 354 355 static int 356 update_via(int cpu, cpuctl_update_args_t *args) 357 { 358 void *ptr; 359 uint64_t rev0, rev1, res; 360 uint32_t tmp[4]; 361 int oldcpu; 362 int ret; 363 364 if (args->size == 0 || args->data == NULL) { 365 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 366 return (EINVAL); 367 } 368 if (args->size > UCODE_SIZE_MAX) { 369 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 370 return (EINVAL); 371 } 372 373 /* 374 * 4 byte alignment required. 375 */ 376 ptr = kmalloc(args->size, M_CPUCTL, M_WAITOK); 377 if (copyin(args->data, ptr, args->size) != 0) { 378 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 379 __LINE__, args->data, ptr, args->size); 380 ret = EFAULT; 381 goto fail; 382 } 383 oldcpu = mycpuid; 384 lwkt_migratecpu(cpu); 385 crit_enter(); 386 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */ 387 388 /* 389 * Perform update. 390 */ 391 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr)); 392 do_cpuid(1, tmp); 393 394 /* 395 * Result are in low byte of MSR FCR5: 396 * 0x00: No update has been attempted since RESET. 397 * 0x01: The last attempted update was successful. 398 * 0x02: The last attempted update was unsuccessful due to a bad 399 * environment. No update was loaded and any preexisting 400 * patches are still active. 401 * 0x03: The last attempted update was not applicable to this processor. 402 * No update was loaded and any preexisting patches are still 403 * active. 404 * 0x04: The last attempted update was not successful due to an invalid 405 * update data block. No update was loaded and any preexisting 406 * patches are still active 407 */ 408 rdmsr_safe(0x1205, &res); 409 res &= 0xff; 410 crit_exit(); 411 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */ 412 lwkt_migratecpu(oldcpu); 413 414 DPRINTF("[cpu,%d]: rev0=%x rev1=%x res=%x\n", __LINE__, 415 (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32), (unsigned)res); 416 417 if (res != 0x01) 418 ret = EINVAL; 419 else 420 ret = 0; 421 fail: 422 kfree(ptr, M_CPUCTL); 423 return (ret); 424 } 425 426 int 427 cpuctl_open(struct dev_open_args *ap) 428 { 429 int ret = 0; 430 int cpu; 431 432 cpu = dev2unit(ap->a_head.a_dev); 433 if (cpu >= ncpus) { 434 DPRINTF("[cpuctl,%d]: incorrect cpu number %d\n", __LINE__, 435 cpu); 436 return (ENXIO); 437 } 438 if (ap->a_oflags & FWRITE) 439 ret = securelevel > 0 ? EPERM : 0; 440 return (ret); 441 } 442 443 static int 444 cpuctl_modevent(module_t mod __unused, int type, void *data __unused) 445 { 446 int cpu; 447 448 switch(type) { 449 case MOD_LOAD: 450 if ((cpu_feature & CPUID_MSR) == 0) { 451 if (bootverbose) 452 kprintf("cpuctl: not available.\n"); 453 return (ENODEV); 454 } 455 if (bootverbose) 456 kprintf("cpuctl: access to MSR registers/cpuid info.\n"); 457 cpuctl_devs = kmalloc(sizeof(*cpuctl_devs) * ncpus, M_CPUCTL, 458 M_WAITOK | M_ZERO); 459 for (cpu = 0; cpu < ncpus; cpu++) 460 cpuctl_devs[cpu] = make_dev(&cpuctl_cdevsw, cpu, 461 UID_ROOT, GID_KMEM, 0640, "cpuctl%d", cpu); 462 break; 463 case MOD_UNLOAD: 464 for (cpu = 0; cpu < ncpus; cpu++) { 465 if (cpuctl_devs[cpu] != NULL) 466 destroy_dev(cpuctl_devs[cpu]); 467 } 468 kfree(cpuctl_devs, M_CPUCTL); 469 break; 470 case MOD_SHUTDOWN: 471 break; 472 default: 473 return (EOPNOTSUPP); 474 } 475 return (0); 476 } 477 478 DEV_MODULE(cpuctl, cpuctl_modevent, NULL); 479 MODULE_VERSION(cpuctl, CPUCTL_VERSION); 480