1 /*- 2 * Copyright (c) 2006-2008 Stanislav Sedov <stas@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/dev/cpuctl/cpuctl.c 275960 2014-12-20 16:40:49Z kib $ 27 */ 28 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/conf.h> 33 #include <sys/fcntl.h> 34 #include <sys/malloc.h> 35 #include <sys/module.h> 36 #include <sys/priv.h> 37 #include <sys/proc.h> 38 #include <sys/queue.h> 39 #include <sys/sched.h> 40 #include <sys/kernel.h> 41 #include <sys/sysctl.h> 42 #include <sys/uio.h> 43 #include <sys/cpuctl.h> 44 #include <sys/device.h> 45 #include <sys/thread2.h> 46 47 #include <machine/cpufunc.h> 48 #include <machine/md_var.h> 49 #include <machine/specialreg.h> 50 51 static d_open_t cpuctl_open; 52 static d_ioctl_t cpuctl_ioctl; 53 54 #define CPUCTL_VERSION 1 55 56 #ifdef DEBUG 57 # define DPRINTF(format,...) kprintf(format, __VA_ARGS__); 58 #else 59 # define DPRINTF(format,...) 60 #endif 61 62 #define UCODE_SIZE_MAX (4 * 1024 * 1024) 63 64 static int cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd); 65 static void cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data); 66 static void cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data); 67 static int cpuctl_do_update(int cpu, cpuctl_update_args_t *data); 68 static int update_intel(int cpu, cpuctl_update_args_t *args); 69 static int update_amd(int cpu, cpuctl_update_args_t *args); 70 static int update_via(int cpu, cpuctl_update_args_t *args); 71 72 static cdev_t *cpuctl_devs; 73 static MALLOC_DEFINE(M_CPUCTL, "cpuctl", "CPUCTL buffer"); 74 static struct lock cpuctl_lock = LOCK_INITIALIZER("cpuctl", 0, 0); 75 76 static struct dev_ops cpuctl_cdevsw = { 77 .head = { .name = "cpuctl", .flags = D_MPSAFE }, 78 .d_open = cpuctl_open, 79 .d_ioctl = cpuctl_ioctl, 80 }; 81 82 int 83 cpuctl_ioctl(struct dev_ioctl_args *ap) 84 { 85 int ret; 86 int cpu = dev2unit(ap->a_head.a_dev); 87 u_long cmd = ap->a_cmd; 88 int flags = ap->a_fflag; 89 caddr_t data = ap->a_data; 90 91 if (cpu >= ncpus) { 92 DPRINTF("[cpuctl,%d]: bad cpu number %d\n", __LINE__, cpu); 93 return (ENXIO); 94 } 95 /* Require write flag for "write" requests. */ 96 if ((cmd == CPUCTL_WRMSR || cmd == CPUCTL_UPDATE || 97 cmd == CPUCTL_MSRSBIT || cmd == CPUCTL_MSRCBIT) && 98 ((flags & FWRITE) == 0)) 99 return (EPERM); 100 101 lockmgr(&cpuctl_lock, LK_EXCLUSIVE); 102 103 switch (cmd) { 104 case CPUCTL_RDMSR: 105 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd); 106 break; 107 case CPUCTL_MSRSBIT: 108 case CPUCTL_MSRCBIT: 109 case CPUCTL_WRMSR: 110 ret = priv_check(curthread, PRIV_CPUCTL_WRMSR); 111 if (ret != 0) 112 goto fail; 113 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd); 114 break; 115 case CPUCTL_CPUID: 116 cpuctl_do_cpuid(cpu, (cpuctl_cpuid_args_t *)data); 117 ret = 0; 118 break; 119 case CPUCTL_UPDATE: 120 ret = priv_check(curthread, PRIV_CPUCTL_UPDATE); 121 if (ret != 0) 122 goto fail; 123 ret = cpuctl_do_update(cpu, (cpuctl_update_args_t *)data); 124 break; 125 case CPUCTL_CPUID_COUNT: 126 cpuctl_do_cpuid_count(cpu, (cpuctl_cpuid_count_args_t *)data); 127 ret = 0; 128 break; 129 default: 130 ret = EINVAL; 131 break; 132 } 133 fail: 134 lockmgr(&cpuctl_lock, LK_RELEASE); 135 136 return (ret); 137 } 138 139 /* 140 * Actually perform cpuid operation. 141 */ 142 static void 143 cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data) 144 { 145 int oldcpu; 146 147 KASSERT(cpu >= 0 && cpu < ncpus, 148 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 149 150 /* Explicitly clear cpuid data to avoid returning stale info. */ 151 bzero(data->data, sizeof(data->data)); 152 DPRINTF("[cpuctl,%d]: retrieving cpuid lev %#0x type %#0x for %d cpu\n", 153 __LINE__, data->level, data->level_type, cpu); 154 oldcpu = mycpuid; 155 lwkt_migratecpu(cpu); 156 cpuid_count(data->level, data->level_type, data->data); 157 lwkt_migratecpu(oldcpu); 158 } 159 160 static void 161 cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data) 162 { 163 cpuctl_cpuid_count_args_t cdata; 164 165 cdata.level = data->level; 166 /* Override the level type. */ 167 cdata.level_type = 0; 168 cpuctl_do_cpuid_count(cpu, &cdata); 169 bcopy(cdata.data, data->data, sizeof(data->data)); /* Ignore error */ 170 } 171 172 /* 173 * Actually perform MSR operations. 174 */ 175 static int 176 cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd) 177 { 178 uint64_t reg; 179 int oldcpu; 180 int ret; 181 182 KASSERT(cpu >= 0 && cpu < ncpus, 183 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 184 185 /* 186 * Explicitly clear cpuid data to avoid returning stale 187 * info 188 */ 189 DPRINTF("[cpuctl,%d]: operating on MSR %#0x for %d cpu\n", __LINE__, 190 data->msr, cpu); 191 oldcpu = mycpuid; 192 lwkt_migratecpu(cpu); 193 if (cmd == CPUCTL_RDMSR) { 194 data->data = 0; 195 ret = rdmsr_safe(data->msr, &data->data); 196 } else if (cmd == CPUCTL_WRMSR) { 197 ret = wrmsr_safe(data->msr, data->data); 198 } else if (cmd == CPUCTL_MSRSBIT) { 199 crit_enter(); 200 ret = rdmsr_safe(data->msr, ®); 201 if (ret == 0) 202 ret = wrmsr_safe(data->msr, reg | data->data); 203 crit_exit(); 204 } else if (cmd == CPUCTL_MSRCBIT) { 205 crit_enter(); 206 ret = rdmsr_safe(data->msr, ®); 207 if (ret == 0) 208 ret = wrmsr_safe(data->msr, reg & ~data->data); 209 crit_exit(); 210 } else 211 panic("[cpuctl,%d]: unknown operation requested: %lu", __LINE__, cmd); 212 lwkt_migratecpu(oldcpu); 213 return (ret); 214 } 215 216 /* 217 * Actually perform microcode update. 218 */ 219 static int 220 cpuctl_do_update(int cpu, cpuctl_update_args_t *data) 221 { 222 cpuctl_cpuid_args_t args = { 223 .level = 0, 224 }; 225 char vendor[13]; 226 int ret; 227 228 KASSERT(cpu >= 0 && cpu < ncpus, 229 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 230 DPRINTF("[cpuctl,%d]: XXX %d", __LINE__, cpu); 231 232 cpuctl_do_cpuid(cpu, &args); 233 ((uint32_t *)vendor)[0] = args.data[1]; 234 ((uint32_t *)vendor)[1] = args.data[3]; 235 ((uint32_t *)vendor)[2] = args.data[2]; 236 vendor[12] = '\0'; 237 if (strncmp(vendor, INTEL_VENDOR_ID, sizeof(INTEL_VENDOR_ID)) == 0) 238 ret = update_intel(cpu, data); 239 else if(strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) == 0) 240 ret = update_amd(cpu, data); 241 else if(strncmp(vendor, CENTAUR_VENDOR_ID, sizeof(CENTAUR_VENDOR_ID)) == 0) 242 ret = update_via(cpu, data); 243 else 244 ret = ENXIO; 245 return (ret); 246 } 247 248 static int 249 update_intel(int cpu, cpuctl_update_args_t *args) 250 { 251 void *ptr; 252 uint64_t rev0, rev1; 253 uint32_t tmp[4]; 254 int oldcpu; 255 int ret; 256 257 if (args->size == 0 || args->data == NULL) { 258 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 259 return (EINVAL); 260 } 261 if (args->size > UCODE_SIZE_MAX) { 262 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 263 return (EINVAL); 264 } 265 266 /* 267 * 16 byte alignment required. Rely on the fact that 268 * malloc(9) always returns the pointer aligned at least on 269 * the size of the allocation. 270 */ 271 ptr = kmalloc(args->size + 16, M_CPUCTL, M_WAITOK); 272 if (copyin(args->data, ptr, args->size) != 0) { 273 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 274 __LINE__, args->data, ptr, args->size); 275 ret = EFAULT; 276 goto fail; 277 } 278 oldcpu = mycpuid; 279 lwkt_migratecpu(cpu); 280 crit_enter(); 281 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */ 282 283 /* 284 * Perform update. 285 */ 286 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr)); 287 wrmsr_safe(MSR_BIOS_SIGN, 0); 288 289 /* 290 * Serialize instruction flow. 291 */ 292 do_cpuid(0, tmp); 293 crit_exit(); 294 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */ 295 lwkt_migratecpu(oldcpu); 296 kprintf("[cpu %d]: updated microcode from rev=0x%x to rev=0x%x\n", cpu, 297 (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32)); 298 299 if (rev1 > rev0) 300 ret = 0; 301 else 302 ret = EEXIST; 303 fail: 304 kfree(ptr, M_CPUCTL); 305 return (ret); 306 } 307 308 static int 309 update_amd(int cpu, cpuctl_update_args_t *args) 310 { 311 void *ptr = NULL; 312 uint32_t tmp[4]; 313 int oldcpu; 314 int ret; 315 316 if (args->size == 0 || args->data == NULL) { 317 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 318 return (EINVAL); 319 } 320 if (args->size > UCODE_SIZE_MAX) { 321 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 322 return (EINVAL); 323 } 324 /* 325 * XXX Might not require contignous address space - needs check 326 */ 327 ptr = contigmalloc(args->size, M_CPUCTL, 0, 0, 0xffffffff, 16, 0); 328 if (ptr == NULL) { 329 DPRINTF("[cpuctl,%d]: cannot allocate %zd bytes of memory", 330 __LINE__, args->size); 331 return (ENOMEM); 332 } 333 if (copyin(args->data, ptr, args->size) != 0) { 334 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 335 __LINE__, args->data, ptr, args->size); 336 ret = EFAULT; 337 goto fail; 338 } 339 oldcpu = mycpuid; 340 lwkt_migratecpu(cpu); 341 crit_enter(); 342 343 /* 344 * Perform update. 345 */ 346 wrmsr_safe(MSR_K8_UCODE_UPDATE, (uintptr_t)ptr); 347 348 /* 349 * Serialize instruction flow. 350 */ 351 do_cpuid(0, tmp); 352 crit_exit(); 353 lwkt_migratecpu(oldcpu); 354 ret = 0; 355 fail: 356 if (ptr != NULL) 357 contigfree(ptr, args->size, M_CPUCTL); 358 return (ret); 359 } 360 361 static int 362 update_via(int cpu, cpuctl_update_args_t *args) 363 { 364 void *ptr; 365 uint64_t rev0, rev1, res; 366 uint32_t tmp[4]; 367 int oldcpu; 368 int ret; 369 370 if (args->size == 0 || args->data == NULL) { 371 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 372 return (EINVAL); 373 } 374 if (args->size > UCODE_SIZE_MAX) { 375 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 376 return (EINVAL); 377 } 378 379 /* 380 * 4 byte alignment required. 381 */ 382 ptr = kmalloc(args->size, M_CPUCTL, M_WAITOK); 383 if (copyin(args->data, ptr, args->size) != 0) { 384 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 385 __LINE__, args->data, ptr, args->size); 386 ret = EFAULT; 387 goto fail; 388 } 389 oldcpu = mycpuid; 390 lwkt_migratecpu(cpu); 391 crit_enter(); 392 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */ 393 394 /* 395 * Perform update. 396 */ 397 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr)); 398 do_cpuid(1, tmp); 399 400 /* 401 * Result are in low byte of MSR FCR5: 402 * 0x00: No update has been attempted since RESET. 403 * 0x01: The last attempted update was successful. 404 * 0x02: The last attempted update was unsuccessful due to a bad 405 * environment. No update was loaded and any preexisting 406 * patches are still active. 407 * 0x03: The last attempted update was not applicable to this processor. 408 * No update was loaded and any preexisting patches are still 409 * active. 410 * 0x04: The last attempted update was not successful due to an invalid 411 * update data block. No update was loaded and any preexisting 412 * patches are still active 413 */ 414 rdmsr_safe(0x1205, &res); 415 res &= 0xff; 416 crit_exit(); 417 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */ 418 lwkt_migratecpu(oldcpu); 419 420 DPRINTF("[cpu,%d]: rev0=%x rev1=%x res=%x\n", __LINE__, 421 (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32), (unsigned)res); 422 423 if (res != 0x01) 424 ret = EINVAL; 425 else 426 ret = 0; 427 fail: 428 kfree(ptr, M_CPUCTL); 429 return (ret); 430 } 431 432 int 433 cpuctl_open(struct dev_open_args *ap) 434 { 435 int ret = 0; 436 int cpu; 437 438 cpu = dev2unit(ap->a_head.a_dev); 439 if (cpu >= ncpus) { 440 DPRINTF("[cpuctl,%d]: incorrect cpu number %d\n", __LINE__, 441 cpu); 442 return (ENXIO); 443 } 444 if (ap->a_oflags & FWRITE) 445 ret = securelevel > 0 ? EPERM : 0; 446 return (ret); 447 } 448 449 static int 450 cpuctl_modevent(module_t mod __unused, int type, void *data __unused) 451 { 452 int cpu; 453 454 switch(type) { 455 case MOD_LOAD: 456 if ((cpu_feature & CPUID_MSR) == 0) { 457 if (bootverbose) 458 kprintf("cpuctl: not available.\n"); 459 return (ENODEV); 460 } 461 if (bootverbose) 462 kprintf("cpuctl: access to MSR registers/cpuid info.\n"); 463 cpuctl_devs = kmalloc(sizeof(*cpuctl_devs) * ncpus, M_CPUCTL, 464 M_WAITOK | M_ZERO); 465 for (cpu = 0; cpu < ncpus; cpu++) 466 cpuctl_devs[cpu] = make_dev(&cpuctl_cdevsw, cpu, 467 UID_ROOT, GID_KMEM, 0640, "cpuctl%d", cpu); 468 break; 469 case MOD_UNLOAD: 470 for (cpu = 0; cpu < ncpus; cpu++) { 471 if (cpuctl_devs[cpu] != NULL) 472 destroy_dev(cpuctl_devs[cpu]); 473 } 474 kfree(cpuctl_devs, M_CPUCTL); 475 break; 476 case MOD_SHUTDOWN: 477 break; 478 default: 479 return (EOPNOTSUPP); 480 } 481 return (0); 482 } 483 484 DEV_MODULE(cpuctl, cpuctl_modevent, NULL); 485 MODULE_VERSION(cpuctl, CPUCTL_VERSION); 486