1 /* 2 * Copyright (c) 2006 The DragonFly Project. All rights reserved. 3 * 4 * This code is derived from software contributed to The DragonFly Project 5 * by Matthew Dillon <dillon@backplane.com>. AMD register addresses and 6 * values were pulled from MemTest-86 and Linux. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in 16 * the documentation and/or other materials provided with the 17 * distribution. 18 * 3. Neither the name of The DragonFly Project nor the names of its 19 * contributors may be used to endorse or promote products derived 20 * from this software without specific, prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 25 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 26 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 28 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 30 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 32 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/bus.h> 39 #include <sys/kernel.h> 40 #include <sys/malloc.h> 41 42 #include <bus/pci/pcivar.h> 43 #include <bus/pci/pcireg.h> 44 #include <bus/pci/pci_cfgreg.h> 45 #include <bus/pci/pcib_private.h> 46 47 #include "pcib_if.h" 48 49 struct ecc_amd8000_memctrl { 50 uint16_t vid; 51 uint16_t did; 52 const char *desc; 53 }; 54 55 struct ecc_amd8000_softc { 56 device_t ecc_dev; 57 struct callout ecc_callout; 58 }; 59 60 #define ecc_printf(sc, fmt, arg...) \ 61 device_printf((sc)->ecc_dev, fmt , ##arg) 62 63 static void ecc_amd8000_callout(void *); 64 static void ecc_amd8000_stop(device_t); 65 66 static int ecc_amd8000_probe(device_t); 67 static int ecc_amd8000_attach(device_t); 68 static int ecc_amd8000_detach(device_t); 69 static void ecc_amd8000_shutdown(device_t); 70 71 static const struct ecc_amd8000_memctrl ecc_memctrls[] = { 72 { 0x1022, 0x1100, "AMD 8000 memory controller" }, 73 { 0x1022, 0x7454, "AMD 8151 memory controller" }, 74 { 0, 0, NULL } /* required last entry */ 75 }; 76 77 static device_method_t ecc_amd8000_methods[] = { 78 /* Device interface */ 79 DEVMETHOD(device_probe, ecc_amd8000_probe), 80 DEVMETHOD(device_attach, ecc_amd8000_attach), 81 DEVMETHOD(device_detach, ecc_amd8000_detach), 82 DEVMETHOD(device_shutdown, ecc_amd8000_shutdown), 83 DEVMETHOD(device_suspend, bus_generic_suspend), 84 DEVMETHOD(device_resume, bus_generic_resume), 85 DEVMETHOD_END 86 }; 87 88 static driver_t ecc_amd8000_driver = { 89 "ecc", 90 ecc_amd8000_methods, 91 sizeof(struct ecc_amd8000_softc) 92 }; 93 static devclass_t ecc_devclass; 94 DRIVER_MODULE(ecc_amd8000, pci, ecc_amd8000_driver, ecc_devclass, NULL, NULL); 95 MODULE_DEPEND(ecc_amd8000, pci, 1, 1, 1); 96 MODULE_VERSION(ecc_amd8000, 1); 97 98 static int 99 ecc_amd8000_probe(device_t dev) 100 { 101 const struct ecc_amd8000_memctrl *mc; 102 uint16_t vid, did; 103 104 vid = pci_get_vendor(dev); 105 did = pci_get_device(dev); 106 107 for (mc = ecc_memctrls; mc->desc != NULL; ++mc) { 108 if (mc->vid == vid && mc->did == did) { 109 device_set_desc(dev, mc->desc); 110 return (0); 111 } 112 } 113 return (ENXIO); 114 } 115 116 static int 117 ecc_amd8000_attach(device_t dev) 118 { 119 struct ecc_amd8000_softc *sc = device_get_softc(dev); 120 uint32_t draminfo, eccinfo; 121 int bus, slot, poll = 0; 122 123 callout_init_mp(&sc->ecc_callout); 124 sc->ecc_dev = dev; 125 126 bus = pci_get_bus(dev); 127 slot = pci_get_slot(dev); 128 129 /* 130 * The memory bridge is recognized as four PCI devices 131 * using function codes 0, 1, 2, and 3. We probe for the 132 * device at function code 0 and assume that all four exist. 133 */ 134 draminfo = pcib_read_config(dev, bus, slot, 2, 0x90, 4); 135 eccinfo = pcib_read_config(dev, bus, slot, 3, 0x44, 4); 136 137 if ((draminfo >> 17) & 1) 138 ecc_printf(sc, "memory type: ECC\n"); 139 else 140 ecc_printf(sc, "memory type: NON-ECC\n"); 141 switch((eccinfo >> 22) & 3) { 142 case 0: 143 ecc_printf(sc, "ecc mode: DISABLED\n"); 144 break; 145 case 1: 146 ecc_printf(sc, "ecc mode: ENABLED/CORRECT-MODE\n"); 147 poll = 1; 148 break; 149 case 2: 150 ecc_printf(sc, "ecc mode: ENABLED/RESERVED (disabled)\n"); 151 break; 152 case 3: 153 ecc_printf(sc, "ecc mode: ENABLED/CHIPKILL-MODE\n"); 154 poll = 1; 155 break; 156 } 157 158 /* 159 * Enable ECC logging and clear any previous error. 160 */ 161 if (poll) { 162 uint64_t v64; 163 uint32_t v32; 164 165 v64 = rdmsr(0x017B); 166 wrmsr(0x17B, (v64 & ~0xFFFFFFFFLL) | 0x00000010LL); 167 v32 = pcib_read_config(dev, bus, slot, 3, 0x4C, 4); 168 v32 &= 0x7F801EFC; 169 pcib_write_config(dev, bus, slot, 3, 0x4C, v32, 4); 170 171 callout_reset(&sc->ecc_callout, hz, ecc_amd8000_callout, sc); 172 } 173 return (0); 174 } 175 176 static void 177 ecc_amd8000_callout(void *xsc) 178 { 179 struct ecc_amd8000_softc *sc = xsc; 180 device_t dev = sc->ecc_dev; 181 uint32_t v32, addr; 182 int bus, slot; 183 184 bus = pci_get_bus(dev); 185 slot = pci_get_slot(dev); 186 187 /* 188 * The address calculation is not entirely correct. We need to 189 * look at the AMD chipset documentation. 190 */ 191 v32 = pcib_read_config(dev, bus, slot, 3, 0x4C, 4); 192 if ((v32 & 0x80004000) == 0x80004000) { 193 addr = pcib_read_config(dev, bus, slot, 3, 0x50, 4); 194 ecc_printf(sc, "Correctable ECC error at %08x\n", addr); 195 pcib_write_config(dev, bus, slot, 3, 0x4C, v32 & 0x7F801EFC, 4); 196 } else if ((v32 & 0x80002000) == 0x80002000) { 197 addr = pcib_read_config(dev, bus ,slot, 3, 0x50, 4); 198 ecc_printf(sc, "Uncorrectable ECC error at %08x\n", addr); 199 pcib_write_config(dev, bus, slot, 3, 0x4C, v32 & 0x7F801EFC, 4); 200 } 201 callout_reset(&sc->ecc_callout, hz, ecc_amd8000_callout, sc); 202 } 203 204 static void 205 ecc_amd8000_stop(device_t dev) 206 { 207 struct ecc_amd8000_softc *sc = device_get_softc(dev); 208 209 callout_stop_sync(&sc->ecc_callout); 210 } 211 212 static int 213 ecc_amd8000_detach(device_t dev) 214 { 215 ecc_amd8000_stop(dev); 216 return 0; 217 } 218 219 static void 220 ecc_amd8000_shutdown(device_t dev) 221 { 222 ecc_amd8000_stop(dev); 223 } 224