1 /* 2 * Copyright (c) 2006 The DragonFly Project. All rights reserved. 3 * 4 * This code is derived from software contributed to The DragonFly Project 5 * by Matthew Dillon <dillon@backplane.com>. AMD register addresses and 6 * values were pulled from MemTest-86 and Linux. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in 16 * the documentation and/or other materials provided with the 17 * distribution. 18 * 3. Neither the name of The DragonFly Project nor the names of its 19 * contributors may be used to endorse or promote products derived 20 * from this software without specific, prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 25 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 26 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 28 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 30 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 32 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/bus.h> 39 #include <sys/kernel.h> 40 #include <sys/malloc.h> 41 42 #include <bus/pci/pcivar.h> 43 #include <bus/pci/pcireg.h> 44 #include <bus/pci/pci_cfgreg.h> 45 #include <bus/pci/pcib_private.h> 46 47 #include "pcib_if.h" 48 49 struct ecc_amd8000_memctrl { 50 uint16_t vid; 51 uint16_t did; 52 const char *desc; 53 }; 54 55 struct ecc_amd8000_softc { 56 device_t ecc_dev; 57 struct callout ecc_callout; 58 }; 59 60 #define ecc_printf(sc, fmt, arg...) \ 61 device_printf((sc)->ecc_dev, fmt , ##arg) 62 63 static void ecc_amd8000_callout(void *); 64 static void ecc_amd8000_stop(device_t); 65 66 static int ecc_amd8000_probe(device_t); 67 static int ecc_amd8000_attach(device_t); 68 static int ecc_amd8000_detach(device_t); 69 static void ecc_amd8000_shutdown(device_t); 70 71 static const struct ecc_amd8000_memctrl ecc_memctrls[] = { 72 { 0x1022, 0x1100, "AMD 8000 memory controller" }, 73 { 0x1022, 0x7454, "AMD 8151 memory controller" }, 74 { 0, 0, NULL } /* required last entry */ 75 }; 76 77 static device_method_t ecc_amd8000_methods[] = { 78 /* Device interface */ 79 DEVMETHOD(device_probe, ecc_amd8000_probe), 80 DEVMETHOD(device_attach, ecc_amd8000_attach), 81 DEVMETHOD(device_detach, ecc_amd8000_detach), 82 DEVMETHOD(device_shutdown, ecc_amd8000_shutdown), 83 DEVMETHOD(device_suspend, bus_generic_suspend), 84 DEVMETHOD(device_resume, bus_generic_resume), 85 DEVMETHOD_END 86 }; 87 88 static driver_t ecc_amd8000_driver = { 89 "ecc", 90 ecc_amd8000_methods, 91 sizeof(struct ecc_amd8000_softc) 92 }; 93 static devclass_t ecc_devclass; 94 DRIVER_MODULE(ecc_amd8000, pci, ecc_amd8000_driver, ecc_devclass, NULL, NULL); 95 MODULE_DEPEND(ecc_amd8000, pci, 1, 1, 1); 96 97 static int 98 ecc_amd8000_probe(device_t dev) 99 { 100 const struct ecc_amd8000_memctrl *mc; 101 uint16_t vid, did; 102 103 vid = pci_get_vendor(dev); 104 did = pci_get_device(dev); 105 106 for (mc = ecc_memctrls; mc->desc != NULL; ++mc) { 107 if (mc->vid == vid && mc->did == did) { 108 device_set_desc(dev, mc->desc); 109 return (0); 110 } 111 } 112 return (ENXIO); 113 } 114 115 static int 116 ecc_amd8000_attach(device_t dev) 117 { 118 struct ecc_amd8000_softc *sc = device_get_softc(dev); 119 uint32_t draminfo, eccinfo; 120 int bus, slot, poll = 0; 121 122 callout_init_mp(&sc->ecc_callout); 123 sc->ecc_dev = dev; 124 125 bus = pci_get_bus(dev); 126 slot = pci_get_slot(dev); 127 128 /* 129 * The memory bridge is recognized as four PCI devices 130 * using function codes 0, 1, 2, and 3. We probe for the 131 * device at function code 0 and assume that all four exist. 132 */ 133 draminfo = pcib_read_config(dev, bus, slot, 2, 0x90, 4); 134 eccinfo = pcib_read_config(dev, bus, slot, 3, 0x44, 4); 135 136 if ((draminfo >> 17) & 1) 137 ecc_printf(sc, "memory type: ECC\n"); 138 else 139 ecc_printf(sc, "memory type: NON-ECC\n"); 140 switch((eccinfo >> 22) & 3) { 141 case 0: 142 ecc_printf(sc, "ecc mode: DISABLED\n"); 143 break; 144 case 1: 145 ecc_printf(sc, "ecc mode: ENABLED/CORRECT-MODE\n"); 146 poll = 1; 147 break; 148 case 2: 149 ecc_printf(sc, "ecc mode: ENABLED/RESERVED (disabled)\n"); 150 break; 151 case 3: 152 ecc_printf(sc, "ecc mode: ENABLED/CHIPKILL-MODE\n"); 153 poll = 1; 154 break; 155 } 156 157 /* 158 * Enable ECC logging and clear any previous error. 159 */ 160 if (poll) { 161 uint64_t v64; 162 uint32_t v32; 163 164 v64 = rdmsr(0x017B); 165 wrmsr(0x17B, (v64 & ~0xFFFFFFFFLL) | 0x00000010LL); 166 v32 = pcib_read_config(dev, bus, slot, 3, 0x4C, 4); 167 v32 &= 0x7F801EFC; 168 pcib_write_config(dev, bus, slot, 3, 0x4C, v32, 4); 169 170 callout_reset(&sc->ecc_callout, hz, ecc_amd8000_callout, sc); 171 } 172 return (0); 173 } 174 175 static void 176 ecc_amd8000_callout(void *xsc) 177 { 178 struct ecc_amd8000_softc *sc = xsc; 179 device_t dev = sc->ecc_dev; 180 uint32_t v32, addr; 181 int bus, slot; 182 183 bus = pci_get_bus(dev); 184 slot = pci_get_slot(dev); 185 186 /* 187 * The address calculation is not entirely correct. We need to 188 * look at the AMD chipset documentation. 189 */ 190 v32 = pcib_read_config(dev, bus, slot, 3, 0x4C, 4); 191 if ((v32 & 0x80004000) == 0x80004000) { 192 addr = pcib_read_config(dev, bus, slot, 3, 0x50, 4); 193 ecc_printf(sc, "Correctable ECC error at %08x\n", addr); 194 pcib_write_config(dev, bus, slot, 3, 0x4C, v32 & 0x7F801EFC, 4); 195 } else if ((v32 & 0x80002000) == 0x80002000) { 196 addr = pcib_read_config(dev, bus ,slot, 3, 0x50, 4); 197 ecc_printf(sc, "Uncorrectable ECC error at %08x\n", addr); 198 pcib_write_config(dev, bus, slot, 3, 0x4C, v32 & 0x7F801EFC, 4); 199 } 200 callout_reset(&sc->ecc_callout, hz, ecc_amd8000_callout, sc); 201 } 202 203 static void 204 ecc_amd8000_stop(device_t dev) 205 { 206 struct ecc_amd8000_softc *sc = device_get_softc(dev); 207 208 callout_stop_sync(&sc->ecc_callout); 209 } 210 211 static int 212 ecc_amd8000_detach(device_t dev) 213 { 214 ecc_amd8000_stop(dev); 215 return 0; 216 } 217 218 static void 219 ecc_amd8000_shutdown(device_t dev) 220 { 221 ecc_amd8000_stop(dev); 222 } 223