xref: /dragonfly/sys/dev/misc/kbd/atkbdcreg.h (revision 6e9ab18e)
1 /*-
2  * Copyright (c) 1996-1999
3  * Kazutaka YOKOTA (yokota@zodiac.mech.utsunomiya-u.ac.jp)
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. The name of the author may not be used to endorse or promote
15  *    products derived from this software without specific prior written
16  *    permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  * $FreeBSD: src/sys/dev/kbd/atkbdcreg.h,v 1.4.2.2 2000/03/31 12:51:57 yokota Exp $
31  * $DragonFly: src/sys/dev/misc/kbd/atkbdcreg.h,v 1.3 2007/01/15 00:11:36 dillon Exp $
32  * from kbdio.h,v 1.8 1998/09/25 11:55:46 yokota Exp
33  */
34 
35 #ifndef _DEV_KBD_ATKBDCREG_H_
36 #define	_DEV_KBD_ATKBDCREG_H_
37 
38 /* constants */
39 
40 /* I/O ports */
41 #define KBD_STATUS_PORT 	4	/* status port, read */
42 #define KBD_COMMAND_PORT	4	/* controller command port, write */
43 #define KBD_DATA_PORT		0	/* data port, read/write
44 					 * also used as keyboard command
45 					 * and mouse command port
46 					 */
47 
48 /* misc */
49 #define KBD_NUM_MUX_PORTS	4
50 
51 /* controller commands (sent to KBD_COMMAND_PORT) */
52 #define KBDC_SET_COMMAND_BYTE 	0x0060
53 #define KBDC_GET_COMMAND_BYTE 	0x0020
54 #define KBDC_WRITE_TO_AUX    	0x00d4
55 #define KBDC_DISABLE_AUX_PORT 	0x00a7
56 #define KBDC_ENABLE_AUX_PORT 	0x00a8
57 #define KBDC_TEST_AUX_PORT   	0x00a9
58 #define KBDC_DIAGNOSE	     	0x00aa
59 #define KBDC_TEST_KBD_PORT   	0x00ab
60 #define KBDC_DISABLE_KBD_PORT 	0x00ad
61 #define KBDC_ENABLE_KBD_PORT 	0x00ae
62 #define KBDC_AUX_LOOP		0x00d3	/* mux test w+1, r+1 */
63 #define KBDC_MUX_PFX		0x0090
64 #define KBDC_MUX_SEND		0x0090
65 
66 /* controller command byte (set by KBDC_SET_COMMAND_BYTE) */
67 #define KBD_TRANSLATION		0x0040
68 #define KBD_RESERVED_BITS	0x0004
69 #define KBD_OVERRIDE_KBD_LOCK	0x0008
70 #define KBD_ENABLE_KBD_PORT    	0x0000
71 #define KBD_DISABLE_KBD_PORT   	0x0010
72 #define KBD_ENABLE_AUX_PORT	0x0000
73 #define KBD_DISABLE_AUX_PORT	0x0020
74 #define KBD_ENABLE_AUX_INT	0x0002
75 #define KBD_DISABLE_AUX_INT	0x0000
76 #define KBD_ENABLE_KBD_INT     	0x0001
77 #define KBD_DISABLE_KBD_INT    	0x0000
78 #define KBD_KBD_CONTROL_BITS	(KBD_DISABLE_KBD_PORT | KBD_ENABLE_KBD_INT)
79 #define KBD_AUX_CONTROL_BITS	(KBD_DISABLE_AUX_PORT | KBD_ENABLE_AUX_INT)
80 
81 /* keyboard device commands (sent to KBD_DATA_PORT) */
82 #define KBDC_RESET_KBD	     	0x00ff
83 #define KBDC_ENABLE_KBD		0x00f4
84 #define KBDC_DISABLE_KBD	0x00f5
85 #define KBDC_SET_DEFAULTS	0x00f6
86 #define KBDC_SEND_DEV_ID	0x00f2
87 #define KBDC_SET_LEDS		0x00ed
88 #define KBDC_ECHO		0x00ee
89 #define KBDC_SET_SCANCODE_SET	0x00f0
90 #define KBDC_SET_TYPEMATIC	0x00f3
91 
92 #define ATKBD_CMD_SETLEDS       0x10ed
93 #define ATKBD_CMD_GSCANSET      0x11f0
94 #define ATKBD_CMD_SSCANSET      0x10f0
95 #define ATKBD_CMD_GETID         0x02f2
96 #define ATKBD_CMD_SETREP        0x10f3
97 #define ATKBD_CMD_ENABLE        0x00f4
98 #define ATKBD_CMD_RESET_DIS     0x00f5  /* Reset to defaults and disable */
99 #define ATKBD_CMD_RESET_DEF     0x00f6  /* Reset to defaults */
100 #define ATKBD_CMD_SETALL_MB     0x00f8  /* Set all keys to give break codes */
101 #define ATKBD_CMD_SETALL_MBR    0x00fa  /* ... and repeat */
102 #define ATKBD_CMD_RESET_BAT     0x02ff
103 #define ATKBD_CMD_RESEND        0x00fe
104 #define ATKBD_CMD_EX_ENABLE     0x10ea
105 #define ATKBD_CMD_EX_SETLEDS    0x20eb
106 #define ATKBD_CMD_OK_GETID      0x02e8
107 
108 /* aux device commands (sent to KBD_DATA_PORT) */
109 #define PSMC_RESET_DEV	     	0x00ff
110 #define PSMC_ENABLE_DEV      	0x00f4
111 #define PSMC_DISABLE_DEV     	0x00f5
112 #define PSMC_SET_DEFAULTS	0x00f6
113 #define PSMC_SEND_DEV_ID     	0x00f2
114 #define PSMC_SEND_DEV_STATUS 	0x00e9
115 #define PSMC_SEND_DEV_DATA	0x00eb
116 #define PSMC_SET_SCALING11	0x00e6
117 #define PSMC_SET_SCALING21	0x00e7
118 #define PSMC_SET_RESOLUTION	0x00e8
119 #define PSMC_SET_STREAM_MODE	0x00ea
120 #define PSMC_SET_REMOTE_MODE	0x00f0
121 #define PSMC_SET_SAMPLING_RATE	0x00f3
122 
123 /* PSMC_SET_RESOLUTION argument */
124 #define PSMD_RES_LOW		0	/* typically 25ppi */
125 #define PSMD_RES_MEDIUM_LOW	1	/* typically 50ppi */
126 #define PSMD_RES_MEDIUM_HIGH	2	/* typically 100ppi (default) */
127 #define PSMD_RES_HIGH		3	/* typically 200ppi */
128 #define PSMD_MAX_RESOLUTION	PSMD_RES_HIGH
129 
130 /* PSMC_SET_SAMPLING_RATE */
131 #define PSMD_MAX_RATE		255	/* FIXME: not sure if it's possible */
132 
133 /* status bits (KBD_STATUS_PORT) */
134 #define KBDS_BUFFER_FULL	0x0021
135 #define KBDS_ANY_BUFFER_FULL	0x0001	/* (data from controller pending) */
136 #define KBDS_KBD_BUFFER_FULL	0x0001	/* mask/match KBDS_BUFFER_FULL */
137 #define KBDS_AUX_BUFFER_FULL	0x0021	/* mask/match KBDS_BUFFER_FULL */
138 #define KBDS_INPUT_BUFFER_FULL	0x0002	/* (cmd/data to controller pending) */
139 
140 #define I8042_STR_PARITY	0x80	/* Also MUX data address bit */
141 #define I8042_STR_TIMEOUT	0x40	/* Also MUX data address bit */
142 #define I8042_STR_AUXDATA	0x20
143 #define I8042_STR_KEYLOCK	0x10
144 #define I8042_STR_CMDDAT	0x08
145 #define I8042_STR_MUXERR	0x04
146 #define I8042_STR_IBF		0x02	/* write pending (outgoing) */
147 #define I8042_STR_OBF		0x01	/* read pending (incoming) */
148 
149 #define I8042_STR_MUX_SHIFT	6
150 #define I8042_STR_MUX_MASK	3
151 
152 /* return code */
153 #define KBD_ACK 		0x00fa
154 #define KBD_RESEND		0x00fe
155 #define KBD_RESET_DONE		0x00aa
156 #define KBD_RESET_FAIL		0x00fc
157 #define KBD_DIAG_DONE		0x0055
158 #define KBD_DIAG_FAIL		0x00fd
159 #define KBD_ECHO		0x00ee
160 
161 #define PSM_ACK 		0x00fa
162 #define PSM_RESEND		0x00fe
163 #define PSM_RESET_DONE		0x00aa
164 #define PSM_RESET_FAIL		0x00fc
165 
166 /* aux device ID */
167 #define PSM_MOUSE_ID		0
168 #define PSM_BALLPOINT_ID	2
169 #define PSM_INTELLI_ID		3
170 #define PSM_EXPLORER_ID		4
171 #define PSM_4DMOUSE_ID		6
172 #define PSM_4DPLUS_ID		8
173 #define PSM_4DPLUS_RFSW35_ID  24
174 
175 #ifdef _KERNEL
176 
177 #define ATKBDC_DRIVER_NAME	"atkbdc"
178 
179 /*
180  * driver specific options: the following options may be set by
181  * `options' statements in the kernel configuration file.
182  */
183 
184 /* retry count */
185 #ifndef KBD_MAXRETRY
186 #define KBD_MAXRETRY	3
187 #endif
188 
189 /* timing parameters */
190 #ifndef KBD_RESETDELAY
191 #define KBD_RESETDELAY  200     /* wait 200msec after kbd/mouse reset */
192 #endif
193 #ifndef KBD_MAXWAIT
194 #define KBD_MAXWAIT	5 	/* wait 5 times at most after reset */
195 #endif
196 
197 /* I/O recovery time */
198 #define KBDC_DELAYTIME	20
199 #define KBDD_DELAYTIME	7
200 
201 /* debug option */
202 #ifndef KBDIO_DEBUG
203 #define KBDIO_DEBUG	0
204 #endif
205 
206 /* end of driver specific options */
207 
208 /* types/structures */
209 
210 #define KBDQ_BUFSIZE	32
211 
212 typedef struct _kbdkqueue {
213     int head;
214     int tail;
215     unsigned char q[KBDQ_BUFSIZE];
216 #if KBDIO_DEBUG >= 2
217     int call_count;
218     int qcount;
219     int max_qcount;
220 #endif
221 } kbdkqueue;
222 
223 struct resource;
224 
225 typedef struct atkbdc_softc {
226     struct resource *port0;	/* data port */
227     struct resource *port1;	/* status port */
228     bus_space_tag_t iot;
229     bus_space_handle_t ioh0;
230     bus_space_handle_t ioh1;
231     int command_byte;		/* current command byte value */
232     int command_mask;		/* command byte mask bits for kbd/aux devices */
233     int mux_active;		/* multiplexer is active */
234     int lock;			/* FIXME: XXX not quite a semaphore... */
235     kbdkqueue kbd;		/* keyboard data queue */
236     kbdkqueue aux;		/* auxiliary data queue */
237 } atkbdc_softc_t;
238 
239 enum kbdc_device_ivar {
240 	KBDC_IVAR_IRQ,
241 	KBDC_IVAR_FLAGS,
242 	KBDC_IVAR_VENDORID,
243 	KBDC_IVAR_SERIAL,
244 	KBDC_IVAR_LOGICALID,
245 	KBDC_IVAR_COMPATID,
246 };
247 
248 typedef struct atkbdc_softc *KBDC;
249 
250 #define KBDC_RID_KBD	 0
251 #define KBDC_RID_AUX	 1
252 
253 /* function prototypes */
254 
255 atkbdc_softc_t *atkbdc_get_softc(int unit);
256 int atkbdc_probe_unit(int unit, struct resource *port0, struct resource *port1);
257 int atkbdc_attach_unit(int unit, atkbdc_softc_t *sc, struct resource *port0,
258 		       struct resource *port1);
259 int atkbdc_configure(void);
260 
261 KBDC atkbdc_open(int unit);
262 int kbdc_lock(KBDC kbdc, int lock);
263 int kbdc_data_ready(KBDC kbdc);
264 
265 int write_controller_command(KBDC kbdc,int c);
266 int write_controller_data(KBDC kbdc, int c);
267 int write_controller_w1r1(KBDC kbdc, int c, int d);
268 
269 int write_kbd_command(KBDC kbdc,int c);
270 int write_aux_command(KBDC kbdc,int c);
271 int send_kbd_command(KBDC kbdc,int c);
272 int send_aux_command(KBDC kbdc,int c);
273 int send_kbd_command_and_data(KBDC kbdc,int c,int d);
274 int send_aux_command_and_data(KBDC kbdc,int c,int d);
275 
276 int read_controller_data(KBDC kbdc);
277 int read_kbd_data(KBDC kbdc);
278 int read_kbd_data_no_wait(KBDC kbdc);
279 int read_aux_data(KBDC kbdc);
280 int read_aux_data_no_wait(KBDC kbdc);
281 
282 void empty_kbd_buffer(KBDC kbdc, int t);
283 void empty_aux_buffer(KBDC kbdc, int t);
284 void empty_both_buffers(KBDC kbdc, int t);
285 
286 int reset_kbd(KBDC kbdc);
287 int reset_aux_dev(KBDC kbdc);
288 
289 int test_controller(KBDC kbdc);
290 int test_kbd_port(KBDC kbdc);
291 int test_aux_port(KBDC kbdc);
292 
293 int get_controller_command_byte(KBDC kbdc);
294 int set_controller_command_byte(KBDC kbdc, int mask, int command);
295 
296 #endif /* _KERNEL */
297 
298 #endif /* !_DEV_KBD_ATKBDCREG_H_ */
299