1 /*- 2 * Copyright (c) 1997, 1998, 1999 Nicolas Souchu, Michael Smith 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/dev/ppbus/ppi.c,v 1.21.2.3 2000/08/07 18:24:43 peter Exp $ 27 * $DragonFly: src/sys/dev/misc/ppi/ppi.c,v 1.12 2006/07/28 02:17:36 dillon Exp $ 28 * 29 */ 30 #include "opt_ppb_1284.h" 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/module.h> 35 #include <sys/bus.h> 36 #include <sys/conf.h> 37 #include <sys/device.h> 38 #include <sys/kernel.h> 39 #include <sys/uio.h> 40 #include <sys/fcntl.h> 41 42 #include <machine/clock.h> 43 #include <machine/bus.h> 44 #include <machine/resource.h> 45 #include <sys/rman.h> 46 47 #include <bus/ppbus/ppbconf.h> 48 #include <bus/ppbus/ppb_msq.h> 49 50 #ifdef PERIPH_1284 51 #include <bus/ppbus/ppb_1284.h> 52 #endif 53 54 #include "ppi.h" 55 56 #include "ppbus_if.h" 57 58 #include <bus/ppbus/ppbio.h> 59 60 #define BUFSIZE 512 61 62 struct ppi_data { 63 64 int ppi_unit; 65 int ppi_flags; 66 #define HAVE_PPBUS (1<<0) 67 #define HAD_PPBUS (1<<1) 68 69 int ppi_count; 70 int ppi_mode; /* IEEE1284 mode */ 71 char ppi_buffer[BUFSIZE]; 72 73 #ifdef PERIPH_1284 74 struct resource *intr_resource; /* interrupt resource */ 75 void *intr_cookie; /* interrupt registration cookie */ 76 #endif /* PERIPH_1284 */ 77 }; 78 79 #define DEVTOSOFTC(dev) \ 80 ((struct ppi_data *)device_get_softc(dev)) 81 #define UNITOSOFTC(unit) \ 82 ((struct ppi_data *)devclass_get_softc(ppi_devclass, (unit))) 83 #define UNITODEVICE(unit) \ 84 (devclass_get_device(ppi_devclass, (unit))) 85 86 static devclass_t ppi_devclass; 87 88 static d_open_t ppiopen; 89 static d_close_t ppiclose; 90 static d_ioctl_t ppiioctl; 91 static d_write_t ppiwrite; 92 static d_read_t ppiread; 93 94 #define CDEV_MAJOR 82 95 static struct dev_ops ppi_ops = { 96 { "ppi", CDEV_MAJOR, 0 }, 97 .d_open = ppiopen, 98 .d_close = ppiclose, 99 .d_read = ppiread, 100 .d_write = ppiwrite, 101 .d_ioctl = ppiioctl, 102 }; 103 104 #ifdef PERIPH_1284 105 106 static void 107 ppi_enable_intr(device_t ppidev) 108 { 109 char r; 110 device_t ppbus = device_get_parent(ppidev); 111 112 r = ppb_rctr(ppbus); 113 ppb_wctr(ppbus, r | IRQENABLE); 114 115 return; 116 } 117 118 static void 119 ppi_disable_intr(device_t ppidev) 120 { 121 char r; 122 device_t ppbus = device_get_parent(ppidev); 123 124 r = ppb_rctr(ppbus); 125 ppb_wctr(ppbus, r & ~IRQENABLE); 126 127 return; 128 } 129 130 #endif /* PERIPH_1284 */ 131 132 /* 133 * ppi_probe() 134 */ 135 static int 136 ppi_probe(device_t dev) 137 { 138 struct ppi_data *ppi; 139 140 /* probe is always ok */ 141 device_set_desc(dev, "Parallel I/O"); 142 143 ppi = DEVTOSOFTC(dev); 144 bzero(ppi, sizeof(struct ppi_data)); 145 146 return (0); 147 } 148 149 /* 150 * ppi_attach() 151 */ 152 static int 153 ppi_attach(device_t dev) 154 { 155 #ifdef PERIPH_1284 156 uintptr_t irq; 157 int zero = 0; 158 struct ppi_data *ppi = DEVTOSOFTC(dev); 159 160 /* retrive the irq */ 161 BUS_READ_IVAR(device_get_parent(dev), dev, PPBUS_IVAR_IRQ, &irq); 162 163 /* declare our interrupt handler */ 164 ppi->intr_resource = bus_alloc_resource(dev, SYS_RES_IRQ, 165 &zero, irq, irq, 1, RF_ACTIVE); 166 #endif /* PERIPH_1284 */ 167 168 dev_ops_add(&ppi_ops, -1, device_get_unit(dev)); 169 make_dev(&ppi_ops, device_get_unit(dev), /* XXX cleanup */ 170 UID_ROOT, GID_WHEEL, 171 0600, "ppi%d", device_get_unit(dev)); 172 173 return (0); 174 } 175 176 #ifdef PERIPH_1284 177 /* 178 * Cable 179 * ----- 180 * 181 * Use an IEEE1284 compliant (DB25/DB25) cable with the following tricks: 182 * 183 * nStrobe <-> nAck 1 <-> 10 184 * nAutofd <-> Busy 11 <-> 14 185 * nSelectin <-> Select 17 <-> 13 186 * nInit <-> nFault 15 <-> 16 187 * 188 */ 189 static void 190 ppiintr(void *arg) 191 { 192 device_t ppidev = (device_t)arg; 193 device_t ppbus = device_get_parent(ppidev); 194 struct ppi_data *ppi = DEVTOSOFTC(ppidev); 195 196 ppi_disable_intr(ppidev); 197 198 switch (ppb_1284_get_state(ppbus)) { 199 200 /* accept IEEE1284 negociation then wakeup an waiting process to 201 * continue negociation at process level */ 202 case PPB_FORWARD_IDLE: 203 /* Event 1 */ 204 if ((ppb_rstr(ppbus) & (SELECT | nBUSY)) == 205 (SELECT | nBUSY)) { 206 /* IEEE1284 negociation */ 207 #ifdef DEBUG_1284 208 printf("N"); 209 #endif 210 211 /* Event 2 - prepare for reading the ext. value */ 212 ppb_wctr(ppbus, (PCD | STROBE | nINIT) & ~SELECTIN); 213 214 ppb_1284_set_state(ppbus, PPB_NEGOCIATION); 215 216 } else { 217 #ifdef DEBUG_1284 218 printf("0x%x", ppb_rstr(ppbus)); 219 #endif 220 ppb_peripheral_terminate(ppbus, PPB_DONTWAIT); 221 break; 222 } 223 224 /* wake up any process waiting for negociation from 225 * remote master host */ 226 227 /* XXX should set a variable to warn the process about 228 * the interrupt */ 229 230 wakeup(ppi); 231 break; 232 default: 233 #ifdef DEBUG_1284 234 printf("?%d", ppb_1284_get_state(ppbus)); 235 #endif 236 ppb_1284_set_state(ppbus, PPB_FORWARD_IDLE); 237 ppb_set_mode(ppbus, PPB_COMPATIBLE); 238 break; 239 } 240 241 ppi_enable_intr(ppidev); 242 243 return; 244 } 245 #endif /* PERIPH_1284 */ 246 247 static int 248 ppiopen(struct dev_open_args *ap) 249 { 250 dev_t dev = ap->a_head.a_dev; 251 u_int unit = minor(dev); 252 struct ppi_data *ppi = UNITOSOFTC(unit); 253 device_t ppidev = UNITODEVICE(unit); 254 device_t ppbus = device_get_parent(ppidev); 255 int res; 256 257 if (!ppi) 258 return (ENXIO); 259 260 if (!(ppi->ppi_flags & HAVE_PPBUS)) { 261 if ((res = ppb_request_bus(ppbus, ppidev, 262 (ap->a_oflags & O_NONBLOCK) ? PPB_DONTWAIT : 263 (PPB_WAIT | PPB_INTR)))) 264 return (res); 265 266 ppi->ppi_flags |= HAVE_PPBUS; 267 268 #ifdef PERIPH_1284 269 if (ppi->intr_resource) { 270 /* register our interrupt handler */ 271 BUS_SETUP_INTR(device_get_parent(ppidev), ppidev, 272 ppi->intr_resource, 0, 273 ppiintr, dev, 274 &ppi->intr_cookie, NULL); 275 } 276 #endif /* PERIPH_1284 */ 277 } 278 ppi->ppi_count += 1; 279 280 return (0); 281 } 282 283 static int 284 ppiclose(struct dev_close_args *ap) 285 { 286 dev_t dev = ap->a_head.a_dev; 287 u_int unit = minor(dev); 288 struct ppi_data *ppi = UNITOSOFTC(unit); 289 device_t ppidev = UNITODEVICE(unit); 290 device_t ppbus = device_get_parent(ppidev); 291 292 ppi->ppi_count --; 293 if (!ppi->ppi_count) { 294 295 #ifdef PERIPH_1284 296 switch (ppb_1284_get_state(ppbus)) { 297 case PPB_PERIPHERAL_IDLE: 298 ppb_peripheral_terminate(ppbus, 0); 299 break; 300 case PPB_REVERSE_IDLE: 301 case PPB_EPP_IDLE: 302 case PPB_ECP_FORWARD_IDLE: 303 default: 304 ppb_1284_terminate(ppbus); 305 break; 306 } 307 #endif /* PERIPH_1284 */ 308 309 /* unregistration of interrupt forced by release */ 310 ppb_release_bus(ppbus, ppidev); 311 312 ppi->ppi_flags &= ~HAVE_PPBUS; 313 } 314 315 return (0); 316 } 317 318 /* 319 * ppiread() 320 * 321 * IEEE1284 compliant read. 322 * 323 * First, try negociation to BYTE then NIBBLE mode 324 * If no data is available, wait for it otherwise transfer as much as possible 325 */ 326 static int 327 ppiread(struct dev_read_args *ap) 328 { 329 #ifdef PERIPH_1284 330 dev_t dev = ap->a_head.a_dev; 331 struct uio *uio = ap->a_uio; 332 u_int unit = minor(dev); 333 struct ppi_data *ppi = UNITOSOFTC(unit); 334 device_t ppidev = UNITODEVICE(unit); 335 device_t ppbus = device_get_parent(ppidev); 336 int len, error = 0; 337 338 switch (ppb_1284_get_state(ppbus)) { 339 case PPB_PERIPHERAL_IDLE: 340 ppb_peripheral_terminate(ppbus, 0); 341 /* fall throught */ 342 343 case PPB_FORWARD_IDLE: 344 /* if can't negociate NIBBLE mode then try BYTE mode, 345 * the peripheral may be a computer 346 */ 347 if ((ppb_1284_negociate(ppbus, 348 ppi->ppi_mode = PPB_NIBBLE, 0))) { 349 350 /* XXX Wait 2 seconds to let the remote host some 351 * time to terminate its interrupt 352 */ 353 tsleep(ppi, 0, "ppiread", 2*hz); 354 355 if ((error = ppb_1284_negociate(ppbus, 356 ppi->ppi_mode = PPB_BYTE, 0))) 357 return (error); 358 } 359 break; 360 361 case PPB_REVERSE_IDLE: 362 case PPB_EPP_IDLE: 363 case PPB_ECP_FORWARD_IDLE: 364 default: 365 break; 366 } 367 368 #ifdef DEBUG_1284 369 printf("N"); 370 #endif 371 /* read data */ 372 len = 0; 373 while (uio->uio_resid) { 374 if ((error = ppb_1284_read(ppbus, ppi->ppi_mode, 375 ppi->ppi_buffer, min(BUFSIZE, uio->uio_resid), 376 &len))) { 377 goto error; 378 } 379 380 if (!len) 381 goto error; /* no more data */ 382 383 #ifdef DEBUG_1284 384 printf("d"); 385 #endif 386 if ((error = uiomove(ppi->ppi_buffer, len, uio))) 387 goto error; 388 } 389 390 error: 391 392 #else /* PERIPH_1284 */ 393 int error = ENODEV; 394 #endif 395 396 return (error); 397 } 398 399 /* 400 * ppiwrite() 401 * 402 * IEEE1284 compliant write 403 * 404 * Actually, this is the peripheral side of a remote IEEE1284 read 405 * 406 * The first part of the negociation (IEEE1284 device detection) is 407 * done at interrupt level, then the remaining is done by the writing 408 * process 409 * 410 * Once negociation done, transfer data 411 */ 412 static int 413 ppiwrite(struct dev_write_args *ap) 414 { 415 #ifdef PERIPH_1284 416 dev_t dev = ap->a_head.a_dev; 417 struct uio *uio = ap->a_uio; 418 u_int unit = minor(dev); 419 struct ppi_data *ppi = UNITOSOFTC(unit); 420 device_t ppidev = UNITODEVICE(unit); 421 device_t ppbus = device_get_parent(ppidev); 422 int len, error = 0, sent; 423 424 #if 0 425 int ret; 426 427 #define ADDRESS MS_PARAM(0, 0, MS_TYP_PTR) 428 #define LENGTH MS_PARAM(0, 1, MS_TYP_INT) 429 430 struct ppb_microseq msq[] = { 431 { MS_OP_PUT, { MS_UNKNOWN, MS_UNKNOWN, MS_UNKNOWN } }, 432 MS_RET(0) 433 }; 434 435 /* negociate ECP mode */ 436 if (ppb_1284_negociate(ppbus, PPB_ECP, 0)) { 437 printf("ppiwrite: ECP negociation failed\n"); 438 } 439 440 while (!error && (len = min(uio->uio_resid, BUFSIZE))) { 441 uiomove(ppi->ppi_buffer, len, uio); 442 443 ppb_MS_init_msq(msq, 2, ADDRESS, ppi->ppi_buffer, LENGTH, len); 444 445 error = ppb_MS_microseq(ppbus, msq, &ret); 446 } 447 #endif 448 449 /* we have to be peripheral to be able to send data, so 450 * wait for the appropriate state 451 */ 452 if (ppb_1284_get_state(ppbus) < PPB_PERIPHERAL_NEGOCIATION) 453 ppb_1284_terminate(ppbus); 454 455 while (ppb_1284_get_state(ppbus) != PPB_PERIPHERAL_IDLE) { 456 /* XXX should check a variable before sleeping */ 457 #ifdef DEBUG_1284 458 printf("s"); 459 #endif 460 461 ppi_enable_intr(ppidev); 462 463 /* sleep until IEEE1284 negociation starts */ 464 error = tsleep(ppi, PCATCH, "ppiwrite", 0); 465 466 switch (error) { 467 case 0: 468 /* negociate peripheral side with BYTE mode */ 469 ppb_peripheral_negociate(ppbus, PPB_BYTE, 0); 470 break; 471 case EWOULDBLOCK: 472 break; 473 default: 474 goto error; 475 } 476 } 477 #ifdef DEBUG_1284 478 printf("N"); 479 #endif 480 481 /* negociation done, write bytes to master host */ 482 while ((len = min(uio->uio_resid, BUFSIZE)) != 0) { 483 uiomove(ppi->ppi_buffer, len, uio); 484 if ((error = byte_peripheral_write(ppbus, 485 ppi->ppi_buffer, len, &sent))) 486 goto error; 487 #ifdef DEBUG_1284 488 printf("d"); 489 #endif 490 } 491 492 error: 493 494 #else /* PERIPH_1284 */ 495 int error = ENODEV; 496 #endif 497 498 return (error); 499 } 500 501 static int 502 ppiioctl(struct dev_ioctl_args *ap) 503 { 504 dev_t dev = ap->a_head.a_dev; 505 u_int unit = minor(dev); 506 device_t ppidev = UNITODEVICE(unit); 507 device_t ppbus = device_get_parent(ppidev); 508 int error = 0; 509 u_int8_t *val = (u_int8_t *)ap->a_data; 510 511 switch (ap->a_cmd) { 512 case PPIGDATA: /* get data register */ 513 *val = ppb_rdtr(ppbus); 514 break; 515 case PPIGSTATUS: /* get status bits */ 516 *val = ppb_rstr(ppbus); 517 break; 518 case PPIGCTRL: /* get control bits */ 519 *val = ppb_rctr(ppbus); 520 break; 521 case PPIGEPPD: /* get EPP data bits */ 522 *val = ppb_repp_D(ppbus); 523 break; 524 case PPIGECR: /* get ECP bits */ 525 *val = ppb_recr(ppbus); 526 break; 527 case PPIGFIFO: /* read FIFO */ 528 *val = ppb_rfifo(ppbus); 529 break; 530 case PPISDATA: /* set data register */ 531 ppb_wdtr(ppbus, *val); 532 break; 533 case PPISSTATUS: /* set status bits */ 534 ppb_wstr(ppbus, *val); 535 break; 536 case PPISCTRL: /* set control bits */ 537 ppb_wctr(ppbus, *val); 538 break; 539 case PPISEPPD: /* set EPP data bits */ 540 ppb_wepp_D(ppbus, *val); 541 break; 542 case PPISECR: /* set ECP bits */ 543 ppb_wecr(ppbus, *val); 544 break; 545 case PPISFIFO: /* write FIFO */ 546 ppb_wfifo(ppbus, *val); 547 break; 548 case PPIGEPPA: /* get EPP address bits */ 549 *val = ppb_repp_A(ppbus); 550 break; 551 case PPISEPPA: /* set EPP address bits */ 552 ppb_wepp_A(ppbus, *val); 553 break; 554 default: 555 error = ENOTTY; 556 break; 557 } 558 559 return (error); 560 } 561 562 /* 563 * Because ppi is a static device under any attached ppbuf, and not 564 * scanned by the ppbuf, we need an identify function to create the 565 * device. 566 */ 567 static device_method_t ppi_methods[] = { 568 /* device interface */ 569 DEVMETHOD(device_identify, bus_generic_identify), 570 DEVMETHOD(device_probe, ppi_probe), 571 DEVMETHOD(device_attach, ppi_attach), 572 573 { 0, 0 } 574 }; 575 576 static driver_t ppi_driver = { 577 "ppi", 578 ppi_methods, 579 sizeof(struct ppi_data), 580 }; 581 DRIVER_MODULE(ppi, ppbus, ppi_driver, ppi_devclass, 0, 0); 582