1 /*- 2 * Copyright (c) 1997, 1998, 1999 Nicolas Souchu, Michael Smith 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/dev/ppbus/ppi.c,v 1.21.2.3 2000/08/07 18:24:43 peter Exp $ 27 * $DragonFly: src/sys/dev/misc/ppi/ppi.c,v 1.15 2006/12/22 23:26:18 swildner Exp $ 28 * 29 */ 30 #include "opt_ppb_1284.h" 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/module.h> 35 #include <sys/bus.h> 36 #include <sys/conf.h> 37 #include <sys/device.h> 38 #include <sys/kernel.h> 39 #include <sys/uio.h> 40 #include <sys/fcntl.h> 41 #include <sys/rman.h> 42 43 #include <machine/clock.h> 44 45 #include <bus/ppbus/ppbconf.h> 46 #include <bus/ppbus/ppb_msq.h> 47 48 #ifdef PERIPH_1284 49 #include <bus/ppbus/ppb_1284.h> 50 #endif 51 52 #include "ppi.h" 53 54 #include "ppbus_if.h" 55 56 #include <bus/ppbus/ppbio.h> 57 58 #define BUFSIZE 512 59 60 struct ppi_data { 61 62 int ppi_unit; 63 int ppi_flags; 64 #define HAVE_PPBUS (1<<0) 65 #define HAD_PPBUS (1<<1) 66 67 int ppi_count; 68 int ppi_mode; /* IEEE1284 mode */ 69 char ppi_buffer[BUFSIZE]; 70 71 #ifdef PERIPH_1284 72 struct resource *intr_resource; /* interrupt resource */ 73 void *intr_cookie; /* interrupt registration cookie */ 74 #endif /* PERIPH_1284 */ 75 }; 76 77 #define DEVTOSOFTC(dev) \ 78 ((struct ppi_data *)device_get_softc(dev)) 79 #define UNITOSOFTC(unit) \ 80 ((struct ppi_data *)devclass_get_softc(ppi_devclass, (unit))) 81 #define UNITODEVICE(unit) \ 82 (devclass_get_device(ppi_devclass, (unit))) 83 84 static devclass_t ppi_devclass; 85 86 static d_open_t ppiopen; 87 static d_close_t ppiclose; 88 static d_ioctl_t ppiioctl; 89 static d_write_t ppiwrite; 90 static d_read_t ppiread; 91 92 #define CDEV_MAJOR 82 93 static struct dev_ops ppi_ops = { 94 { "ppi", CDEV_MAJOR, 0 }, 95 .d_open = ppiopen, 96 .d_close = ppiclose, 97 .d_read = ppiread, 98 .d_write = ppiwrite, 99 .d_ioctl = ppiioctl, 100 }; 101 102 #ifdef PERIPH_1284 103 104 static void 105 ppi_enable_intr(device_t ppidev) 106 { 107 char r; 108 device_t ppbus = device_get_parent(ppidev); 109 110 r = ppb_rctr(ppbus); 111 ppb_wctr(ppbus, r | IRQENABLE); 112 113 return; 114 } 115 116 static void 117 ppi_disable_intr(device_t ppidev) 118 { 119 char r; 120 device_t ppbus = device_get_parent(ppidev); 121 122 r = ppb_rctr(ppbus); 123 ppb_wctr(ppbus, r & ~IRQENABLE); 124 125 return; 126 } 127 128 #endif /* PERIPH_1284 */ 129 130 /* 131 * ppi_probe() 132 */ 133 static int 134 ppi_probe(device_t dev) 135 { 136 struct ppi_data *ppi; 137 138 /* probe is always ok */ 139 device_set_desc(dev, "Parallel I/O"); 140 141 ppi = DEVTOSOFTC(dev); 142 bzero(ppi, sizeof(struct ppi_data)); 143 144 return (0); 145 } 146 147 /* 148 * ppi_attach() 149 */ 150 static int 151 ppi_attach(device_t dev) 152 { 153 #ifdef PERIPH_1284 154 uintptr_t irq; 155 int zero = 0; 156 struct ppi_data *ppi = DEVTOSOFTC(dev); 157 158 /* retrive the irq */ 159 BUS_READ_IVAR(device_get_parent(dev), dev, PPBUS_IVAR_IRQ, &irq); 160 161 /* declare our interrupt handler */ 162 ppi->intr_resource = bus_alloc_resource(dev, SYS_RES_IRQ, 163 &zero, irq, irq, 1, RF_ACTIVE); 164 #endif /* PERIPH_1284 */ 165 166 dev_ops_add(&ppi_ops, -1, device_get_unit(dev)); 167 make_dev(&ppi_ops, device_get_unit(dev), /* XXX cleanup */ 168 UID_ROOT, GID_WHEEL, 169 0600, "ppi%d", device_get_unit(dev)); 170 171 return (0); 172 } 173 174 #ifdef PERIPH_1284 175 /* 176 * Cable 177 * ----- 178 * 179 * Use an IEEE1284 compliant (DB25/DB25) cable with the following tricks: 180 * 181 * nStrobe <-> nAck 1 <-> 10 182 * nAutofd <-> Busy 11 <-> 14 183 * nSelectin <-> Select 17 <-> 13 184 * nInit <-> nFault 15 <-> 16 185 * 186 */ 187 static void 188 ppiintr(void *arg) 189 { 190 device_t ppidev = (device_t)arg; 191 device_t ppbus = device_get_parent(ppidev); 192 struct ppi_data *ppi = DEVTOSOFTC(ppidev); 193 194 ppi_disable_intr(ppidev); 195 196 switch (ppb_1284_get_state(ppbus)) { 197 198 /* accept IEEE1284 negociation then wakeup an waiting process to 199 * continue negociation at process level */ 200 case PPB_FORWARD_IDLE: 201 /* Event 1 */ 202 if ((ppb_rstr(ppbus) & (SELECT | nBUSY)) == 203 (SELECT | nBUSY)) { 204 /* IEEE1284 negociation */ 205 #ifdef DEBUG_1284 206 kprintf("N"); 207 #endif 208 209 /* Event 2 - prepare for reading the ext. value */ 210 ppb_wctr(ppbus, (PCD | STROBE | nINIT) & ~SELECTIN); 211 212 ppb_1284_set_state(ppbus, PPB_NEGOCIATION); 213 214 } else { 215 #ifdef DEBUG_1284 216 kprintf("0x%x", ppb_rstr(ppbus)); 217 #endif 218 ppb_peripheral_terminate(ppbus, PPB_DONTWAIT); 219 break; 220 } 221 222 /* wake up any process waiting for negociation from 223 * remote master host */ 224 225 /* XXX should set a variable to warn the process about 226 * the interrupt */ 227 228 wakeup(ppi); 229 break; 230 default: 231 #ifdef DEBUG_1284 232 kprintf("?%d", ppb_1284_get_state(ppbus)); 233 #endif 234 ppb_1284_set_state(ppbus, PPB_FORWARD_IDLE); 235 ppb_set_mode(ppbus, PPB_COMPATIBLE); 236 break; 237 } 238 239 ppi_enable_intr(ppidev); 240 241 return; 242 } 243 #endif /* PERIPH_1284 */ 244 245 static int 246 ppiopen(struct dev_open_args *ap) 247 { 248 cdev_t dev = ap->a_head.a_dev; 249 u_int unit = minor(dev); 250 struct ppi_data *ppi = UNITOSOFTC(unit); 251 device_t ppidev = UNITODEVICE(unit); 252 device_t ppbus = device_get_parent(ppidev); 253 int res; 254 255 if (!ppi) 256 return (ENXIO); 257 258 if (!(ppi->ppi_flags & HAVE_PPBUS)) { 259 if ((res = ppb_request_bus(ppbus, ppidev, 260 (ap->a_oflags & O_NONBLOCK) ? PPB_DONTWAIT : 261 (PPB_WAIT | PPB_INTR)))) 262 return (res); 263 264 ppi->ppi_flags |= HAVE_PPBUS; 265 266 #ifdef PERIPH_1284 267 if (ppi->intr_resource) { 268 /* register our interrupt handler */ 269 BUS_SETUP_INTR(device_get_parent(ppidev), ppidev, 270 ppi->intr_resource, 0, 271 ppiintr, dev, 272 &ppi->intr_cookie, NULL); 273 } 274 #endif /* PERIPH_1284 */ 275 } 276 ppi->ppi_count += 1; 277 278 return (0); 279 } 280 281 static int 282 ppiclose(struct dev_close_args *ap) 283 { 284 cdev_t dev = ap->a_head.a_dev; 285 u_int unit = minor(dev); 286 struct ppi_data *ppi = UNITOSOFTC(unit); 287 device_t ppidev = UNITODEVICE(unit); 288 device_t ppbus = device_get_parent(ppidev); 289 290 ppi->ppi_count --; 291 if (!ppi->ppi_count) { 292 293 #ifdef PERIPH_1284 294 switch (ppb_1284_get_state(ppbus)) { 295 case PPB_PERIPHERAL_IDLE: 296 ppb_peripheral_terminate(ppbus, 0); 297 break; 298 case PPB_REVERSE_IDLE: 299 case PPB_EPP_IDLE: 300 case PPB_ECP_FORWARD_IDLE: 301 default: 302 ppb_1284_terminate(ppbus); 303 break; 304 } 305 #endif /* PERIPH_1284 */ 306 307 /* unregistration of interrupt forced by release */ 308 ppb_release_bus(ppbus, ppidev); 309 310 ppi->ppi_flags &= ~HAVE_PPBUS; 311 } 312 313 return (0); 314 } 315 316 /* 317 * ppiread() 318 * 319 * IEEE1284 compliant read. 320 * 321 * First, try negociation to BYTE then NIBBLE mode 322 * If no data is available, wait for it otherwise transfer as much as possible 323 */ 324 static int 325 ppiread(struct dev_read_args *ap) 326 { 327 #ifdef PERIPH_1284 328 cdev_t dev = ap->a_head.a_dev; 329 struct uio *uio = ap->a_uio; 330 u_int unit = minor(dev); 331 struct ppi_data *ppi = UNITOSOFTC(unit); 332 device_t ppidev = UNITODEVICE(unit); 333 device_t ppbus = device_get_parent(ppidev); 334 int len, error = 0; 335 336 switch (ppb_1284_get_state(ppbus)) { 337 case PPB_PERIPHERAL_IDLE: 338 ppb_peripheral_terminate(ppbus, 0); 339 /* fall throught */ 340 341 case PPB_FORWARD_IDLE: 342 /* if can't negociate NIBBLE mode then try BYTE mode, 343 * the peripheral may be a computer 344 */ 345 if ((ppb_1284_negociate(ppbus, 346 ppi->ppi_mode = PPB_NIBBLE, 0))) { 347 348 /* XXX Wait 2 seconds to let the remote host some 349 * time to terminate its interrupt 350 */ 351 tsleep(ppi, 0, "ppiread", 2*hz); 352 353 if ((error = ppb_1284_negociate(ppbus, 354 ppi->ppi_mode = PPB_BYTE, 0))) 355 return (error); 356 } 357 break; 358 359 case PPB_REVERSE_IDLE: 360 case PPB_EPP_IDLE: 361 case PPB_ECP_FORWARD_IDLE: 362 default: 363 break; 364 } 365 366 #ifdef DEBUG_1284 367 kprintf("N"); 368 #endif 369 /* read data */ 370 len = 0; 371 while (uio->uio_resid) { 372 if ((error = ppb_1284_read(ppbus, ppi->ppi_mode, 373 ppi->ppi_buffer, min(BUFSIZE, uio->uio_resid), 374 &len))) { 375 goto error; 376 } 377 378 if (!len) 379 goto error; /* no more data */ 380 381 #ifdef DEBUG_1284 382 kprintf("d"); 383 #endif 384 if ((error = uiomove(ppi->ppi_buffer, len, uio))) 385 goto error; 386 } 387 388 error: 389 390 #else /* PERIPH_1284 */ 391 int error = ENODEV; 392 #endif 393 394 return (error); 395 } 396 397 /* 398 * ppiwrite() 399 * 400 * IEEE1284 compliant write 401 * 402 * Actually, this is the peripheral side of a remote IEEE1284 read 403 * 404 * The first part of the negociation (IEEE1284 device detection) is 405 * done at interrupt level, then the remaining is done by the writing 406 * process 407 * 408 * Once negociation done, transfer data 409 */ 410 static int 411 ppiwrite(struct dev_write_args *ap) 412 { 413 #ifdef PERIPH_1284 414 cdev_t dev = ap->a_head.a_dev; 415 struct uio *uio = ap->a_uio; 416 u_int unit = minor(dev); 417 struct ppi_data *ppi = UNITOSOFTC(unit); 418 device_t ppidev = UNITODEVICE(unit); 419 device_t ppbus = device_get_parent(ppidev); 420 int len, error = 0, sent; 421 422 #if 0 423 int ret; 424 425 #define ADDRESS MS_PARAM(0, 0, MS_TYP_PTR) 426 #define LENGTH MS_PARAM(0, 1, MS_TYP_INT) 427 428 struct ppb_microseq msq[] = { 429 { MS_OP_PUT, { MS_UNKNOWN, MS_UNKNOWN, MS_UNKNOWN } }, 430 MS_RET(0) 431 }; 432 433 /* negociate ECP mode */ 434 if (ppb_1284_negociate(ppbus, PPB_ECP, 0)) { 435 kprintf("ppiwrite: ECP negociation failed\n"); 436 } 437 438 while (!error && (len = min(uio->uio_resid, BUFSIZE))) { 439 uiomove(ppi->ppi_buffer, len, uio); 440 441 ppb_MS_init_msq(msq, 2, ADDRESS, ppi->ppi_buffer, LENGTH, len); 442 443 error = ppb_MS_microseq(ppbus, msq, &ret); 444 } 445 #endif 446 447 /* we have to be peripheral to be able to send data, so 448 * wait for the appropriate state 449 */ 450 if (ppb_1284_get_state(ppbus) < PPB_PERIPHERAL_NEGOCIATION) 451 ppb_1284_terminate(ppbus); 452 453 while (ppb_1284_get_state(ppbus) != PPB_PERIPHERAL_IDLE) { 454 /* XXX should check a variable before sleeping */ 455 #ifdef DEBUG_1284 456 kprintf("s"); 457 #endif 458 459 ppi_enable_intr(ppidev); 460 461 /* sleep until IEEE1284 negociation starts */ 462 error = tsleep(ppi, PCATCH, "ppiwrite", 0); 463 464 switch (error) { 465 case 0: 466 /* negociate peripheral side with BYTE mode */ 467 ppb_peripheral_negociate(ppbus, PPB_BYTE, 0); 468 break; 469 case EWOULDBLOCK: 470 break; 471 default: 472 goto error; 473 } 474 } 475 #ifdef DEBUG_1284 476 kprintf("N"); 477 #endif 478 479 /* negociation done, write bytes to master host */ 480 while ((len = min(uio->uio_resid, BUFSIZE)) != 0) { 481 uiomove(ppi->ppi_buffer, len, uio); 482 if ((error = byte_peripheral_write(ppbus, 483 ppi->ppi_buffer, len, &sent))) 484 goto error; 485 #ifdef DEBUG_1284 486 kprintf("d"); 487 #endif 488 } 489 490 error: 491 492 #else /* PERIPH_1284 */ 493 int error = ENODEV; 494 #endif 495 496 return (error); 497 } 498 499 static int 500 ppiioctl(struct dev_ioctl_args *ap) 501 { 502 cdev_t dev = ap->a_head.a_dev; 503 u_int unit = minor(dev); 504 device_t ppidev = UNITODEVICE(unit); 505 device_t ppbus = device_get_parent(ppidev); 506 int error = 0; 507 u_int8_t *val = (u_int8_t *)ap->a_data; 508 509 switch (ap->a_cmd) { 510 case PPIGDATA: /* get data register */ 511 *val = ppb_rdtr(ppbus); 512 break; 513 case PPIGSTATUS: /* get status bits */ 514 *val = ppb_rstr(ppbus); 515 break; 516 case PPIGCTRL: /* get control bits */ 517 *val = ppb_rctr(ppbus); 518 break; 519 case PPIGEPPD: /* get EPP data bits */ 520 *val = ppb_repp_D(ppbus); 521 break; 522 case PPIGECR: /* get ECP bits */ 523 *val = ppb_recr(ppbus); 524 break; 525 case PPIGFIFO: /* read FIFO */ 526 *val = ppb_rfifo(ppbus); 527 break; 528 case PPISDATA: /* set data register */ 529 ppb_wdtr(ppbus, *val); 530 break; 531 case PPISSTATUS: /* set status bits */ 532 ppb_wstr(ppbus, *val); 533 break; 534 case PPISCTRL: /* set control bits */ 535 ppb_wctr(ppbus, *val); 536 break; 537 case PPISEPPD: /* set EPP data bits */ 538 ppb_wepp_D(ppbus, *val); 539 break; 540 case PPISECR: /* set ECP bits */ 541 ppb_wecr(ppbus, *val); 542 break; 543 case PPISFIFO: /* write FIFO */ 544 ppb_wfifo(ppbus, *val); 545 break; 546 case PPIGEPPA: /* get EPP address bits */ 547 *val = ppb_repp_A(ppbus); 548 break; 549 case PPISEPPA: /* set EPP address bits */ 550 ppb_wepp_A(ppbus, *val); 551 break; 552 default: 553 error = ENOTTY; 554 break; 555 } 556 557 return (error); 558 } 559 560 /* 561 * Because ppi is a static device under any attached ppbuf, and not 562 * scanned by the ppbuf, we need an identify function to create the 563 * device. 564 */ 565 static device_method_t ppi_methods[] = { 566 /* device interface */ 567 DEVMETHOD(device_identify, bus_generic_identify), 568 DEVMETHOD(device_probe, ppi_probe), 569 DEVMETHOD(device_attach, ppi_attach), 570 571 { 0, 0 } 572 }; 573 574 static driver_t ppi_driver = { 575 "ppi", 576 ppi_methods, 577 sizeof(struct ppi_data), 578 }; 579 DRIVER_MODULE(ppi, ppbus, ppi_driver, ppi_devclass, 0, 0); 580