xref: /dragonfly/sys/dev/misc/ppi/ppi.c (revision d600454b)
1 /*-
2  * Copyright (c) 1997, 1998, 1999 Nicolas Souchu, Michael Smith
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD: src/sys/dev/ppbus/ppi.c,v 1.21.2.3 2000/08/07 18:24:43 peter Exp $
27  * $DragonFly: src/sys/dev/misc/ppi/ppi.c,v 1.11 2005/10/28 03:25:49 dillon Exp $
28  *
29  */
30 #include "opt_ppb_1284.h"
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/module.h>
35 #include <sys/bus.h>
36 #include <sys/conf.h>
37 #include <sys/kernel.h>
38 #include <sys/uio.h>
39 #include <sys/fcntl.h>
40 
41 #include <machine/clock.h>
42 #include <machine/bus.h>
43 #include <machine/resource.h>
44 #include <sys/rman.h>
45 
46 #include <bus/ppbus/ppbconf.h>
47 #include <bus/ppbus/ppb_msq.h>
48 
49 #ifdef PERIPH_1284
50 #include <bus/ppbus/ppb_1284.h>
51 #endif
52 
53 #include "ppi.h"
54 
55 #include "ppbus_if.h"
56 
57 #include <bus/ppbus/ppbio.h>
58 
59 #define BUFSIZE		512
60 
61 struct ppi_data {
62 
63     int		ppi_unit;
64     int		ppi_flags;
65 #define HAVE_PPBUS	(1<<0)
66 #define HAD_PPBUS	(1<<1)
67 
68     int		ppi_count;
69     int		ppi_mode;			/* IEEE1284 mode */
70     char	ppi_buffer[BUFSIZE];
71 
72 #ifdef PERIPH_1284
73     struct resource *intr_resource;	/* interrupt resource */
74     void *intr_cookie;			/* interrupt registration cookie */
75 #endif /* PERIPH_1284 */
76 };
77 
78 #define DEVTOSOFTC(dev) \
79 	((struct ppi_data *)device_get_softc(dev))
80 #define UNITOSOFTC(unit) \
81 	((struct ppi_data *)devclass_get_softc(ppi_devclass, (unit)))
82 #define UNITODEVICE(unit) \
83 	(devclass_get_device(ppi_devclass, (unit)))
84 
85 static devclass_t ppi_devclass;
86 
87 static	d_open_t	ppiopen;
88 static	d_close_t	ppiclose;
89 static	d_ioctl_t	ppiioctl;
90 static	d_write_t	ppiwrite;
91 static	d_read_t	ppiread;
92 
93 #define CDEV_MAJOR 82
94 static struct cdevsw ppi_cdevsw = {
95 	/* name */	"ppi",
96 	/* maj */	CDEV_MAJOR,
97 	/* flags */	0,
98 	/* port */	NULL,
99 	/* clone */	NULL,
100 
101 	/* open */	ppiopen,
102 	/* close */	ppiclose,
103 	/* read */	ppiread,
104 	/* write */	ppiwrite,
105 	/* ioctl */	ppiioctl,
106 	/* poll */	nopoll,
107 	/* mmap */	nommap,
108 	/* strategy */	nostrategy,
109 	/* dump */	nodump,
110 	/* psize */	nopsize
111 };
112 
113 #ifdef PERIPH_1284
114 
115 static void
116 ppi_enable_intr(device_t ppidev)
117 {
118 	char r;
119 	device_t ppbus = device_get_parent(ppidev);
120 
121 	r = ppb_rctr(ppbus);
122 	ppb_wctr(ppbus, r | IRQENABLE);
123 
124 	return;
125 }
126 
127 static void
128 ppi_disable_intr(device_t ppidev)
129 {
130 	char r;
131         device_t ppbus = device_get_parent(ppidev);
132 
133 	r = ppb_rctr(ppbus);
134 	ppb_wctr(ppbus, r & ~IRQENABLE);
135 
136 	return;
137 }
138 
139 #endif /* PERIPH_1284 */
140 
141 /*
142  * ppi_probe()
143  */
144 static int
145 ppi_probe(device_t dev)
146 {
147 	struct ppi_data *ppi;
148 
149 	/* probe is always ok */
150 	device_set_desc(dev, "Parallel I/O");
151 
152 	ppi = DEVTOSOFTC(dev);
153 	bzero(ppi, sizeof(struct ppi_data));
154 
155 	return (0);
156 }
157 
158 /*
159  * ppi_attach()
160  */
161 static int
162 ppi_attach(device_t dev)
163 {
164 #ifdef PERIPH_1284
165 	uintptr_t irq;
166 	int zero = 0;
167 	struct ppi_data *ppi = DEVTOSOFTC(dev);
168 
169 	/* retrive the irq */
170 	BUS_READ_IVAR(device_get_parent(dev), dev, PPBUS_IVAR_IRQ, &irq);
171 
172 	/* declare our interrupt handler */
173 	ppi->intr_resource = bus_alloc_resource(dev, SYS_RES_IRQ,
174 						&zero, irq, irq, 1, RF_ACTIVE);
175 #endif /* PERIPH_1284 */
176 
177 	cdevsw_add(&ppi_cdevsw, -1, device_get_unit(dev));
178 	make_dev(&ppi_cdevsw, device_get_unit(dev),	/* XXX cleanup */
179 		 UID_ROOT, GID_WHEEL,
180 		 0600, "ppi%d", device_get_unit(dev));
181 
182 	return (0);
183 }
184 
185 #ifdef PERIPH_1284
186 /*
187  * Cable
188  * -----
189  *
190  * Use an IEEE1284 compliant (DB25/DB25) cable with the following tricks:
191  *
192  * nStrobe   <-> nAck		1  <-> 10
193  * nAutofd   <-> Busy		11 <-> 14
194  * nSelectin <-> Select		17 <-> 13
195  * nInit     <-> nFault		15 <-> 16
196  *
197  */
198 static void
199 ppiintr(void *arg)
200 {
201 	device_t ppidev = (device_t)arg;
202         device_t ppbus = device_get_parent(ppidev);
203 	struct ppi_data *ppi = DEVTOSOFTC(ppidev);
204 
205 	ppi_disable_intr(ppidev);
206 
207 	switch (ppb_1284_get_state(ppbus)) {
208 
209 	/* accept IEEE1284 negociation then wakeup an waiting process to
210 	 * continue negociation at process level */
211 	case PPB_FORWARD_IDLE:
212 		/* Event 1 */
213 		if ((ppb_rstr(ppbus) & (SELECT | nBUSY)) ==
214 							(SELECT | nBUSY)) {
215 			/* IEEE1284 negociation */
216 #ifdef DEBUG_1284
217 			printf("N");
218 #endif
219 
220 			/* Event 2 - prepare for reading the ext. value */
221 			ppb_wctr(ppbus, (PCD | STROBE | nINIT) & ~SELECTIN);
222 
223 			ppb_1284_set_state(ppbus, PPB_NEGOCIATION);
224 
225 		} else {
226 #ifdef DEBUG_1284
227 			printf("0x%x", ppb_rstr(ppbus));
228 #endif
229 			ppb_peripheral_terminate(ppbus, PPB_DONTWAIT);
230 			break;
231 		}
232 
233 		/* wake up any process waiting for negociation from
234 		 * remote master host */
235 
236 		/* XXX should set a variable to warn the process about
237 		 * the interrupt */
238 
239 		wakeup(ppi);
240 		break;
241 	default:
242 #ifdef DEBUG_1284
243 		printf("?%d", ppb_1284_get_state(ppbus));
244 #endif
245 		ppb_1284_set_state(ppbus, PPB_FORWARD_IDLE);
246 		ppb_set_mode(ppbus, PPB_COMPATIBLE);
247 		break;
248 	}
249 
250 	ppi_enable_intr(ppidev);
251 
252 	return;
253 }
254 #endif /* PERIPH_1284 */
255 
256 static int
257 ppiopen(dev_t dev, int flags, int fmt, d_thread_t *td)
258 {
259 	u_int unit = minor(dev);
260 	struct ppi_data *ppi = UNITOSOFTC(unit);
261 	device_t ppidev = UNITODEVICE(unit);
262         device_t ppbus = device_get_parent(ppidev);
263 	int res;
264 
265 	if (!ppi)
266 		return (ENXIO);
267 
268 	if (!(ppi->ppi_flags & HAVE_PPBUS)) {
269 		if ((res = ppb_request_bus(ppbus, ppidev,
270 			(flags & O_NONBLOCK) ? PPB_DONTWAIT :
271 						(PPB_WAIT | PPB_INTR))))
272 			return (res);
273 
274 		ppi->ppi_flags |= HAVE_PPBUS;
275 
276 #ifdef PERIPH_1284
277 		if (ppi->intr_resource) {
278 			/* register our interrupt handler */
279 			BUS_SETUP_INTR(device_get_parent(ppidev), ppidev,
280 				       ppi->intr_resource, 0,
281 				       ppiintr, dev,
282 				       &ppi->intr_cookie, NULL);
283 		}
284 #endif /* PERIPH_1284 */
285 	}
286 	ppi->ppi_count += 1;
287 
288 	return (0);
289 }
290 
291 static int
292 ppiclose(dev_t dev, int flags, int fmt, d_thread_t *td)
293 {
294 	u_int unit = minor(dev);
295 	struct ppi_data *ppi = UNITOSOFTC(unit);
296 	device_t ppidev = UNITODEVICE(unit);
297         device_t ppbus = device_get_parent(ppidev);
298 
299 	ppi->ppi_count --;
300 	if (!ppi->ppi_count) {
301 
302 #ifdef PERIPH_1284
303 		switch (ppb_1284_get_state(ppbus)) {
304 		case PPB_PERIPHERAL_IDLE:
305 			ppb_peripheral_terminate(ppbus, 0);
306 			break;
307 		case PPB_REVERSE_IDLE:
308 		case PPB_EPP_IDLE:
309 		case PPB_ECP_FORWARD_IDLE:
310 		default:
311 			ppb_1284_terminate(ppbus);
312 			break;
313 		}
314 #endif /* PERIPH_1284 */
315 
316 		/* unregistration of interrupt forced by release */
317 		ppb_release_bus(ppbus, ppidev);
318 
319 		ppi->ppi_flags &= ~HAVE_PPBUS;
320 	}
321 
322 	return (0);
323 }
324 
325 /*
326  * ppiread()
327  *
328  * IEEE1284 compliant read.
329  *
330  * First, try negociation to BYTE then NIBBLE mode
331  * If no data is available, wait for it otherwise transfer as much as possible
332  */
333 static int
334 ppiread(dev_t dev, struct uio *uio, int ioflag)
335 {
336 #ifdef PERIPH_1284
337 	u_int unit = minor(dev);
338 	struct ppi_data *ppi = UNITOSOFTC(unit);
339 	device_t ppidev = UNITODEVICE(unit);
340         device_t ppbus = device_get_parent(ppidev);
341 	int len, error = 0;
342 
343 	switch (ppb_1284_get_state(ppbus)) {
344 	case PPB_PERIPHERAL_IDLE:
345 		ppb_peripheral_terminate(ppbus, 0);
346 		/* fall throught */
347 
348 	case PPB_FORWARD_IDLE:
349 		/* if can't negociate NIBBLE mode then try BYTE mode,
350 		 * the peripheral may be a computer
351 		 */
352 		if ((ppb_1284_negociate(ppbus,
353 			ppi->ppi_mode = PPB_NIBBLE, 0))) {
354 
355 			/* XXX Wait 2 seconds to let the remote host some
356 			 * time to terminate its interrupt
357 			 */
358 			tsleep(ppi, 0, "ppiread", 2*hz);
359 
360 			if ((error = ppb_1284_negociate(ppbus,
361 				ppi->ppi_mode = PPB_BYTE, 0)))
362 				return (error);
363 		}
364 		break;
365 
366 	case PPB_REVERSE_IDLE:
367 	case PPB_EPP_IDLE:
368 	case PPB_ECP_FORWARD_IDLE:
369 	default:
370 		break;
371 	}
372 
373 #ifdef DEBUG_1284
374 	printf("N");
375 #endif
376 	/* read data */
377 	len = 0;
378 	while (uio->uio_resid) {
379 		if ((error = ppb_1284_read(ppbus, ppi->ppi_mode,
380 			ppi->ppi_buffer, min(BUFSIZE, uio->uio_resid),
381 			&len))) {
382 			goto error;
383 		}
384 
385 		if (!len)
386 			goto error;		/* no more data */
387 
388 #ifdef DEBUG_1284
389 		printf("d");
390 #endif
391 		if ((error = uiomove(ppi->ppi_buffer, len, uio)))
392 			goto error;
393 	}
394 
395 error:
396 
397 #else /* PERIPH_1284 */
398 	int error = ENODEV;
399 #endif
400 
401 	return (error);
402 }
403 
404 /*
405  * ppiwrite()
406  *
407  * IEEE1284 compliant write
408  *
409  * Actually, this is the peripheral side of a remote IEEE1284 read
410  *
411  * The first part of the negociation (IEEE1284 device detection) is
412  * done at interrupt level, then the remaining is done by the writing
413  * process
414  *
415  * Once negociation done, transfer data
416  */
417 static int
418 ppiwrite(dev_t dev, struct uio *uio, int ioflag)
419 {
420 #ifdef PERIPH_1284
421 	u_int unit = minor(dev);
422 	struct ppi_data *ppi = UNITOSOFTC(unit);
423 	device_t ppidev = UNITODEVICE(unit);
424         device_t ppbus = device_get_parent(ppidev);
425 	int len, error = 0, sent;
426 
427 #if 0
428 	int ret;
429 
430 	#define ADDRESS		MS_PARAM(0, 0, MS_TYP_PTR)
431 	#define LENGTH		MS_PARAM(0, 1, MS_TYP_INT)
432 
433 	struct ppb_microseq msq[] = {
434 		  { MS_OP_PUT, { MS_UNKNOWN, MS_UNKNOWN, MS_UNKNOWN } },
435 		  MS_RET(0)
436 	};
437 
438 	/* negociate ECP mode */
439 	if (ppb_1284_negociate(ppbus, PPB_ECP, 0)) {
440 		printf("ppiwrite: ECP negociation failed\n");
441 	}
442 
443 	while (!error && (len = min(uio->uio_resid, BUFSIZE))) {
444 		uiomove(ppi->ppi_buffer, len, uio);
445 
446 		ppb_MS_init_msq(msq, 2, ADDRESS, ppi->ppi_buffer, LENGTH, len);
447 
448 		error = ppb_MS_microseq(ppbus, msq, &ret);
449 	}
450 #endif
451 
452 	/* we have to be peripheral to be able to send data, so
453 	 * wait for the appropriate state
454 	 */
455  	if (ppb_1284_get_state(ppbus) < PPB_PERIPHERAL_NEGOCIATION)
456 		ppb_1284_terminate(ppbus);
457 
458  	while (ppb_1284_get_state(ppbus) != PPB_PERIPHERAL_IDLE) {
459 		/* XXX should check a variable before sleeping */
460 #ifdef DEBUG_1284
461 		printf("s");
462 #endif
463 
464 		ppi_enable_intr(ppidev);
465 
466 		/* sleep until IEEE1284 negociation starts */
467 		error = tsleep(ppi, PCATCH, "ppiwrite", 0);
468 
469 		switch (error) {
470 		case 0:
471 			/* negociate peripheral side with BYTE mode */
472 			ppb_peripheral_negociate(ppbus, PPB_BYTE, 0);
473 			break;
474 		case EWOULDBLOCK:
475 			break;
476 		default:
477 			goto error;
478 		}
479 	}
480 #ifdef DEBUG_1284
481 	printf("N");
482 #endif
483 
484 	/* negociation done, write bytes to master host */
485 	while ((len = min(uio->uio_resid, BUFSIZE)) != 0) {
486 		uiomove(ppi->ppi_buffer, len, uio);
487 		if ((error = byte_peripheral_write(ppbus,
488 						ppi->ppi_buffer, len, &sent)))
489 			goto error;
490 #ifdef DEBUG_1284
491 		printf("d");
492 #endif
493 	}
494 
495 error:
496 
497 #else /* PERIPH_1284 */
498 	int error = ENODEV;
499 #endif
500 
501 	return (error);
502 }
503 
504 static int
505 ppiioctl(dev_t dev, u_long cmd, caddr_t data, int flags, d_thread_t *td)
506 {
507 	u_int unit = minor(dev);
508 	device_t ppidev = UNITODEVICE(unit);
509         device_t ppbus = device_get_parent(ppidev);
510 	int error = 0;
511 	u_int8_t *val = (u_int8_t *)data;
512 
513 	switch (cmd) {
514 
515 	case PPIGDATA:			/* get data register */
516 		*val = ppb_rdtr(ppbus);
517 		break;
518 	case PPIGSTATUS:		/* get status bits */
519 		*val = ppb_rstr(ppbus);
520 		break;
521 	case PPIGCTRL:			/* get control bits */
522 		*val = ppb_rctr(ppbus);
523 		break;
524 	case PPIGEPPD:			/* get EPP data bits */
525 		*val = ppb_repp_D(ppbus);
526 		break;
527 	case PPIGECR:			/* get ECP bits */
528 		*val = ppb_recr(ppbus);
529 		break;
530 	case PPIGFIFO:			/* read FIFO */
531 		*val = ppb_rfifo(ppbus);
532 		break;
533 	case PPISDATA:			/* set data register */
534 		ppb_wdtr(ppbus, *val);
535 		break;
536 	case PPISSTATUS:		/* set status bits */
537 		ppb_wstr(ppbus, *val);
538 		break;
539 	case PPISCTRL:			/* set control bits */
540 		ppb_wctr(ppbus, *val);
541 		break;
542 	case PPISEPPD:			/* set EPP data bits */
543 		ppb_wepp_D(ppbus, *val);
544 		break;
545 	case PPISECR:			/* set ECP bits */
546 		ppb_wecr(ppbus, *val);
547 		break;
548 	case PPISFIFO:			/* write FIFO */
549 		ppb_wfifo(ppbus, *val);
550 		break;
551 	case PPIGEPPA:			/* get EPP address bits */
552 		*val = ppb_repp_A(ppbus);
553 		break;
554 	case PPISEPPA:			/* set EPP address bits */
555 		ppb_wepp_A(ppbus, *val);
556 		break;
557 	default:
558 		error = ENOTTY;
559 		break;
560 	}
561 
562 	return (error);
563 }
564 
565 /*
566  * Because ppi is a static device under any attached ppbuf, and not
567  * scanned by the ppbuf, we need an identify function to create the
568  * device.
569  */
570 static device_method_t ppi_methods[] = {
571 	/* device interface */
572 	DEVMETHOD(device_identify,	bus_generic_identify),
573 	DEVMETHOD(device_probe,		ppi_probe),
574 	DEVMETHOD(device_attach,	ppi_attach),
575 
576 	{ 0, 0 }
577 };
578 
579 static driver_t ppi_driver = {
580 	"ppi",
581 	ppi_methods,
582 	sizeof(struct ppi_data),
583 };
584 DRIVER_MODULE(ppi, ppbus, ppi_driver, ppi_devclass, 0, 0);
585