xref: /dragonfly/sys/dev/misc/puc/puc.c (revision b40e316c)
1 /*
2  * $NetBSD: puc.c,v 1.7 2000/07/29 17:43:38 jlam Exp $
3  * $FreeBSD: src/sys/dev/puc/puc.c,v 1.3.2.5 2003/04/04 08:42:17 sobomax Exp $
4  * $DragonFly: src/sys/dev/misc/puc/puc.c,v 1.6 2004/05/13 19:44:33 dillon Exp $
5  */
6 
7 /*-
8  * Copyright (c) 2002 JF Hay.  All rights reserved.
9  * Copyright (c) 2000 M. Warner Losh.  All rights reserved.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice unmodified, this list of conditions, and the following
16  *    disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 /*
34  * Copyright (c) 1996, 1998, 1999
35  *	Christopher G. Demetriou.  All rights reserved.
36  *
37  * Redistribution and use in source and binary forms, with or without
38  * modification, are permitted provided that the following conditions
39  * are met:
40  * 1. Redistributions of source code must retain the above copyright
41  *    notice, this list of conditions and the following disclaimer.
42  * 2. Redistributions in binary form must reproduce the above copyright
43  *    notice, this list of conditions and the following disclaimer in the
44  *    documentation and/or other materials provided with the distribution.
45  * 3. All advertising materials mentioning features or use of this software
46  *    must display the following acknowledgement:
47  *      This product includes software developed by Christopher G. Demetriou
48  *	for the NetBSD Project.
49  * 4. The name of the author may not be used to endorse or promote products
50  *    derived from this software without specific prior written permission
51  *
52  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
53  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
54  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
55  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
56  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
57  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
61  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62  */
63 
64 /*
65  * PCI "universal" communication card device driver, glues com, lpt,
66  * and similar ports to PCI via bridge chip often much larger than
67  * the devices being glued.
68  *
69  * Author: Christopher G. Demetriou, May 14, 1998 (derived from NetBSD
70  * sys/dev/pci/pciide.c, revision 1.6).
71  *
72  * These devices could be (and some times are) described as
73  * communications/{serial,parallel}, etc. devices with known
74  * programming interfaces, but those programming interfaces (in
75  * particular the BAR assignments for devices, etc.) in fact are not
76  * particularly well defined.
77  *
78  * After I/we have seen more of these devices, it may be possible
79  * to generalize some of these bits.  In particular, devices which
80  * describe themselves as communications/serial/16[45]50, and
81  * communications/parallel/??? might be attached via direct
82  * 'com' and 'lpt' attachments to pci.
83  */
84 
85 #include <sys/param.h>
86 #include <sys/systm.h>
87 #include <sys/kernel.h>
88 #include <sys/bus.h>
89 #include <sys/conf.h>
90 #include <sys/malloc.h>
91 
92 #include <machine/bus.h>
93 #include <machine/resource.h>
94 #include <sys/rman.h>
95 
96 #include <bus/pci/pcireg.h>
97 #include <bus/pci/pcivar.h>
98 #include "pucvar.h"
99 
100 #include <opt_puc.h>
101 
102 struct puc_softc {
103 	const struct puc_device_description *sc_desc;
104 
105 	/* card-global dynamic data */
106 	int			barmuxed;
107 	int			irqrid;
108 	struct resource		*irqres;
109 	void			*intr_cookie;
110 	int			ilr_enabled;
111 	bus_space_tag_t		ilr_st;
112 	bus_space_handle_t	ilr_sh;
113 
114 	struct {
115 		struct resource	*res;
116 	} sc_bar_mappings[PUC_MAX_BAR];
117 
118 	/* per-port dynamic data */
119         struct {
120 		struct device	*dev;
121 		/* filled in by bus_setup_intr() */
122 		void		(*ihand) (void *);
123 		void		*ihandarg;
124         } sc_ports[PUC_MAX_PORTS];
125 };
126 
127 struct puc_device {
128 	struct resource_list resources;
129 	u_int serialfreq;
130 };
131 
132 static int puc_pci_probe(device_t dev);
133 static int puc_pci_attach(device_t dev);
134 static void puc_intr(void *arg);
135 
136 static struct resource *puc_alloc_resource(device_t, device_t, int, int *,
137     u_long, u_long, u_long, u_int);
138 static int puc_release_resource(device_t, device_t, int, int,
139     struct resource *);
140 static int puc_get_resource(device_t, device_t, int, int, u_long *, u_long *);
141 static int puc_setup_intr(device_t, device_t, struct resource *, int,
142     void (*)(void *), void *, void **);
143 static int puc_teardown_intr(device_t, device_t, struct resource *,
144     void *);
145 static int puc_read_ivar(device_t, device_t, int, uintptr_t *);
146 
147 static const struct puc_device_description *puc_find_description(uint32_t,
148     uint32_t, uint32_t, uint32_t);
149 static void puc_config_superio(device_t);
150 static void puc_config_win877(struct resource *);
151 static int puc_find_free_unit(char *);
152 #ifdef PUC_DEBUG
153 static void puc_print_win877(bus_space_tag_t, bus_space_handle_t, u_int,
154     u_int);
155 static void puc_print_resource_list(struct resource_list *);
156 #endif
157 
158 static int
159 puc_pci_probe(device_t dev)
160 {
161 	uint32_t v1, v2, d1, d2;
162 	const struct puc_device_description *desc;
163 
164 	if ((pci_read_config(dev, PCIR_HDRTYPE, 1) & PCIM_HDRTYPE) != 0)
165 		return (ENXIO);
166 
167 	v1 = pci_read_config(dev, PCIR_VENDOR, 2);
168 	d1 = pci_read_config(dev, PCIR_DEVICE, 2);
169 	v2 = pci_read_config(dev, PCIR_SUBVEND_0, 2);
170 	d2 = pci_read_config(dev, PCIR_SUBDEV_0, 2);
171 
172 	desc = puc_find_description(v1, d1, v2, d2);
173 	if (desc == NULL)
174 		return (ENXIO);
175 	device_set_desc(dev, desc->name);
176 	return (0);
177 }
178 
179 static int
180 puc_probe_ilr(struct puc_softc *sc, struct resource *res)
181 {
182 	u_char t1, t2;
183 	int i;
184 
185 	switch (sc->sc_desc->ilr_type) {
186 	case PUC_ILR_TYPE_DIGI:
187 		sc->ilr_st = rman_get_bustag(res);
188 		sc->ilr_sh = rman_get_bushandle(res);
189 		for (i = 0; i < 2; i++) {
190 			t1 = bus_space_read_1(sc->ilr_st, sc->ilr_sh,
191 			    sc->sc_desc->ilr_offset[i]);
192 			t1 = ~t1;
193 			bus_space_write_1(sc->ilr_st, sc->ilr_sh,
194 			    sc->sc_desc->ilr_offset[i], t1);
195 			t2 = bus_space_read_1(sc->ilr_st, sc->ilr_sh,
196 			    sc->sc_desc->ilr_offset[i]);
197 			if (t2 == t1)
198 				return (0);
199 		}
200 		return (1);
201 
202 	default:
203 		break;
204 	}
205 	return (0);
206 }
207 
208 static int
209 puc_pci_attach(device_t dev)
210 {
211 	char *typestr;
212 	int bidx, childunit, i, irq_setup, rid;
213 	uint32_t v1, v2, d1, d2;
214 	struct puc_softc *sc;
215 	struct puc_device *pdev;
216 	struct resource *res;
217 	struct resource_list_entry *rle;
218 
219 	sc = (struct puc_softc *)device_get_softc(dev);
220 	bzero(sc, sizeof(*sc));
221 	v1 = pci_read_config(dev, PCIR_VENDOR, 2);
222 	d1 = pci_read_config(dev, PCIR_DEVICE, 2);
223 	v2 = pci_read_config(dev, PCIR_SUBVEND_0, 2);
224 	d2 = pci_read_config(dev, PCIR_SUBDEV_0, 2);
225 	sc->sc_desc = puc_find_description(v1, d1, v2, d2);
226 	if (sc->sc_desc == NULL)
227 		return (ENXIO);
228 
229 #ifdef PUC_DEBUG
230 	bootverbose = 1;
231 
232 	printf("puc: name: %s\n", sc->sc_desc->name);
233 #endif
234 	rid = 0;
235 	res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
236 	    RF_ACTIVE | RF_SHAREABLE);
237 	if (!res)
238 		return (ENXIO);
239 
240 	sc->irqres = res;
241 	sc->irqrid = rid;
242 #ifdef PUC_FASTINTR
243 	irq_setup = BUS_SETUP_INTR(device_get_parent(dev), dev, res,
244 	    INTR_TYPE_TTY | INTR_FAST, puc_intr, sc, &sc->intr_cookie);
245 #else
246 	irq_setup = ENXIO;
247 #endif
248 	if (irq_setup != 0)
249 		irq_setup = BUS_SETUP_INTR(device_get_parent(dev), dev, res,
250 		    INTR_TYPE_TTY, puc_intr, sc, &sc->intr_cookie);
251 	if (irq_setup != 0)
252 		return (ENXIO);
253 
254 	rid = 0;
255 	for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
256 		if (rid == sc->sc_desc->ports[i].bar)
257 			sc->barmuxed = 1;
258 		rid = sc->sc_desc->ports[i].bar;
259 		bidx = PUC_PORT_BAR_INDEX(rid);
260 
261 		if (sc->sc_bar_mappings[bidx].res != NULL)
262 			continue;
263 		res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
264 		    0ul, ~0ul, 1, RF_ACTIVE);
265 		if (res == NULL) {
266 			printf("could not get resource\n");
267 			continue;
268 		}
269 		sc->sc_bar_mappings[bidx].res = res;
270 
271 		if (sc->sc_desc->ilr_type != PUC_ILR_TYPE_NONE) {
272 			sc->ilr_enabled = puc_probe_ilr(sc, res);
273 			if (sc->ilr_enabled)
274 				device_printf(dev, "ILR enabled\n");
275 			else
276 				device_printf(dev, "ILR disabled\n");
277 		}
278 #ifdef PUC_DEBUG
279 		printf("port bst %x, start %x, end %x\n",
280 		    (u_int)rman_get_bustag(res), (u_int)rman_get_start(res),
281 		    (u_int)rman_get_end(res));
282 #endif
283 	}
284 
285 	puc_config_superio(dev);
286 
287 	for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
288 		rid = sc->sc_desc->ports[i].bar;
289 		bidx = PUC_PORT_BAR_INDEX(rid);
290 		if (sc->sc_bar_mappings[bidx].res == NULL)
291 			continue;
292 
293 		switch (sc->sc_desc->ports[i].type) {
294 		case PUC_PORT_TYPE_COM:
295 			typestr = "sio";
296 			break;
297 		default:
298 			continue;
299 		}
300 		pdev = malloc(sizeof(struct puc_device), M_DEVBUF,
301 				M_WAITOK | M_ZERO);
302 		resource_list_init(&pdev->resources);
303 
304 		/* First fake up an IRQ resource. */
305 		resource_list_add(&pdev->resources, SYS_RES_IRQ, 0,
306 		    rman_get_start(sc->irqres), rman_get_end(sc->irqres),
307 		    rman_get_end(sc->irqres) - rman_get_start(sc->irqres) + 1);
308 		rle = resource_list_find(&pdev->resources, SYS_RES_IRQ, 0);
309 		rle->res = sc->irqres;
310 
311 		/* Now fake an IOPORT resource */
312 		res = sc->sc_bar_mappings[bidx].res;
313 		resource_list_add(&pdev->resources, SYS_RES_IOPORT, 0,
314 		    rman_get_start(res) + sc->sc_desc->ports[i].offset,
315 		    rman_get_end(res) + sc->sc_desc->ports[i].offset + 8 - 1,
316 		    8);
317 		rle = resource_list_find(&pdev->resources, SYS_RES_IOPORT, 0);
318 
319 		if (sc->barmuxed == 0) {
320 			rle->res = sc->sc_bar_mappings[bidx].res;
321 		} else {
322 			rle->res = malloc(sizeof(struct resource), M_DEVBUF,
323 			    M_WAITOK | M_ZERO);
324 			if (rle->res == NULL) {
325 				free(pdev, M_DEVBUF);
326 				return (ENOMEM);
327 			}
328 
329 			rle->res->r_start = rman_get_start(res) +
330 			    sc->sc_desc->ports[i].offset;
331 			rle->res->r_end = rle->res->r_start + 8 - 1;
332 			rle->res->r_bustag = rman_get_bustag(res);
333 			bus_space_subregion(rle->res->r_bustag,
334 			    rman_get_bushandle(res),
335 			    sc->sc_desc->ports[i].offset, 8,
336 			    &rle->res->r_bushandle);
337 		}
338 
339 		pdev->serialfreq = sc->sc_desc->ports[i].serialfreq;
340 
341 		childunit = puc_find_free_unit(typestr);
342 		sc->sc_ports[i].dev = device_add_child(dev, typestr, childunit);
343 		if (sc->sc_ports[i].dev == NULL) {
344 			if (sc->barmuxed) {
345 				bus_space_unmap(rman_get_bustag(rle->res),
346 						rman_get_bushandle(rle->res),
347 						8);
348 				free(rle->res, M_DEVBUF);
349 				free(pdev, M_DEVBUF);
350 			}
351 			continue;
352 		}
353 		device_set_ivars(sc->sc_ports[i].dev, pdev);
354 		device_set_desc(sc->sc_ports[i].dev, sc->sc_desc->name);
355 		if (!bootverbose)
356 			device_quiet(sc->sc_ports[i].dev);
357 #ifdef PUC_DEBUG
358 		printf("puc: type %d, bar %x, offset %x\n",
359 		    sc->sc_desc->ports[i].type,
360 		    sc->sc_desc->ports[i].bar,
361 		    sc->sc_desc->ports[i].offset);
362 		print_resource_list(&pdev->resources);
363 #endif
364 		device_set_flags(sc->sc_ports[i].dev,
365 		    sc->sc_desc->ports[i].flags);
366 		if (device_probe_and_attach(sc->sc_ports[i].dev) != 0) {
367 			if (sc->barmuxed) {
368 				bus_space_unmap(rman_get_bustag(rle->res),
369 						rman_get_bushandle(rle->res),
370 						8);
371 				free(rle->res, M_DEVBUF);
372 				free(pdev, M_DEVBUF);
373 			}
374 		}
375 	}
376 
377 #ifdef PUC_DEBUG
378 	bootverbose = 0;
379 #endif
380 	return (0);
381 }
382 
383 static u_int32_t
384 puc_ilr_read(struct puc_softc *sc)
385 {
386 	u_int32_t mask;
387 	int i;
388 
389 	mask = 0;
390 	switch (sc->sc_desc->ilr_type) {
391 	case PUC_ILR_TYPE_DIGI:
392 		for (i = 1; i >= 0; i--) {
393 			mask = (mask << 8) | (bus_space_read_1(sc->ilr_st,
394 			    sc->ilr_sh, sc->sc_desc->ilr_offset[i]) & 0xff);
395 		}
396 		break;
397 
398 	default:
399 		mask = 0xffffffff;
400 		break;
401 	}
402 	return (mask);
403 }
404 
405 /*
406  * This is an interrupt handler. For boards that can't tell us which
407  * device generated the interrupt it just calls all the registered
408  * handlers sequencially, but for boards that can tell us which
409  * device(s) generated the interrupt it calls only handlers for devices
410  * that actually generated the interrupt.
411  */
412 static void
413 puc_intr(void *arg)
414 {
415 	int i;
416 	u_int32_t ilr_mask;
417 	struct puc_softc *sc;
418 
419 	sc = (struct puc_softc *)arg;
420 	ilr_mask = sc->ilr_enabled ? puc_ilr_read(sc) : 0xffffffff;
421 	for (i = 0; i < PUC_MAX_PORTS; i++)
422 		if (sc->sc_ports[i].ihand != NULL &&
423 		    ((ilr_mask >> i) & 0x00000001))
424 			(sc->sc_ports[i].ihand)(sc->sc_ports[i].ihandarg);
425 }
426 
427 static const struct puc_device_description *
428 puc_find_description(uint32_t vend, uint32_t prod, uint32_t svend,
429     uint32_t sprod)
430 {
431 	int i;
432 
433 #define checkreg(val, index) \
434     (((val) & puc_devices[i].rmask[(index)]) == puc_devices[i].rval[(index)])
435 
436 	for (i = 0; puc_devices[i].name != NULL; i++) {
437 		if (checkreg(vend, PUC_REG_VEND) &&
438 		    checkreg(prod, PUC_REG_PROD) &&
439 		    checkreg(svend, PUC_REG_SVEND) &&
440 		    checkreg(sprod, PUC_REG_SPROD))
441 			return (&puc_devices[i]);
442 	}
443 
444 #undef checkreg
445 
446 	return (NULL);
447 }
448 
449 /*
450  * It might be possible to make these more generic if we can detect patterns.
451  * For instance maybe if the size of a bar is 0x400 (the old isa space) it
452  * might contain one or more superio chips.
453  */
454 static void
455 puc_config_superio(device_t dev)
456 {
457 	struct puc_softc *sc = (struct puc_softc *)device_get_softc(dev);
458 
459 	if (sc->sc_desc->rval[PUC_REG_VEND] == 0x1592 &&
460 	    sc->sc_desc->rval[PUC_REG_PROD] == 0x0781)
461 		puc_config_win877(sc->sc_bar_mappings[0].res);
462 }
463 
464 #define rdspio(indx)		(bus_space_write_1(bst, bsh, efir, indx), \
465 				bus_space_read_1(bst, bsh, efdr))
466 #define wrspio(indx,data)	(bus_space_write_1(bst, bsh, efir, indx), \
467 				bus_space_write_1(bst, bsh, efdr, data))
468 
469 #ifdef PUC_DEBUG
470 static void
471 puc_print_win877(bus_space_tag_t bst, bus_space_handle_t bsh, u_int efir,
472 	u_int efdr)
473 {
474 	u_char cr00, cr01, cr04, cr09, cr0d, cr14, cr15, cr16, cr17;
475 	u_char cr18, cr19, cr24, cr25, cr28, cr2c, cr31, cr32;
476 
477 	cr00 = rdspio(0x00);
478 	cr01 = rdspio(0x01);
479 	cr04 = rdspio(0x04);
480 	cr09 = rdspio(0x09);
481 	cr0d = rdspio(0x0d);
482 	cr14 = rdspio(0x14);
483 	cr15 = rdspio(0x15);
484 	cr16 = rdspio(0x16);
485 	cr17 = rdspio(0x17);
486 	cr18 = rdspio(0x18);
487 	cr19 = rdspio(0x19);
488 	cr24 = rdspio(0x24);
489 	cr25 = rdspio(0x25);
490 	cr28 = rdspio(0x28);
491 	cr2c = rdspio(0x2c);
492 	cr31 = rdspio(0x31);
493 	cr32 = rdspio(0x32);
494 	printf("877T: cr00 %x, cr01 %x, cr04 %x, cr09 %x, cr0d %x, cr14 %x, "
495 	    "cr15 %x, cr16 %x, cr17 %x, cr18 %x, cr19 %x, cr24 %x, cr25 %x, "
496 	    "cr28 %x, cr2c %x, cr31 %x, cr32 %x\n", cr00, cr01, cr04, cr09,
497 	    cr0d, cr14, cr15, cr16, cr17,
498 	    cr18, cr19, cr24, cr25, cr28, cr2c, cr31, cr32);
499 }
500 #endif
501 
502 static void
503 puc_config_win877(struct resource *res)
504 {
505 	u_char val;
506 	u_int efir, efdr;
507 	bus_space_tag_t bst;
508 	bus_space_handle_t bsh;
509 
510 	bst = rman_get_bustag(res);
511 	bsh = rman_get_bushandle(res);
512 
513 	/* configure the first W83877TF */
514 	bus_space_write_1(bst, bsh, 0x250, 0x89);
515 	efir = 0x251;
516 	efdr = 0x252;
517 	val = rdspio(0x09) & 0x0f;
518 	if (val != 0x0c) {
519 		printf("conf_win877: Oops not a W83877TF\n");
520 		return;
521 	}
522 
523 #ifdef PUC_DEBUG
524 	printf("before: ");
525 	puc_print_win877(bst, bsh, efir, efdr);
526 #endif
527 
528 	val = rdspio(0x16);
529 	val |= 0x04;
530 	wrspio(0x16, val);
531 	val &= ~0x04;
532 	wrspio(0x16, val);
533 
534 	wrspio(0x24, 0x2e8 >> 2);
535 	wrspio(0x25, 0x2f8 >> 2);
536 	wrspio(0x17, 0x03);
537 	wrspio(0x28, 0x43);
538 
539 #ifdef PUC_DEBUG
540 	printf("after: ");
541 	puc_print_win877(bst, bsh, efir, efdr);
542 #endif
543 
544 	bus_space_write_1(bst, bsh, 0x250, 0xaa);
545 
546 	/* configure the second W83877TF */
547 	bus_space_write_1(bst, bsh, 0x3f0, 0x87);
548 	bus_space_write_1(bst, bsh, 0x3f0, 0x87);
549 	efir = 0x3f0;
550 	efdr = 0x3f1;
551 	val = rdspio(0x09) & 0x0f;
552 	if (val != 0x0c) {
553 		printf("conf_win877: Oops not a W83877TF\n");
554 		return;
555 	}
556 
557 #ifdef PUC_DEBUG
558 	printf("before: ");
559 	puc_print_win877(bst, bsh, efir, efdr);
560 #endif
561 
562 	val = rdspio(0x16);
563 	val |= 0x04;
564 	wrspio(0x16, val);
565 	val &= ~0x04;
566 	wrspio(0x16, val);
567 
568 	wrspio(0x24, 0x3e8 >> 2);
569 	wrspio(0x25, 0x3f8 >> 2);
570 	wrspio(0x17, 0x03);
571 	wrspio(0x28, 0x43);
572 
573 #ifdef PUC_DEBUG
574 	printf("after: ");
575 	puc_print_win877(bst, bsh, efir, efdr);
576 #endif
577 
578 	bus_space_write_1(bst, bsh, 0x3f0, 0xaa);
579 }
580 
581 #undef rdspio
582 #undef wrspio
583 
584 static int puc_find_free_unit(char *name)
585 {
586 	devclass_t dc;
587 	int start;
588 	int unit;
589 
590 	unit = 0;
591 	start = 0;
592 	while (resource_int_value(name, unit, "port", &start) == 0 &&
593 	    start > 0)
594 		unit++;
595 	dc = devclass_find(name);
596 	if (dc == NULL)
597 		return (-1);
598 	while (devclass_get_device(dc, unit))
599 		unit++;
600 #ifdef PUC_DEBUG
601 	printf("puc: Using %s%d\n", name, unit);
602 #endif
603 	return (unit);
604 }
605 
606 #ifdef PUC_DEBUG
607 static void
608 puc_print_resource_list(struct resource_list *rl)
609 {
610 	struct resource_list_entry *rle;
611 
612 	printf("print_resource_list: rl %p\n", rl);
613 	SLIST_FOREACH(rle, rl, link)
614 		printf("type %x, rid %x\n", rle->type, rle->rid);
615 	printf("print_resource_list: end.\n");
616 }
617 #endif
618 
619 static struct resource *
620 puc_alloc_resource(device_t dev, device_t child, int type, int *rid,
621     u_long start, u_long end, u_long count, u_int flags)
622 {
623 	struct puc_device *pdev;
624 	struct resource *retval;
625 	struct resource_list *rl;
626 	struct resource_list_entry *rle;
627 
628 	pdev = device_get_ivars(child);
629 	rl = &pdev->resources;
630 
631 #ifdef PUC_DEBUG
632 	printf("puc_alloc_resource: pdev %p, looking for t %x, r %x\n",
633 	    pdev, type, *rid);
634 	puc_print_resource_list(rl);
635 #endif
636 	retval = NULL;
637 	rle = resource_list_find(rl, type, *rid);
638 	if (rle) {
639 		start = rle->start;
640 		end = rle->end;
641 		count = rle->count;
642 #ifdef PUC_DEBUG
643 		printf("found rle, %lx, %lx, %lx\n", start, end, count);
644 #endif
645 		retval = rle->res;
646 	} else
647 		printf("oops rle is gone\n");
648 
649 	return (retval);
650 }
651 
652 static int
653 puc_release_resource(device_t dev, device_t child, int type, int rid,
654     struct resource *res)
655 {
656 	return (0);
657 }
658 
659 static int
660 puc_get_resource(device_t dev, device_t child, int type, int rid,
661     u_long *startp, u_long *countp)
662 {
663 	struct puc_device *pdev;
664 	struct resource_list *rl;
665 	struct resource_list_entry *rle;
666 
667 	pdev = device_get_ivars(child);
668 	rl = &pdev->resources;
669 
670 #ifdef PUC_DEBUG
671 	printf("puc_get_resource: pdev %p, looking for t %x, r %x\n", pdev,
672 	    type, rid);
673 	puc_print_resource_list(rl);
674 #endif
675 	rle = resource_list_find(rl, type, rid);
676 	if (rle) {
677 #ifdef PUC_DEBUG
678 		printf("found rle %p,", rle);
679 #endif
680 		if (startp != NULL)
681 			*startp = rle->start;
682 		if (countp != NULL)
683 			*countp = rle->count;
684 #ifdef PUC_DEBUG
685 		printf(" %lx, %lx\n", rle->start, rle->count);
686 #endif
687 		return (0);
688 	} else
689 		printf("oops rle is gone\n");
690 	return (ENXIO);
691 }
692 
693 static int
694 puc_setup_intr(device_t dev, device_t child, struct resource *r, int flags,
695 	       void (*ihand)(void *), void *arg, void **cookiep)
696 {
697 	int i;
698 	struct puc_softc *sc;
699 
700 	sc = (struct puc_softc *)device_get_softc(dev);
701 	for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
702 		if (sc->sc_ports[i].dev == child) {
703 			if (sc->sc_ports[i].ihand != 0)
704 				return (ENXIO);
705 			sc->sc_ports[i].ihand = ihand;
706 			sc->sc_ports[i].ihandarg = arg;
707 			*cookiep = arg;
708 			return (0);
709 		}
710 	}
711 	return (ENXIO);
712 }
713 
714 static int
715 puc_teardown_intr(device_t dev, device_t child, struct resource *r,
716 		  void *cookie)
717 {
718 	int i;
719 	struct puc_softc *sc;
720 
721 	sc = (struct puc_softc *)device_get_softc(dev);
722 	for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
723 		if (sc->sc_ports[i].dev == child) {
724 			sc->sc_ports[i].ihand = NULL;
725 			sc->sc_ports[i].ihandarg = NULL;
726 			return (0);
727 		}
728 	}
729 	return (ENXIO);
730 }
731 
732 static int
733 puc_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
734 {
735 	struct puc_device *pdev;
736 
737 	pdev = device_get_ivars(child);
738 	if (pdev == NULL)
739 		return (ENOENT);
740 
741 	switch(index) {
742 	case PUC_IVAR_FREQ:
743 		*result = pdev->serialfreq;
744 		break;
745 	default:
746 		return (ENOENT);
747 	}
748 	return (0);
749 }
750 
751 static device_method_t puc_pci_methods[] = {
752     /* Device interface */
753     DEVMETHOD(device_probe,		puc_pci_probe),
754     DEVMETHOD(device_attach,		puc_pci_attach),
755 
756     DEVMETHOD(bus_alloc_resource,	puc_alloc_resource),
757     DEVMETHOD(bus_release_resource,	puc_release_resource),
758     DEVMETHOD(bus_get_resource,		puc_get_resource),
759     DEVMETHOD(bus_read_ivar,		puc_read_ivar),
760     DEVMETHOD(bus_setup_intr,		puc_setup_intr),
761     DEVMETHOD(bus_teardown_intr,	puc_teardown_intr),
762     DEVMETHOD(bus_print_child,		bus_generic_print_child),
763     DEVMETHOD(bus_driver_added,		bus_generic_driver_added),
764     { 0, 0 }
765 };
766 
767 static driver_t puc_pci_driver = {
768 	"puc",
769 	puc_pci_methods,
770 	sizeof(struct puc_softc),
771 };
772 
773 static devclass_t puc_devclass;
774 
775 DRIVER_MODULE(puc, pci, puc_pci_driver, puc_devclass, 0, 0);
776