xref: /dragonfly/sys/dev/misc/puc/puc.c (revision c3b249e6)
1 /*
2  * $NetBSD: puc.c,v 1.7 2000/07/29 17:43:38 jlam Exp $
3  * $FreeBSD: src/sys/dev/puc/puc.c,v 1.3.2.5 2003/04/04 08:42:17 sobomax Exp $
4  * $DragonFly: src/sys/dev/misc/puc/puc.c,v 1.12 2008/01/06 16:55:50 swildner Exp $
5  */
6 
7 /*-
8  * Copyright (c) 2002 JF Hay.  All rights reserved.
9  * Copyright (c) 2000 M. Warner Losh.  All rights reserved.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice unmodified, this list of conditions, and the following
16  *    disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 /*
34  * Copyright (c) 1996, 1998, 1999
35  *	Christopher G. Demetriou.  All rights reserved.
36  *
37  * Redistribution and use in source and binary forms, with or without
38  * modification, are permitted provided that the following conditions
39  * are met:
40  * 1. Redistributions of source code must retain the above copyright
41  *    notice, this list of conditions and the following disclaimer.
42  * 2. Redistributions in binary form must reproduce the above copyright
43  *    notice, this list of conditions and the following disclaimer in the
44  *    documentation and/or other materials provided with the distribution.
45  * 3. All advertising materials mentioning features or use of this software
46  *    must display the following acknowledgement:
47  *      This product includes software developed by Christopher G. Demetriou
48  *	for the NetBSD Project.
49  * 4. The name of the author may not be used to endorse or promote products
50  *    derived from this software without specific prior written permission
51  *
52  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
53  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
54  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
55  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
56  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
57  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
61  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62  */
63 
64 /*
65  * PCI "universal" communication card device driver, glues com, lpt,
66  * and similar ports to PCI via bridge chip often much larger than
67  * the devices being glued.
68  *
69  * Author: Christopher G. Demetriou, May 14, 1998 (derived from NetBSD
70  * sys/dev/pci/pciide.c, revision 1.6).
71  *
72  * These devices could be (and some times are) described as
73  * communications/{serial,parallel}, etc. devices with known
74  * programming interfaces, but those programming interfaces (in
75  * particular the BAR assignments for devices, etc.) in fact are not
76  * particularly well defined.
77  *
78  * After I/we have seen more of these devices, it may be possible
79  * to generalize some of these bits.  In particular, devices which
80  * describe themselves as communications/serial/16[45]50, and
81  * communications/parallel/??? might be attached via direct
82  * 'com' and 'lpt' attachments to pci.
83  */
84 
85 #include <sys/param.h>
86 #include <sys/systm.h>
87 #include <sys/kernel.h>
88 #include <sys/bus.h>
89 #include <sys/conf.h>
90 #include <sys/malloc.h>
91 #include <sys/rman.h>
92 
93 #include <bus/pci/pcireg.h>
94 #include <bus/pci/pcivar.h>
95 #include "pucvar.h"
96 
97 #include <opt_puc.h>
98 
99 struct puc_softc {
100 	const struct puc_device_description *sc_desc;
101 
102 	/* card-global dynamic data */
103 	int			barmuxed;
104 	int			irqrid;
105 	struct resource		*irqres;
106 	void			*intr_cookie;
107 	int			ilr_enabled;
108 	bus_space_tag_t		ilr_st;
109 	bus_space_handle_t	ilr_sh;
110 
111 	struct {
112 		struct resource	*res;
113 	} sc_bar_mappings[PUC_MAX_BAR];
114 
115 	/* per-port dynamic data */
116         struct {
117 		struct device	*dev;
118 		/* filled in by bus_setup_intr() */
119 		void		(*ihand) (void *);
120 		void		*ihandarg;
121         } sc_ports[PUC_MAX_PORTS];
122 };
123 
124 struct puc_device {
125 	struct resource_list resources;
126 	u_int serialfreq;
127 };
128 
129 static int puc_pci_probe(device_t dev);
130 static int puc_pci_attach(device_t dev);
131 static void puc_intr(void *arg);
132 
133 static struct resource *puc_alloc_resource(device_t, device_t, int, int *,
134     u_long, u_long, u_long, u_int);
135 static int puc_release_resource(device_t, device_t, int, int,
136     struct resource *);
137 static int puc_get_resource(device_t, device_t, int, int, u_long *, u_long *);
138 static int puc_setup_intr(device_t, device_t, struct resource *, int,
139     void (*)(void *), void *, void **, lwkt_serialize_t);
140 static int puc_teardown_intr(device_t, device_t, struct resource *,
141     void *);
142 static int puc_read_ivar(device_t, device_t, int, uintptr_t *);
143 
144 static const struct puc_device_description *puc_find_description(uint32_t,
145     uint32_t, uint32_t, uint32_t);
146 static void puc_config_superio(device_t);
147 static void puc_config_win877(struct resource *);
148 static int puc_find_free_unit(char *);
149 #ifdef PUC_DEBUG
150 static void puc_print_win877(bus_space_tag_t, bus_space_handle_t, u_int,
151     u_int);
152 static void puc_print_resource_list(struct resource_list *);
153 #endif
154 
155 static int
156 puc_pci_probe(device_t dev)
157 {
158 	uint32_t v1, v2, d1, d2;
159 	const struct puc_device_description *desc;
160 
161 	if ((pci_read_config(dev, PCIR_HDRTYPE, 1) & PCIM_HDRTYPE) != 0)
162 		return (ENXIO);
163 
164 	v1 = pci_read_config(dev, PCIR_VENDOR, 2);
165 	d1 = pci_read_config(dev, PCIR_DEVICE, 2);
166 	v2 = pci_read_config(dev, PCIR_SUBVEND_0, 2);
167 	d2 = pci_read_config(dev, PCIR_SUBDEV_0, 2);
168 
169 	desc = puc_find_description(v1, d1, v2, d2);
170 	if (desc == NULL)
171 		return (ENXIO);
172 	device_set_desc(dev, desc->name);
173 	return (0);
174 }
175 
176 static int
177 puc_probe_ilr(struct puc_softc *sc, struct resource *res)
178 {
179 	u_char t1, t2;
180 	int i;
181 
182 	switch (sc->sc_desc->ilr_type) {
183 	case PUC_ILR_TYPE_DIGI:
184 		sc->ilr_st = rman_get_bustag(res);
185 		sc->ilr_sh = rman_get_bushandle(res);
186 		for (i = 0; i < 2; i++) {
187 			t1 = bus_space_read_1(sc->ilr_st, sc->ilr_sh,
188 			    sc->sc_desc->ilr_offset[i]);
189 			t1 = ~t1;
190 			bus_space_write_1(sc->ilr_st, sc->ilr_sh,
191 			    sc->sc_desc->ilr_offset[i], t1);
192 			t2 = bus_space_read_1(sc->ilr_st, sc->ilr_sh,
193 			    sc->sc_desc->ilr_offset[i]);
194 			if (t2 == t1)
195 				return (0);
196 		}
197 		return (1);
198 
199 	default:
200 		break;
201 	}
202 	return (0);
203 }
204 
205 static int
206 puc_pci_attach(device_t dev)
207 {
208 	char *typestr;
209 	int bidx, childunit, i, irq_setup, rid;
210 	uint32_t v1, v2, d1, d2;
211 	struct puc_softc *sc;
212 	struct puc_device *pdev;
213 	struct resource *res;
214 	struct resource_list_entry *rle;
215 
216 	sc = (struct puc_softc *)device_get_softc(dev);
217 	bzero(sc, sizeof(*sc));
218 	v1 = pci_read_config(dev, PCIR_VENDOR, 2);
219 	d1 = pci_read_config(dev, PCIR_DEVICE, 2);
220 	v2 = pci_read_config(dev, PCIR_SUBVEND_0, 2);
221 	d2 = pci_read_config(dev, PCIR_SUBDEV_0, 2);
222 	sc->sc_desc = puc_find_description(v1, d1, v2, d2);
223 	if (sc->sc_desc == NULL)
224 		return (ENXIO);
225 
226 #ifdef PUC_DEBUG
227 	bootverbose = 1;
228 
229 	kprintf("puc: name: %s\n", sc->sc_desc->name);
230 #endif
231 	rid = 0;
232 	res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
233 	    RF_ACTIVE | RF_SHAREABLE);
234 	if (!res)
235 		return (ENXIO);
236 
237 	sc->irqres = res;
238 	sc->irqrid = rid;
239 #ifdef PUC_FASTINTR
240 	irq_setup = BUS_SETUP_INTR(device_get_parent(dev), dev, res,
241 				   INTR_FAST, puc_intr, sc,
242 				   &sc->intr_cookie, NULL);
243 #else
244 	irq_setup = ENXIO;
245 #endif
246 	if (irq_setup != 0)
247 		irq_setup = BUS_SETUP_INTR(device_get_parent(dev), dev, res,
248 					   0, puc_intr, sc,
249 					   &sc->intr_cookie, NULL);
250 	if (irq_setup != 0)
251 		return (ENXIO);
252 
253 	rid = 0;
254 	for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
255 		if (rid == sc->sc_desc->ports[i].bar)
256 			sc->barmuxed = 1;
257 		rid = sc->sc_desc->ports[i].bar;
258 		bidx = PUC_PORT_BAR_INDEX(rid);
259 
260 		if (sc->sc_bar_mappings[bidx].res != NULL)
261 			continue;
262 		res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
263 		    0ul, ~0ul, 1, RF_ACTIVE);
264 		if (res == NULL) {
265 			kprintf("could not get resource\n");
266 			continue;
267 		}
268 		sc->sc_bar_mappings[bidx].res = res;
269 
270 		if (sc->sc_desc->ilr_type != PUC_ILR_TYPE_NONE) {
271 			sc->ilr_enabled = puc_probe_ilr(sc, res);
272 			if (sc->ilr_enabled)
273 				device_printf(dev, "ILR enabled\n");
274 			else
275 				device_printf(dev, "ILR disabled\n");
276 		}
277 #ifdef PUC_DEBUG
278 		kprintf("port bst %x, start %x, end %x\n",
279 		    (u_int)rman_get_bustag(res), (u_int)rman_get_start(res),
280 		    (u_int)rman_get_end(res));
281 #endif
282 	}
283 
284 	puc_config_superio(dev);
285 
286 	for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
287 		rid = sc->sc_desc->ports[i].bar;
288 		bidx = PUC_PORT_BAR_INDEX(rid);
289 		if (sc->sc_bar_mappings[bidx].res == NULL)
290 			continue;
291 
292 		switch (sc->sc_desc->ports[i].type) {
293 		case PUC_PORT_TYPE_COM:
294 			typestr = "sio";
295 			break;
296 		default:
297 			continue;
298 		}
299 		pdev = kmalloc(sizeof(struct puc_device), M_DEVBUF,
300 				M_WAITOK | M_ZERO);
301 		resource_list_init(&pdev->resources);
302 
303 		/* First fake up an IRQ resource. */
304 		resource_list_add(&pdev->resources, SYS_RES_IRQ, 0,
305 		    rman_get_start(sc->irqres), rman_get_end(sc->irqres),
306 		    rman_get_end(sc->irqres) - rman_get_start(sc->irqres) + 1);
307 		rle = resource_list_find(&pdev->resources, SYS_RES_IRQ, 0);
308 		rle->res = sc->irqres;
309 
310 		/* Now fake an IOPORT resource */
311 		res = sc->sc_bar_mappings[bidx].res;
312 		resource_list_add(&pdev->resources, SYS_RES_IOPORT, 0,
313 		    rman_get_start(res) + sc->sc_desc->ports[i].offset,
314 		    rman_get_end(res) + sc->sc_desc->ports[i].offset + 8 - 1,
315 		    8);
316 		rle = resource_list_find(&pdev->resources, SYS_RES_IOPORT, 0);
317 
318 		if (sc->barmuxed == 0) {
319 			rle->res = sc->sc_bar_mappings[bidx].res;
320 		} else {
321 			rle->res = kmalloc(sizeof(struct resource), M_DEVBUF,
322 			    M_WAITOK | M_ZERO);
323 
324 			rle->res->r_start = rman_get_start(res) +
325 			    sc->sc_desc->ports[i].offset;
326 			rle->res->r_end = rle->res->r_start + 8 - 1;
327 			rle->res->r_bustag = rman_get_bustag(res);
328 			bus_space_subregion(rle->res->r_bustag,
329 			    rman_get_bushandle(res),
330 			    sc->sc_desc->ports[i].offset, 8,
331 			    &rle->res->r_bushandle);
332 		}
333 
334 		pdev->serialfreq = sc->sc_desc->ports[i].serialfreq;
335 
336 		childunit = puc_find_free_unit(typestr);
337 		sc->sc_ports[i].dev = device_add_child(dev, typestr, childunit);
338 		if (sc->sc_ports[i].dev == NULL) {
339 			if (sc->barmuxed) {
340 				bus_space_unmap(rman_get_bustag(rle->res),
341 						rman_get_bushandle(rle->res),
342 						8);
343 				kfree(rle->res, M_DEVBUF);
344 				kfree(pdev, M_DEVBUF);
345 			}
346 			continue;
347 		}
348 		device_set_ivars(sc->sc_ports[i].dev, pdev);
349 		device_set_desc(sc->sc_ports[i].dev, sc->sc_desc->name);
350 		if (!bootverbose)
351 			device_quiet(sc->sc_ports[i].dev);
352 #ifdef PUC_DEBUG
353 		kprintf("puc: type %d, bar %x, offset %x\n",
354 		    sc->sc_desc->ports[i].type,
355 		    sc->sc_desc->ports[i].bar,
356 		    sc->sc_desc->ports[i].offset);
357 		print_resource_list(&pdev->resources);
358 #endif
359 		device_set_flags(sc->sc_ports[i].dev,
360 		    sc->sc_desc->ports[i].flags);
361 		if (device_probe_and_attach(sc->sc_ports[i].dev) != 0) {
362 			if (sc->barmuxed) {
363 				bus_space_unmap(rman_get_bustag(rle->res),
364 						rman_get_bushandle(rle->res),
365 						8);
366 				kfree(rle->res, M_DEVBUF);
367 				kfree(pdev, M_DEVBUF);
368 			}
369 		}
370 	}
371 
372 #ifdef PUC_DEBUG
373 	bootverbose = 0;
374 #endif
375 	return (0);
376 }
377 
378 static u_int32_t
379 puc_ilr_read(struct puc_softc *sc)
380 {
381 	u_int32_t mask;
382 	int i;
383 
384 	mask = 0;
385 	switch (sc->sc_desc->ilr_type) {
386 	case PUC_ILR_TYPE_DIGI:
387 		for (i = 1; i >= 0; i--) {
388 			mask = (mask << 8) | (bus_space_read_1(sc->ilr_st,
389 			    sc->ilr_sh, sc->sc_desc->ilr_offset[i]) & 0xff);
390 		}
391 		break;
392 
393 	default:
394 		mask = 0xffffffff;
395 		break;
396 	}
397 	return (mask);
398 }
399 
400 /*
401  * This is an interrupt handler. For boards that can't tell us which
402  * device generated the interrupt it just calls all the registered
403  * handlers sequencially, but for boards that can tell us which
404  * device(s) generated the interrupt it calls only handlers for devices
405  * that actually generated the interrupt.
406  */
407 static void
408 puc_intr(void *arg)
409 {
410 	int i;
411 	u_int32_t ilr_mask;
412 	struct puc_softc *sc;
413 
414 	sc = (struct puc_softc *)arg;
415 	ilr_mask = sc->ilr_enabled ? puc_ilr_read(sc) : 0xffffffff;
416 	for (i = 0; i < PUC_MAX_PORTS; i++)
417 		if (sc->sc_ports[i].ihand != NULL &&
418 		    ((ilr_mask >> i) & 0x00000001))
419 			(sc->sc_ports[i].ihand)(sc->sc_ports[i].ihandarg);
420 }
421 
422 static const struct puc_device_description *
423 puc_find_description(uint32_t vend, uint32_t prod, uint32_t svend,
424     uint32_t sprod)
425 {
426 	int i;
427 
428 #define checkreg(val, index) \
429     (((val) & puc_devices[i].rmask[(index)]) == puc_devices[i].rval[(index)])
430 
431 	for (i = 0; puc_devices[i].name != NULL; i++) {
432 		if (checkreg(vend, PUC_REG_VEND) &&
433 		    checkreg(prod, PUC_REG_PROD) &&
434 		    checkreg(svend, PUC_REG_SVEND) &&
435 		    checkreg(sprod, PUC_REG_SPROD))
436 			return (&puc_devices[i]);
437 	}
438 
439 #undef checkreg
440 
441 	return (NULL);
442 }
443 
444 /*
445  * It might be possible to make these more generic if we can detect patterns.
446  * For instance maybe if the size of a bar is 0x400 (the old isa space) it
447  * might contain one or more superio chips.
448  */
449 static void
450 puc_config_superio(device_t dev)
451 {
452 	struct puc_softc *sc = (struct puc_softc *)device_get_softc(dev);
453 
454 	if (sc->sc_desc->rval[PUC_REG_VEND] == 0x1592 &&
455 	    sc->sc_desc->rval[PUC_REG_PROD] == 0x0781)
456 		puc_config_win877(sc->sc_bar_mappings[0].res);
457 }
458 
459 #define rdspio(indx)		(bus_space_write_1(bst, bsh, efir, indx), \
460 				bus_space_read_1(bst, bsh, efdr))
461 #define wrspio(indx,data)	(bus_space_write_1(bst, bsh, efir, indx), \
462 				bus_space_write_1(bst, bsh, efdr, data))
463 
464 #ifdef PUC_DEBUG
465 static void
466 puc_print_win877(bus_space_tag_t bst, bus_space_handle_t bsh, u_int efir,
467 	u_int efdr)
468 {
469 	u_char cr00, cr01, cr04, cr09, cr0d, cr14, cr15, cr16, cr17;
470 	u_char cr18, cr19, cr24, cr25, cr28, cr2c, cr31, cr32;
471 
472 	cr00 = rdspio(0x00);
473 	cr01 = rdspio(0x01);
474 	cr04 = rdspio(0x04);
475 	cr09 = rdspio(0x09);
476 	cr0d = rdspio(0x0d);
477 	cr14 = rdspio(0x14);
478 	cr15 = rdspio(0x15);
479 	cr16 = rdspio(0x16);
480 	cr17 = rdspio(0x17);
481 	cr18 = rdspio(0x18);
482 	cr19 = rdspio(0x19);
483 	cr24 = rdspio(0x24);
484 	cr25 = rdspio(0x25);
485 	cr28 = rdspio(0x28);
486 	cr2c = rdspio(0x2c);
487 	cr31 = rdspio(0x31);
488 	cr32 = rdspio(0x32);
489 	kprintf("877T: cr00 %x, cr01 %x, cr04 %x, cr09 %x, cr0d %x, cr14 %x, "
490 	    "cr15 %x, cr16 %x, cr17 %x, cr18 %x, cr19 %x, cr24 %x, cr25 %x, "
491 	    "cr28 %x, cr2c %x, cr31 %x, cr32 %x\n", cr00, cr01, cr04, cr09,
492 	    cr0d, cr14, cr15, cr16, cr17,
493 	    cr18, cr19, cr24, cr25, cr28, cr2c, cr31, cr32);
494 }
495 #endif
496 
497 static void
498 puc_config_win877(struct resource *res)
499 {
500 	u_char val;
501 	u_int efir, efdr;
502 	bus_space_tag_t bst;
503 	bus_space_handle_t bsh;
504 
505 	bst = rman_get_bustag(res);
506 	bsh = rman_get_bushandle(res);
507 
508 	/* configure the first W83877TF */
509 	bus_space_write_1(bst, bsh, 0x250, 0x89);
510 	efir = 0x251;
511 	efdr = 0x252;
512 	val = rdspio(0x09) & 0x0f;
513 	if (val != 0x0c) {
514 		kprintf("conf_win877: Oops not a W83877TF\n");
515 		return;
516 	}
517 
518 #ifdef PUC_DEBUG
519 	kprintf("before: ");
520 	puc_print_win877(bst, bsh, efir, efdr);
521 #endif
522 
523 	val = rdspio(0x16);
524 	val |= 0x04;
525 	wrspio(0x16, val);
526 	val &= ~0x04;
527 	wrspio(0x16, val);
528 
529 	wrspio(0x24, 0x2e8 >> 2);
530 	wrspio(0x25, 0x2f8 >> 2);
531 	wrspio(0x17, 0x03);
532 	wrspio(0x28, 0x43);
533 
534 #ifdef PUC_DEBUG
535 	kprintf("after: ");
536 	puc_print_win877(bst, bsh, efir, efdr);
537 #endif
538 
539 	bus_space_write_1(bst, bsh, 0x250, 0xaa);
540 
541 	/* configure the second W83877TF */
542 	bus_space_write_1(bst, bsh, 0x3f0, 0x87);
543 	bus_space_write_1(bst, bsh, 0x3f0, 0x87);
544 	efir = 0x3f0;
545 	efdr = 0x3f1;
546 	val = rdspio(0x09) & 0x0f;
547 	if (val != 0x0c) {
548 		kprintf("conf_win877: Oops not a W83877TF\n");
549 		return;
550 	}
551 
552 #ifdef PUC_DEBUG
553 	kprintf("before: ");
554 	puc_print_win877(bst, bsh, efir, efdr);
555 #endif
556 
557 	val = rdspio(0x16);
558 	val |= 0x04;
559 	wrspio(0x16, val);
560 	val &= ~0x04;
561 	wrspio(0x16, val);
562 
563 	wrspio(0x24, 0x3e8 >> 2);
564 	wrspio(0x25, 0x3f8 >> 2);
565 	wrspio(0x17, 0x03);
566 	wrspio(0x28, 0x43);
567 
568 #ifdef PUC_DEBUG
569 	kprintf("after: ");
570 	puc_print_win877(bst, bsh, efir, efdr);
571 #endif
572 
573 	bus_space_write_1(bst, bsh, 0x3f0, 0xaa);
574 }
575 
576 #undef rdspio
577 #undef wrspio
578 
579 static int puc_find_free_unit(char *name)
580 {
581 	devclass_t dc;
582 	int start;
583 	int unit;
584 
585 	unit = 0;
586 	start = 0;
587 	while (resource_int_value(name, unit, "port", &start) == 0 &&
588 	    start > 0)
589 		unit++;
590 	dc = devclass_find(name);
591 	if (dc == NULL)
592 		return (-1);
593 	while (devclass_get_device(dc, unit))
594 		unit++;
595 #ifdef PUC_DEBUG
596 	kprintf("puc: Using %s%d\n", name, unit);
597 #endif
598 	return (unit);
599 }
600 
601 #ifdef PUC_DEBUG
602 static void
603 puc_print_resource_list(struct resource_list *rl)
604 {
605 	struct resource_list_entry *rle;
606 
607 	kprintf("print_resource_list: rl %p\n", rl);
608 	SLIST_FOREACH(rle, rl, link)
609 		kprintf("type %x, rid %x\n", rle->type, rle->rid);
610 	kprintf("print_resource_list: end.\n");
611 }
612 #endif
613 
614 static struct resource *
615 puc_alloc_resource(device_t dev, device_t child, int type, int *rid,
616     u_long start, u_long end, u_long count, u_int flags)
617 {
618 	struct puc_device *pdev;
619 	struct resource *retval;
620 	struct resource_list *rl;
621 	struct resource_list_entry *rle;
622 
623 	pdev = device_get_ivars(child);
624 	rl = &pdev->resources;
625 
626 #ifdef PUC_DEBUG
627 	kprintf("puc_alloc_resource: pdev %p, looking for t %x, r %x\n",
628 	    pdev, type, *rid);
629 	puc_print_resource_list(rl);
630 #endif
631 	retval = NULL;
632 	rle = resource_list_find(rl, type, *rid);
633 	if (rle) {
634 		start = rle->start;
635 		end = rle->end;
636 		count = rle->count;
637 #ifdef PUC_DEBUG
638 		kprintf("found rle, %lx, %lx, %lx\n", start, end, count);
639 #endif
640 		retval = rle->res;
641 	} else
642 		kprintf("oops rle is gone\n");
643 
644 	return (retval);
645 }
646 
647 static int
648 puc_release_resource(device_t dev, device_t child, int type, int rid,
649     struct resource *res)
650 {
651 	return (0);
652 }
653 
654 static int
655 puc_get_resource(device_t dev, device_t child, int type, int rid,
656     u_long *startp, u_long *countp)
657 {
658 	struct puc_device *pdev;
659 	struct resource_list *rl;
660 	struct resource_list_entry *rle;
661 
662 	pdev = device_get_ivars(child);
663 	rl = &pdev->resources;
664 
665 #ifdef PUC_DEBUG
666 	kprintf("puc_get_resource: pdev %p, looking for t %x, r %x\n", pdev,
667 	    type, rid);
668 	puc_print_resource_list(rl);
669 #endif
670 	rle = resource_list_find(rl, type, rid);
671 	if (rle) {
672 #ifdef PUC_DEBUG
673 		kprintf("found rle %p,", rle);
674 #endif
675 		if (startp != NULL)
676 			*startp = rle->start;
677 		if (countp != NULL)
678 			*countp = rle->count;
679 #ifdef PUC_DEBUG
680 		kprintf(" %lx, %lx\n", rle->start, rle->count);
681 #endif
682 		return (0);
683 	} else
684 		kprintf("oops rle is gone\n");
685 	return (ENXIO);
686 }
687 
688 static int
689 puc_setup_intr(device_t dev, device_t child, struct resource *r, int flags,
690 	       void (*ihand)(void *), void *arg,
691 	       void **cookiep, lwkt_serialize_t serializer)
692 {
693 	int i;
694 	struct puc_softc *sc;
695 
696 	sc = (struct puc_softc *)device_get_softc(dev);
697 	for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
698 		if (sc->sc_ports[i].dev == child) {
699 			if (sc->sc_ports[i].ihand != 0)
700 				return (ENXIO);
701 			sc->sc_ports[i].ihand = ihand;
702 			sc->sc_ports[i].ihandarg = arg;
703 			KKASSERT(serializer == NULL); /* not handled yet XXX */
704 			*cookiep = arg;
705 			return (0);
706 		}
707 	}
708 	return (ENXIO);
709 }
710 
711 static int
712 puc_teardown_intr(device_t dev, device_t child, struct resource *r,
713 		  void *cookie)
714 {
715 	int i;
716 	struct puc_softc *sc;
717 
718 	sc = (struct puc_softc *)device_get_softc(dev);
719 	for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
720 		if (sc->sc_ports[i].dev == child) {
721 			sc->sc_ports[i].ihand = NULL;
722 			sc->sc_ports[i].ihandarg = NULL;
723 			return (0);
724 		}
725 	}
726 	return (ENXIO);
727 }
728 
729 static int
730 puc_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
731 {
732 	struct puc_device *pdev;
733 
734 	pdev = device_get_ivars(child);
735 	if (pdev == NULL)
736 		return (ENOENT);
737 
738 	switch(index) {
739 	case PUC_IVAR_FREQ:
740 		*result = pdev->serialfreq;
741 		break;
742 	default:
743 		return (ENOENT);
744 	}
745 	return (0);
746 }
747 
748 static device_method_t puc_pci_methods[] = {
749     /* Device interface */
750     DEVMETHOD(device_probe,		puc_pci_probe),
751     DEVMETHOD(device_attach,		puc_pci_attach),
752 
753     DEVMETHOD(bus_alloc_resource,	puc_alloc_resource),
754     DEVMETHOD(bus_release_resource,	puc_release_resource),
755     DEVMETHOD(bus_get_resource,		puc_get_resource),
756     DEVMETHOD(bus_read_ivar,		puc_read_ivar),
757     DEVMETHOD(bus_setup_intr,		puc_setup_intr),
758     DEVMETHOD(bus_teardown_intr,	puc_teardown_intr),
759     DEVMETHOD(bus_print_child,		bus_generic_print_child),
760     DEVMETHOD(bus_driver_added,		bus_generic_driver_added),
761     { 0, 0 }
762 };
763 
764 static driver_t puc_pci_driver = {
765 	"puc",
766 	puc_pci_methods,
767 	sizeof(struct puc_softc),
768 };
769 
770 static devclass_t puc_devclass;
771 
772 DRIVER_MODULE(puc, pci, puc_pci_driver, puc_devclass, 0, 0);
773