xref: /dragonfly/sys/dev/misc/puc/puc.c (revision dadd6466)
1 /*
2  * $NetBSD: puc.c,v 1.7 2000/07/29 17:43:38 jlam Exp $
3  * $FreeBSD: src/sys/dev/puc/puc.c,v 1.3.2.5 2003/04/04 08:42:17 sobomax Exp $
4  */
5 
6 /*-
7  * Copyright (c) 2002 JF Hay.  All rights reserved.
8  * Copyright (c) 2000 M. Warner Losh.  All rights reserved.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice unmodified, this list of conditions, and the following
15  *    disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * Copyright (c) 1996, 1998, 1999
34  *	Christopher G. Demetriou.  All rights reserved.
35  *
36  * Redistribution and use in source and binary forms, with or without
37  * modification, are permitted provided that the following conditions
38  * are met:
39  * 1. Redistributions of source code must retain the above copyright
40  *    notice, this list of conditions and the following disclaimer.
41  * 2. Redistributions in binary form must reproduce the above copyright
42  *    notice, this list of conditions and the following disclaimer in the
43  *    documentation and/or other materials provided with the distribution.
44  * 3. All advertising materials mentioning features or use of this software
45  *    must display the following acknowledgement:
46  *      This product includes software developed by Christopher G. Demetriou
47  *	for the NetBSD Project.
48  * 4. The name of the author may not be used to endorse or promote products
49  *    derived from this software without specific prior written permission
50  *
51  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
52  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
53  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
54  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
55  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
56  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
60  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61  */
62 
63 /*
64  * PCI "universal" communication card device driver, glues com, lpt,
65  * and similar ports to PCI via bridge chip often much larger than
66  * the devices being glued.
67  *
68  * Author: Christopher G. Demetriou, May 14, 1998 (derived from NetBSD
69  * sys/dev/pci/pciide.c, revision 1.6).
70  *
71  * These devices could be (and some times are) described as
72  * communications/{serial,parallel}, etc. devices with known
73  * programming interfaces, but those programming interfaces (in
74  * particular the BAR assignments for devices, etc.) in fact are not
75  * particularly well defined.
76  *
77  * After I/we have seen more of these devices, it may be possible
78  * to generalize some of these bits.  In particular, devices which
79  * describe themselves as communications/serial/16[45]50, and
80  * communications/parallel/??? might be attached via direct
81  * 'com' and 'lpt' attachments to pci.
82  */
83 
84 #include <sys/param.h>
85 #include <sys/systm.h>
86 #include <sys/kernel.h>
87 #include <sys/bus.h>
88 #include <sys/conf.h>
89 #include <sys/malloc.h>
90 #include <sys/rman.h>
91 
92 #include <bus/pci/pcireg.h>
93 #include <bus/pci/pcivar.h>
94 #include "pucvar.h"
95 
96 struct puc_softc {
97 	const struct puc_device_description *sc_desc;
98 
99 	/* card-global dynamic data */
100 	int			barmuxed;
101 	int			irqrid;
102 	struct resource		*irqres;
103 	void			*intr_cookie;
104 	int			ilr_enabled;
105 	bus_space_tag_t		ilr_st;
106 	bus_space_handle_t	ilr_sh;
107 
108 	struct {
109 		struct resource	*res;
110 	} sc_bar_mappings[PUC_MAX_BAR];
111 
112 	/* per-port dynamic data */
113         struct {
114 		struct device	*dev;
115 		/* filled in by bus_setup_intr() */
116 		void		(*ihand) (void *);
117 		void		*ihandarg;
118         } sc_ports[PUC_MAX_PORTS];
119 };
120 
121 struct puc_device {
122 	struct resource_list resources;
123 	u_int serialfreq;
124 };
125 
126 static int puc_pci_probe(device_t dev);
127 static int puc_pci_attach(device_t dev);
128 static void puc_intr(void *arg);
129 
130 static struct resource *puc_alloc_resource(device_t, device_t, int, int *,
131     u_long, u_long, u_long, u_int, int);
132 static int puc_release_resource(device_t, device_t, int, int,
133     struct resource *);
134 static int puc_get_resource(device_t, device_t, int, int, u_long *, u_long *);
135 static int puc_setup_intr(device_t, device_t, struct resource *, int,
136     void (*)(void *), void *, void **, lwkt_serialize_t);
137 static int puc_teardown_intr(device_t, device_t, struct resource *,
138     void *);
139 static int puc_read_ivar(device_t, device_t, int, uintptr_t *);
140 
141 static const struct puc_device_description *puc_find_description(uint32_t,
142     uint32_t, uint32_t, uint32_t);
143 static void puc_config_superio(device_t);
144 static void puc_config_win877(struct resource *);
145 static int puc_find_free_unit(char *);
146 #ifdef PUC_DEBUG
147 static void puc_print_win877(bus_space_tag_t, bus_space_handle_t, u_int,
148     u_int);
149 static void puc_print_resource_list(struct resource_list *);
150 #endif
151 
152 static int
153 puc_pci_probe(device_t dev)
154 {
155 	uint32_t v1, v2, d1, d2;
156 	const struct puc_device_description *desc;
157 
158 	if ((pci_read_config(dev, PCIR_HDRTYPE, 1) & PCIM_HDRTYPE) != 0)
159 		return (ENXIO);
160 
161 	v1 = pci_read_config(dev, PCIR_VENDOR, 2);
162 	d1 = pci_read_config(dev, PCIR_DEVICE, 2);
163 	v2 = pci_read_config(dev, PCIR_SUBVEND_0, 2);
164 	d2 = pci_read_config(dev, PCIR_SUBDEV_0, 2);
165 
166 	desc = puc_find_description(v1, d1, v2, d2);
167 	if (desc == NULL)
168 		return (ENXIO);
169 	device_set_desc(dev, desc->name);
170 	return (0);
171 }
172 
173 static int
174 puc_probe_ilr(struct puc_softc *sc, struct resource *res)
175 {
176 	u_char t1, t2;
177 	int i;
178 
179 	switch (sc->sc_desc->ilr_type) {
180 	case PUC_ILR_TYPE_DIGI:
181 		sc->ilr_st = rman_get_bustag(res);
182 		sc->ilr_sh = rman_get_bushandle(res);
183 		for (i = 0; i < 2; i++) {
184 			t1 = bus_space_read_1(sc->ilr_st, sc->ilr_sh,
185 			    sc->sc_desc->ilr_offset[i]);
186 			t1 = ~t1;
187 			bus_space_write_1(sc->ilr_st, sc->ilr_sh,
188 			    sc->sc_desc->ilr_offset[i], t1);
189 			t2 = bus_space_read_1(sc->ilr_st, sc->ilr_sh,
190 			    sc->sc_desc->ilr_offset[i]);
191 			if (t2 == t1)
192 				return (0);
193 		}
194 		return (1);
195 
196 	default:
197 		break;
198 	}
199 	return (0);
200 }
201 
202 static int
203 puc_pci_attach(device_t dev)
204 {
205 	char *typestr;
206 	int bidx, childunit, i, irq_setup, rid;
207 	uint32_t v1, v2, d1, d2;
208 	struct puc_softc *sc;
209 	struct puc_device *pdev;
210 	struct resource *res;
211 	struct resource_list_entry *rle;
212 
213 	sc = (struct puc_softc *)device_get_softc(dev);
214 	bzero(sc, sizeof(*sc));
215 	v1 = pci_read_config(dev, PCIR_VENDOR, 2);
216 	d1 = pci_read_config(dev, PCIR_DEVICE, 2);
217 	v2 = pci_read_config(dev, PCIR_SUBVEND_0, 2);
218 	d2 = pci_read_config(dev, PCIR_SUBDEV_0, 2);
219 	sc->sc_desc = puc_find_description(v1, d1, v2, d2);
220 	if (sc->sc_desc == NULL)
221 		return (ENXIO);
222 
223 #ifdef PUC_DEBUG
224 	bootverbose = 1;
225 
226 	kprintf("puc: name: %s\n", sc->sc_desc->name);
227 #endif
228 	rid = 0;
229 	res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
230 	    RF_ACTIVE | RF_SHAREABLE);
231 	if (!res)
232 		return (ENXIO);
233 
234 	sc->irqres = res;
235 	sc->irqrid = rid;
236 	irq_setup = BUS_SETUP_INTR(device_get_parent(dev), dev, res,
237 				   0, puc_intr, sc,
238 				   &sc->intr_cookie, NULL, NULL);
239 	if (irq_setup != 0)
240 		return (ENXIO);
241 
242 	rid = 0;
243 	for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
244 		if (rid == sc->sc_desc->ports[i].bar)
245 			sc->barmuxed = 1;
246 		rid = sc->sc_desc->ports[i].bar;
247 		bidx = PUC_PORT_BAR_INDEX(rid);
248 
249 		if (sc->sc_bar_mappings[bidx].res != NULL)
250 			continue;
251 		res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
252 		    0ul, ~0ul, 1, RF_ACTIVE);
253 		if (res == NULL) {
254 			kprintf("could not get resource\n");
255 			continue;
256 		}
257 		sc->sc_bar_mappings[bidx].res = res;
258 
259 		if (sc->sc_desc->ilr_type != PUC_ILR_TYPE_NONE) {
260 			sc->ilr_enabled = puc_probe_ilr(sc, res);
261 			if (sc->ilr_enabled)
262 				device_printf(dev, "ILR enabled\n");
263 			else
264 				device_printf(dev, "ILR disabled\n");
265 		}
266 #ifdef PUC_DEBUG
267 		kprintf("port bst %x, start %x, end %x\n",
268 		    (u_int)rman_get_bustag(res), (u_int)rman_get_start(res),
269 		    (u_int)rman_get_end(res));
270 #endif
271 	}
272 
273 	puc_config_superio(dev);
274 
275 	for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
276 		rid = sc->sc_desc->ports[i].bar;
277 		bidx = PUC_PORT_BAR_INDEX(rid);
278 		if (sc->sc_bar_mappings[bidx].res == NULL)
279 			continue;
280 
281 		switch (sc->sc_desc->ports[i].type) {
282 		case PUC_PORT_TYPE_COM:
283 			typestr = "sio";
284 			break;
285 		default:
286 			continue;
287 		}
288 		pdev = kmalloc(sizeof(struct puc_device), M_DEVBUF,
289 				M_WAITOK | M_ZERO);
290 		resource_list_init(&pdev->resources);
291 
292 		/* First fake up an IRQ resource. */
293 		resource_list_add(&pdev->resources, SYS_RES_IRQ, 0,
294 		    rman_get_start(sc->irqres), rman_get_end(sc->irqres),
295 		    rman_get_end(sc->irqres) - rman_get_start(sc->irqres) + 1,
296 		    rman_get_cpuid(sc->irqres));
297 		rle = resource_list_find(&pdev->resources, SYS_RES_IRQ, 0);
298 		rle->res = sc->irqres;
299 
300 		/* Now fake an IOPORT resource */
301 		res = sc->sc_bar_mappings[bidx].res;
302 		resource_list_add(&pdev->resources, SYS_RES_IOPORT, 0,
303 		    rman_get_start(res) + sc->sc_desc->ports[i].offset,
304 		    rman_get_end(res) + sc->sc_desc->ports[i].offset + 8 - 1,
305 		    8, -1);
306 		rle = resource_list_find(&pdev->resources, SYS_RES_IOPORT, 0);
307 
308 		if (sc->barmuxed == 0) {
309 			rle->res = sc->sc_bar_mappings[bidx].res;
310 		} else {
311 			rle->res = kmalloc(sizeof(struct resource), M_DEVBUF,
312 			    M_WAITOK | M_ZERO);
313 
314 			rle->res->r_start = rman_get_start(res) +
315 			    sc->sc_desc->ports[i].offset;
316 			rle->res->r_end = rle->res->r_start + 8 - 1;
317 			rle->res->r_bustag = rman_get_bustag(res);
318 			bus_space_subregion(rle->res->r_bustag,
319 			    rman_get_bushandle(res),
320 			    sc->sc_desc->ports[i].offset, 8,
321 			    &rle->res->r_bushandle);
322 		}
323 
324 		pdev->serialfreq = sc->sc_desc->ports[i].serialfreq;
325 
326 		childunit = puc_find_free_unit(typestr);
327 		sc->sc_ports[i].dev = device_add_child(dev, typestr, childunit);
328 		if (sc->sc_ports[i].dev == NULL) {
329 			if (sc->barmuxed) {
330 				bus_space_unmap(rman_get_bustag(rle->res),
331 						rman_get_bushandle(rle->res),
332 						8);
333 				kfree(rle->res, M_DEVBUF);
334 				kfree(pdev, M_DEVBUF);
335 			}
336 			continue;
337 		}
338 		device_set_ivars(sc->sc_ports[i].dev, pdev);
339 		device_set_desc(sc->sc_ports[i].dev, sc->sc_desc->name);
340 		if (!bootverbose)
341 			device_quiet(sc->sc_ports[i].dev);
342 #ifdef PUC_DEBUG
343 		kprintf("puc: type %d, bar %x, offset %x\n",
344 		    sc->sc_desc->ports[i].type,
345 		    sc->sc_desc->ports[i].bar,
346 		    sc->sc_desc->ports[i].offset);
347 		print_resource_list(&pdev->resources);
348 #endif
349 		device_set_flags(sc->sc_ports[i].dev,
350 		    sc->sc_desc->ports[i].flags);
351 		if (device_probe_and_attach(sc->sc_ports[i].dev) != 0) {
352 			if (sc->barmuxed) {
353 				bus_space_unmap(rman_get_bustag(rle->res),
354 						rman_get_bushandle(rle->res),
355 						8);
356 				kfree(rle->res, M_DEVBUF);
357 				kfree(pdev, M_DEVBUF);
358 			}
359 		}
360 	}
361 
362 #ifdef PUC_DEBUG
363 	bootverbose = 0;
364 #endif
365 	return (0);
366 }
367 
368 static u_int32_t
369 puc_ilr_read(struct puc_softc *sc)
370 {
371 	u_int32_t mask;
372 	int i;
373 
374 	mask = 0;
375 	switch (sc->sc_desc->ilr_type) {
376 	case PUC_ILR_TYPE_DIGI:
377 		for (i = 1; i >= 0; i--) {
378 			mask = (mask << 8) | (bus_space_read_1(sc->ilr_st,
379 			    sc->ilr_sh, sc->sc_desc->ilr_offset[i]) & 0xff);
380 		}
381 		break;
382 
383 	default:
384 		mask = 0xffffffff;
385 		break;
386 	}
387 	return (mask);
388 }
389 
390 /*
391  * This is an interrupt handler. For boards that can't tell us which
392  * device generated the interrupt it just calls all the registered
393  * handlers sequencially, but for boards that can tell us which
394  * device(s) generated the interrupt it calls only handlers for devices
395  * that actually generated the interrupt.
396  */
397 static void
398 puc_intr(void *arg)
399 {
400 	int i;
401 	u_int32_t ilr_mask;
402 	struct puc_softc *sc;
403 
404 	sc = (struct puc_softc *)arg;
405 	ilr_mask = sc->ilr_enabled ? puc_ilr_read(sc) : 0xffffffff;
406 	for (i = 0; i < PUC_MAX_PORTS; i++)
407 		if (sc->sc_ports[i].ihand != NULL &&
408 		    ((ilr_mask >> i) & 0x00000001))
409 			(sc->sc_ports[i].ihand)(sc->sc_ports[i].ihandarg);
410 }
411 
412 static const struct puc_device_description *
413 puc_find_description(uint32_t vend, uint32_t prod, uint32_t svend,
414     uint32_t sprod)
415 {
416 	int i;
417 
418 #define checkreg(val, index) \
419     (((val) & puc_devices[i].rmask[(index)]) == puc_devices[i].rval[(index)])
420 
421 	for (i = 0; puc_devices[i].name != NULL; i++) {
422 		if (checkreg(vend, PUC_REG_VEND) &&
423 		    checkreg(prod, PUC_REG_PROD) &&
424 		    checkreg(svend, PUC_REG_SVEND) &&
425 		    checkreg(sprod, PUC_REG_SPROD))
426 			return (&puc_devices[i]);
427 	}
428 
429 #undef checkreg
430 
431 	return (NULL);
432 }
433 
434 /*
435  * It might be possible to make these more generic if we can detect patterns.
436  * For instance maybe if the size of a bar is 0x400 (the old isa space) it
437  * might contain one or more superio chips.
438  */
439 static void
440 puc_config_superio(device_t dev)
441 {
442 	struct puc_softc *sc = (struct puc_softc *)device_get_softc(dev);
443 
444 	if (sc->sc_desc->rval[PUC_REG_VEND] == 0x1592 &&
445 	    sc->sc_desc->rval[PUC_REG_PROD] == 0x0781)
446 		puc_config_win877(sc->sc_bar_mappings[0].res);
447 }
448 
449 #define rdspio(indx)		(bus_space_write_1(bst, bsh, efir, indx), \
450 				bus_space_read_1(bst, bsh, efdr))
451 #define wrspio(indx,data)	(bus_space_write_1(bst, bsh, efir, indx), \
452 				bus_space_write_1(bst, bsh, efdr, data))
453 
454 #ifdef PUC_DEBUG
455 static void
456 puc_print_win877(bus_space_tag_t bst, bus_space_handle_t bsh, u_int efir,
457 	u_int efdr)
458 {
459 	u_char cr00, cr01, cr04, cr09, cr0d, cr14, cr15, cr16, cr17;
460 	u_char cr18, cr19, cr24, cr25, cr28, cr2c, cr31, cr32;
461 
462 	cr00 = rdspio(0x00);
463 	cr01 = rdspio(0x01);
464 	cr04 = rdspio(0x04);
465 	cr09 = rdspio(0x09);
466 	cr0d = rdspio(0x0d);
467 	cr14 = rdspio(0x14);
468 	cr15 = rdspio(0x15);
469 	cr16 = rdspio(0x16);
470 	cr17 = rdspio(0x17);
471 	cr18 = rdspio(0x18);
472 	cr19 = rdspio(0x19);
473 	cr24 = rdspio(0x24);
474 	cr25 = rdspio(0x25);
475 	cr28 = rdspio(0x28);
476 	cr2c = rdspio(0x2c);
477 	cr31 = rdspio(0x31);
478 	cr32 = rdspio(0x32);
479 	kprintf("877T: cr00 %x, cr01 %x, cr04 %x, cr09 %x, cr0d %x, cr14 %x, "
480 	    "cr15 %x, cr16 %x, cr17 %x, cr18 %x, cr19 %x, cr24 %x, cr25 %x, "
481 	    "cr28 %x, cr2c %x, cr31 %x, cr32 %x\n", cr00, cr01, cr04, cr09,
482 	    cr0d, cr14, cr15, cr16, cr17,
483 	    cr18, cr19, cr24, cr25, cr28, cr2c, cr31, cr32);
484 }
485 #endif
486 
487 static void
488 puc_config_win877(struct resource *res)
489 {
490 	u_char val;
491 	u_int efir, efdr;
492 	bus_space_tag_t bst;
493 	bus_space_handle_t bsh;
494 
495 	bst = rman_get_bustag(res);
496 	bsh = rman_get_bushandle(res);
497 
498 	/* configure the first W83877TF */
499 	bus_space_write_1(bst, bsh, 0x250, 0x89);
500 	efir = 0x251;
501 	efdr = 0x252;
502 	val = rdspio(0x09) & 0x0f;
503 	if (val != 0x0c) {
504 		kprintf("conf_win877: Oops not a W83877TF\n");
505 		return;
506 	}
507 
508 #ifdef PUC_DEBUG
509 	kprintf("before: ");
510 	puc_print_win877(bst, bsh, efir, efdr);
511 #endif
512 
513 	val = rdspio(0x16);
514 	val |= 0x04;
515 	wrspio(0x16, val);
516 	val &= ~0x04;
517 	wrspio(0x16, val);
518 
519 	wrspio(0x24, 0x2e8 >> 2);
520 	wrspio(0x25, 0x2f8 >> 2);
521 	wrspio(0x17, 0x03);
522 	wrspio(0x28, 0x43);
523 
524 #ifdef PUC_DEBUG
525 	kprintf("after: ");
526 	puc_print_win877(bst, bsh, efir, efdr);
527 #endif
528 
529 	bus_space_write_1(bst, bsh, 0x250, 0xaa);
530 
531 	/* configure the second W83877TF */
532 	bus_space_write_1(bst, bsh, 0x3f0, 0x87);
533 	bus_space_write_1(bst, bsh, 0x3f0, 0x87);
534 	efir = 0x3f0;
535 	efdr = 0x3f1;
536 	val = rdspio(0x09) & 0x0f;
537 	if (val != 0x0c) {
538 		kprintf("conf_win877: Oops not a W83877TF\n");
539 		return;
540 	}
541 
542 #ifdef PUC_DEBUG
543 	kprintf("before: ");
544 	puc_print_win877(bst, bsh, efir, efdr);
545 #endif
546 
547 	val = rdspio(0x16);
548 	val |= 0x04;
549 	wrspio(0x16, val);
550 	val &= ~0x04;
551 	wrspio(0x16, val);
552 
553 	wrspio(0x24, 0x3e8 >> 2);
554 	wrspio(0x25, 0x3f8 >> 2);
555 	wrspio(0x17, 0x03);
556 	wrspio(0x28, 0x43);
557 
558 #ifdef PUC_DEBUG
559 	kprintf("after: ");
560 	puc_print_win877(bst, bsh, efir, efdr);
561 #endif
562 
563 	bus_space_write_1(bst, bsh, 0x3f0, 0xaa);
564 }
565 
566 #undef rdspio
567 #undef wrspio
568 
569 static int puc_find_free_unit(char *name)
570 {
571 	devclass_t dc;
572 	int start;
573 	int unit;
574 
575 	unit = 0;
576 	start = 0;
577 	while (resource_int_value(name, unit, "port", &start) == 0 &&
578 	    start > 0)
579 		unit++;
580 	dc = devclass_find(name);
581 	if (dc == NULL)
582 		return (-1);
583 	while (devclass_get_device(dc, unit))
584 		unit++;
585 #ifdef PUC_DEBUG
586 	kprintf("puc: Using %s%d\n", name, unit);
587 #endif
588 	return (unit);
589 }
590 
591 #ifdef PUC_DEBUG
592 static void
593 puc_print_resource_list(struct resource_list *rl)
594 {
595 	struct resource_list_entry *rle;
596 
597 	kprintf("print_resource_list: rl %p\n", rl);
598 	SLIST_FOREACH(rle, rl, link)
599 		kprintf("type %x, rid %x\n", rle->type, rle->rid);
600 	kprintf("print_resource_list: end.\n");
601 }
602 #endif
603 
604 static struct resource *
605 puc_alloc_resource(device_t dev, device_t child, int type, int *rid,
606     u_long start, u_long end, u_long count, u_int flags, int cpuid __unused)
607 {
608 	struct puc_device *pdev;
609 	struct resource *retval;
610 	struct resource_list *rl;
611 	struct resource_list_entry *rle;
612 
613 	pdev = device_get_ivars(child);
614 	rl = &pdev->resources;
615 
616 #ifdef PUC_DEBUG
617 	kprintf("puc_alloc_resource: pdev %p, looking for t %x, r %x\n",
618 	    pdev, type, *rid);
619 	puc_print_resource_list(rl);
620 #endif
621 	retval = NULL;
622 	rle = resource_list_find(rl, type, *rid);
623 	if (rle) {
624 		start = rle->start;
625 		end = rle->end;
626 		count = rle->count;
627 #ifdef PUC_DEBUG
628 		kprintf("found rle, %lx, %lx, %lx\n", start, end, count);
629 #endif
630 		retval = rle->res;
631 	} else
632 		kprintf("oops rle is gone\n");
633 
634 	return (retval);
635 }
636 
637 static int
638 puc_release_resource(device_t dev, device_t child, int type, int rid,
639     struct resource *res)
640 {
641 	return (0);
642 }
643 
644 static int
645 puc_get_resource(device_t dev, device_t child, int type, int rid,
646     u_long *startp, u_long *countp)
647 {
648 	struct puc_device *pdev;
649 	struct resource_list *rl;
650 	struct resource_list_entry *rle;
651 
652 	pdev = device_get_ivars(child);
653 	rl = &pdev->resources;
654 
655 #ifdef PUC_DEBUG
656 	kprintf("puc_get_resource: pdev %p, looking for t %x, r %x\n", pdev,
657 	    type, rid);
658 	puc_print_resource_list(rl);
659 #endif
660 	rle = resource_list_find(rl, type, rid);
661 	if (rle) {
662 #ifdef PUC_DEBUG
663 		kprintf("found rle %p,", rle);
664 #endif
665 		if (startp != NULL)
666 			*startp = rle->start;
667 		if (countp != NULL)
668 			*countp = rle->count;
669 #ifdef PUC_DEBUG
670 		kprintf(" %lx, %lx\n", rle->start, rle->count);
671 #endif
672 		return (0);
673 	} else
674 		kprintf("oops rle is gone\n");
675 	return (ENXIO);
676 }
677 
678 static int
679 puc_setup_intr(device_t dev, device_t child, struct resource *r, int flags,
680 	       void (*ihand)(void *), void *arg,
681 	       void **cookiep, lwkt_serialize_t serializer)
682 {
683 	int i;
684 	struct puc_softc *sc;
685 
686 	sc = (struct puc_softc *)device_get_softc(dev);
687 	for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
688 		if (sc->sc_ports[i].dev == child) {
689 			if (sc->sc_ports[i].ihand != NULL)
690 				return (ENXIO);
691 			sc->sc_ports[i].ihand = ihand;
692 			sc->sc_ports[i].ihandarg = arg;
693 			KKASSERT(serializer == NULL); /* not handled yet XXX */
694 			*cookiep = arg;
695 			return (0);
696 		}
697 	}
698 	return (ENXIO);
699 }
700 
701 static int
702 puc_teardown_intr(device_t dev, device_t child, struct resource *r,
703 		  void *cookie)
704 {
705 	int i;
706 	struct puc_softc *sc;
707 
708 	sc = (struct puc_softc *)device_get_softc(dev);
709 	for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
710 		if (sc->sc_ports[i].dev == child) {
711 			sc->sc_ports[i].ihand = NULL;
712 			sc->sc_ports[i].ihandarg = NULL;
713 			return (0);
714 		}
715 	}
716 	return (ENXIO);
717 }
718 
719 static int
720 puc_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
721 {
722 	struct puc_device *pdev;
723 
724 	pdev = device_get_ivars(child);
725 	if (pdev == NULL)
726 		return (ENOENT);
727 
728 	switch(index) {
729 	case PUC_IVAR_FREQ:
730 		*result = pdev->serialfreq;
731 		break;
732 	default:
733 		return (ENOENT);
734 	}
735 	return (0);
736 }
737 
738 static device_method_t puc_pci_methods[] = {
739     /* Device interface */
740     DEVMETHOD(device_probe,		puc_pci_probe),
741     DEVMETHOD(device_attach,		puc_pci_attach),
742 
743     DEVMETHOD(bus_alloc_resource,	puc_alloc_resource),
744     DEVMETHOD(bus_release_resource,	puc_release_resource),
745     DEVMETHOD(bus_get_resource,		puc_get_resource),
746     DEVMETHOD(bus_read_ivar,		puc_read_ivar),
747     DEVMETHOD(bus_setup_intr,		puc_setup_intr),
748     DEVMETHOD(bus_teardown_intr,	puc_teardown_intr),
749     DEVMETHOD(bus_print_child,		bus_generic_print_child),
750     DEVMETHOD(bus_driver_added,		bus_generic_driver_added),
751     DEVMETHOD_END
752 };
753 
754 static driver_t puc_pci_driver = {
755 	"puc",
756 	puc_pci_methods,
757 	sizeof(struct puc_softc),
758 };
759 
760 static devclass_t puc_devclass;
761 
762 DRIVER_MODULE(puc, pci, puc_pci_driver, puc_devclass, NULL, NULL);
763