1 /*- 2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD: src/sys/dev/age/if_agevar.h,v 1.2 2008/10/21 03:18:02 kevlo Exp $ 28 */ 29 30 #ifndef _IF_AGEVAR_H 31 #define _IF_AGEVAR_H 32 33 #define AGE_TX_RING_CNT 256 34 #define AGE_RX_RING_CNT 256 35 #define AGE_RR_RING_CNT (AGE_TX_RING_CNT + AGE_RX_RING_CNT) 36 /* The following ring alignments are just guessing. */ 37 #define AGE_TX_RING_ALIGN 16 38 #define AGE_RX_RING_ALIGN 16 39 #define AGE_RR_RING_ALIGN 16 40 #define AGE_CMB_ALIGN 16 41 #define AGE_SMB_ALIGN 16 42 43 #define AGE_TSO_MAXSEGSIZE 4096 44 #define AGE_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header)) 45 #define AGE_MAXTXSEGS 32 46 47 #define AGE_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF) 48 #define AGE_ADDR_HI(x) ((uint64_t) (x) >> 32) 49 50 #define AGE_MSI_MESSAGES 1 51 #define AGE_MSIX_MESSAGES 1 52 53 /* TODO : Should get real jumbo MTU size. */ 54 #define AGE_JUMBO_FRAMELEN 10240 55 #define AGE_JUMBO_MTU \ 56 (AGE_JUMBO_FRAMELEN - EVL_ENCAPLEN - \ 57 ETHER_HDR_LEN - ETHER_CRC_LEN) 58 59 #define AGE_DESC_INC(x, y) ((x) = ((x) + 1) % (y)) 60 61 #define AGE_PROC_MIN 30 62 #define AGE_PROC_MAX (AGE_RX_RING_CNT - 1) 63 #define AGE_PROC_DEFAULT (AGE_RX_RING_CNT / 2) 64 65 struct age_txdesc { 66 struct mbuf *tx_m; 67 bus_dmamap_t tx_dmamap; 68 struct tx_desc *tx_desc; 69 }; 70 71 struct age_rxdesc { 72 struct mbuf *rx_m; 73 bus_dmamap_t rx_dmamap; 74 struct rx_desc *rx_desc; 75 }; 76 77 struct age_chain_data{ 78 bus_dma_tag_t age_parent_tag; 79 bus_dma_tag_t age_buffer_tag; 80 bus_dma_tag_t age_tx_tag; 81 struct age_txdesc age_txdesc[AGE_TX_RING_CNT]; 82 bus_dma_tag_t age_rx_tag; 83 struct age_rxdesc age_rxdesc[AGE_RX_RING_CNT]; 84 bus_dma_tag_t age_tx_ring_tag; 85 bus_dmamap_t age_tx_ring_map; 86 bus_dma_tag_t age_rx_ring_tag; 87 bus_dmamap_t age_rx_ring_map; 88 bus_dmamap_t age_rx_sparemap; 89 bus_dma_tag_t age_rr_ring_tag; 90 bus_dmamap_t age_rr_ring_map; 91 bus_dma_tag_t age_cmb_block_tag; 92 bus_dmamap_t age_cmb_block_map; 93 bus_dma_tag_t age_smb_block_tag; 94 bus_dmamap_t age_smb_block_map; 95 96 int age_tx_prod; 97 int age_tx_cons; 98 int age_tx_cnt; 99 int age_rx_cons; 100 int age_rr_cons; 101 int age_rxlen; 102 103 struct mbuf *age_rxhead; 104 struct mbuf *age_rxtail; 105 struct mbuf *age_rxprev_tail; 106 }; 107 108 struct age_ring_data { 109 struct tx_desc *age_tx_ring; 110 bus_addr_t age_tx_ring_paddr; 111 struct rx_desc *age_rx_ring; 112 bus_addr_t age_rx_ring_paddr; 113 struct rx_rdesc *age_rr_ring; 114 bus_addr_t age_rr_ring_paddr; 115 struct cmb *age_cmb_block; 116 bus_addr_t age_cmb_block_paddr; 117 struct smb *age_smb_block; 118 bus_addr_t age_smb_block_paddr; 119 }; 120 121 #define AGE_TX_RING_SZ \ 122 (sizeof(struct tx_desc) * AGE_TX_RING_CNT) 123 #define AGE_RX_RING_SZ \ 124 (sizeof(struct rx_desc) * AGE_RX_RING_CNT) 125 #define AGE_RR_RING_SZ \ 126 (sizeof(struct rx_rdesc) * AGE_RR_RING_CNT) 127 #define AGE_CMB_BLOCK_SZ sizeof(struct cmb) 128 #define AGE_SMB_BLOCK_SZ sizeof(struct smb) 129 130 struct age_stats { 131 /* Rx stats. */ 132 uint64_t rx_frames; 133 uint64_t rx_bcast_frames; 134 uint64_t rx_mcast_frames; 135 uint32_t rx_pause_frames; 136 uint32_t rx_control_frames; 137 uint32_t rx_crcerrs; 138 uint32_t rx_lenerrs; 139 uint64_t rx_bytes; 140 uint32_t rx_runts; 141 uint64_t rx_fragments; 142 uint64_t rx_pkts_64; 143 uint64_t rx_pkts_65_127; 144 uint64_t rx_pkts_128_255; 145 uint64_t rx_pkts_256_511; 146 uint64_t rx_pkts_512_1023; 147 uint64_t rx_pkts_1024_1518; 148 uint64_t rx_pkts_1519_max; 149 uint64_t rx_pkts_truncated; 150 uint32_t rx_fifo_oflows; 151 uint32_t rx_desc_oflows; 152 uint32_t rx_alignerrs; 153 uint64_t rx_bcast_bytes; 154 uint64_t rx_mcast_bytes; 155 uint64_t rx_pkts_filtered; 156 /* Tx stats. */ 157 uint64_t tx_frames; 158 uint64_t tx_bcast_frames; 159 uint64_t tx_mcast_frames; 160 uint32_t tx_pause_frames; 161 uint32_t tx_excess_defer; 162 uint32_t tx_control_frames; 163 uint32_t tx_deferred; 164 uint64_t tx_bytes; 165 uint64_t tx_pkts_64; 166 uint64_t tx_pkts_65_127; 167 uint64_t tx_pkts_128_255; 168 uint64_t tx_pkts_256_511; 169 uint64_t tx_pkts_512_1023; 170 uint64_t tx_pkts_1024_1518; 171 uint64_t tx_pkts_1519_max; 172 uint32_t tx_single_colls; 173 uint32_t tx_multi_colls; 174 uint32_t tx_late_colls; 175 uint32_t tx_excess_colls; 176 uint32_t tx_underrun; 177 uint32_t tx_desc_underrun; 178 uint32_t tx_lenerrs; 179 uint32_t tx_pkts_truncated; 180 uint64_t tx_bcast_bytes; 181 uint64_t tx_mcast_bytes; 182 }; 183 184 /* 185 * Software state per device. 186 */ 187 struct age_softc { 188 struct arpcom arpcom; 189 device_t age_dev; 190 191 int age_mem_rid; 192 struct resource *age_mem_res; 193 bus_space_tag_t age_mem_bt; 194 bus_space_handle_t age_mem_bh; 195 196 int age_irq_rid; 197 struct resource *age_irq_res; 198 void *age_irq_handle; 199 200 int age_phyaddr; 201 device_t age_miibus; 202 203 int age_rev; 204 int age_chip_rev; 205 uint8_t age_eaddr[ETHER_ADDR_LEN]; 206 uint32_t age_dma_rd_burst; 207 uint32_t age_dma_wr_burst; 208 int age_flags; 209 #define AGE_FLAG_PCIE 0x0001 210 #define AGE_FLAG_PCIX 0x0002 211 #define AGE_FLAG_MSI 0x0004 212 #define AGE_FLAG_MSIX 0x0008 213 #define AGE_FLAG_PMCAP 0x0010 214 #define AGE_FLAG_DETACH 0x4000 215 #define AGE_FLAG_LINK 0x8000 216 217 struct callout age_tick_ch; 218 struct age_stats age_stat; 219 struct age_chain_data age_cdata; 220 struct age_ring_data age_rdata; 221 int age_if_flags; 222 int age_int_mod; 223 int age_max_frame_size; 224 int age_rr_prod; 225 int age_tpd_cons; 226 227 struct sysctl_ctx_list age_sysctl_ctx; 228 struct sysctl_oid *age_sysctl_tree; 229 }; 230 231 /* Register access macros. */ 232 #define CSR_WRITE_4(_sc, reg, val) \ 233 bus_space_write_4((_sc)->age_mem_bt, (_sc)->age_mem_bh, (reg), (val)) 234 #define CSR_WRITE_2(_sc, reg, val) \ 235 bus_space_write_2((_sc)->age_mem_bt, (_sc)->age_mem_bh, (reg), (val)) 236 237 #define CSR_READ_4(_sc, reg) \ 238 bus_space_read_4((_sc)->age_mem_bt, (_sc)->age_mem_bh, (reg)) 239 #define CSR_READ_2(_sc, reg) \ 240 bus_space_read_2((_sc)->age_mem_bt, (_sc)->age_mem_bh, (reg)) 241 242 #define AGE_COMMIT_MBOX(_sc) \ 243 do { \ 244 CSR_WRITE_4(_sc, AGE_MBOX, \ 245 (((_sc)->age_cdata.age_rx_cons << MBOX_RD_PROD_IDX_SHIFT) & \ 246 MBOX_RD_PROD_IDX_MASK) | \ 247 (((_sc)->age_cdata.age_rr_cons << \ 248 MBOX_RRD_CONS_IDX_SHIFT) & MBOX_RRD_CONS_IDX_MASK) | \ 249 (((_sc)->age_cdata.age_tx_prod << MBOX_TD_PROD_IDX_SHIFT) & \ 250 MBOX_TD_PROD_IDX_MASK)); \ 251 } while (0) 252 253 #define AGE_RXCHAIN_RESET(_sc) \ 254 do { \ 255 (_sc)->age_cdata.age_rxhead = NULL; \ 256 (_sc)->age_cdata.age_rxtail = NULL; \ 257 (_sc)->age_cdata.age_rxprev_tail = NULL; \ 258 (_sc)->age_cdata.age_rxlen = 0; \ 259 } while (0) 260 261 #define AGE_TX_TIMEOUT 5 262 #define AGE_RESET_TIMEOUT 100 263 #define AGE_TIMEOUT 1000 264 #define AGE_PHY_TIMEOUT 1000 265 266 #endif /* _IF_AGEVAR_H */ 267