1 /*- 2 * Copyright (c) 2012 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTABILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 * $FreeBSD$ 30 */ 31 #ifndef __IF_ATH_ALQ_H__ 32 #define __IF_ATH_ALQ_H__ 33 34 #define ATH_ALQ_INIT_STATE 1 35 struct if_ath_alq_init_state { 36 uint32_t sc_mac_version; 37 uint32_t sc_mac_revision; 38 uint32_t sc_phy_rev; 39 uint32_t sc_hal_magic; 40 }; 41 42 #define ATH_ALQ_EDMA_TXSTATUS 2 43 #define ATH_ALQ_EDMA_RXSTATUS 3 44 #define ATH_ALQ_EDMA_TXDESC 4 45 46 #define ATH_ALQ_TDMA_BEACON_STATE 5 47 struct if_ath_alq_tdma_beacon_state { 48 uint64_t rx_tsf; /* RX TSF of beacon frame */ 49 uint64_t beacon_tsf; /* TSF inside beacon frame */ 50 uint64_t tsf64; 51 uint64_t nextslot_tsf; 52 uint32_t nextslot_tu; 53 uint32_t txtime; 54 }; 55 56 #define ATH_ALQ_TDMA_TIMER_CONFIG 6 57 struct if_ath_alq_tdma_timer_config { 58 uint32_t tdma_slot; 59 uint32_t tdma_slotlen; 60 uint32_t tdma_slotcnt; 61 uint32_t tdma_bintval; 62 uint32_t tdma_guard; 63 uint32_t tdma_scbintval; 64 uint32_t tdma_dbaprep; 65 }; 66 67 #define ATH_ALQ_TDMA_SLOT_CALC 7 68 struct if_ath_alq_tdma_slot_calc { 69 uint64_t nexttbtt; 70 uint64_t next_slot; 71 int32_t tsfdelta; 72 int32_t avg_plus; 73 int32_t avg_minus; 74 }; 75 76 #define ATH_ALQ_TDMA_TSF_ADJUST 8 77 struct if_ath_alq_tdma_tsf_adjust { 78 uint64_t tsf64_old; 79 uint64_t tsf64_new; 80 int32_t tsfdelta; 81 }; 82 83 #define ATH_ALQ_TDMA_TIMER_SET 9 84 struct if_ath_alq_tdma_timer_set { 85 uint32_t bt_intval; 86 uint32_t bt_nexttbtt; 87 uint32_t bt_nextdba; 88 uint32_t bt_nextswba; 89 uint32_t bt_nextatim; 90 uint32_t bt_flags; 91 uint32_t sc_tdmadbaprep; 92 uint32_t sc_tdmaswbaprep; 93 }; 94 95 #define ATH_ALQ_INTR_STATUS 10 96 struct if_ath_alq_interrupt { 97 uint32_t intr_status; 98 uint32_t intr_state[8]; 99 uint32_t intr_syncstate; 100 }; 101 102 #define ATH_ALQ_MIB_COUNTERS 11 103 struct if_ath_alq_mib_counters { 104 uint32_t valid; 105 uint32_t tx_busy; 106 uint32_t rx_busy; 107 uint32_t chan_busy; 108 uint32_t ext_chan_busy; 109 uint32_t cycle_count; 110 }; 111 112 #define ATH_ALQ_MISSED_BEACON 12 113 #define ATH_ALQ_STUCK_BEACON 13 114 #define ATH_ALQ_RESUME_BEACON 14 115 116 /* 117 * These will always be logged, regardless. 118 */ 119 #define ATH_ALQ_LOG_ALWAYS_MASK 0x00000001 120 121 #define ATH_ALQ_FILENAME_LEN 128 122 #define ATH_ALQ_DEVNAME_LEN 32 123 124 struct if_ath_alq { 125 uint32_t sc_alq_debug; /* Debug flags to report */ 126 struct alq * sc_alq_alq; /* alq state */ 127 unsigned int sc_alq_qsize; /* queue size */ 128 unsigned int sc_alq_numlost; /* number of "lost" entries */ 129 int sc_alq_isactive; 130 char sc_alq_devname[ATH_ALQ_DEVNAME_LEN]; 131 char sc_alq_filename[ATH_ALQ_FILENAME_LEN]; 132 struct if_ath_alq_init_state sc_alq_cfg; 133 }; 134 135 /* 128 bytes in total */ 136 #define ATH_ALQ_PAYLOAD_LEN 112 137 138 struct if_ath_alq_hdr { 139 uint64_t threadid; 140 uint32_t tstamp_sec; 141 uint32_t tstamp_usec; 142 uint16_t op; 143 uint16_t len; /* Length of (optional) payload */ 144 }; 145 146 struct if_ath_alq_payload { 147 struct if_ath_alq_hdr hdr; 148 char payload[]; 149 }; 150 151 #ifdef _KERNEL 152 static inline int 153 if_ath_alq_checkdebug(struct if_ath_alq *alq, uint16_t op) 154 { 155 156 return ((alq->sc_alq_debug | ATH_ALQ_LOG_ALWAYS_MASK) 157 & (1 << (op - 1))); 158 } 159 160 extern void if_ath_alq_init(struct if_ath_alq *alq, const char *devname); 161 extern void if_ath_alq_setcfg(struct if_ath_alq *alq, uint32_t macVer, 162 uint32_t macRev, uint32_t phyRev, uint32_t halMagic); 163 extern void if_ath_alq_tidyup(struct if_ath_alq *alq); 164 extern int if_ath_alq_start(struct if_ath_alq *alq); 165 extern int if_ath_alq_stop(struct if_ath_alq *alq); 166 extern void if_ath_alq_post(struct if_ath_alq *alq, uint16_t op, 167 uint16_t len, const char *buf); 168 169 /* XXX maybe doesn't belong here? */ 170 static inline void 171 if_ath_alq_post_intr(struct if_ath_alq *alq, uint32_t status, 172 uint32_t *state, uint32_t sync_state) 173 { 174 int i; 175 struct if_ath_alq_interrupt intr; 176 177 if (! if_ath_alq_checkdebug(alq, ATH_ALQ_INTR_STATUS)) 178 return; 179 180 intr.intr_status = htobe32(status); 181 for (i = 0; i < 8; i++) 182 intr.intr_state[i] = htobe32(state[i]); 183 intr.intr_syncstate = htobe32(sync_state); 184 185 if_ath_alq_post(alq, ATH_ALQ_INTR_STATUS, sizeof(intr), 186 (const char *) &intr); 187 } 188 189 #endif /* _KERNEL */ 190 191 #endif 192