1 /*- 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 /* 34 * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver. 35 */ 36 #include "opt_ath.h" 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/malloc.h> 41 #include <sys/module.h> 42 #include <sys/kernel.h> 43 #include <sys/lock.h> 44 #include <sys/mutex.h> 45 #include <sys/errno.h> 46 47 #include <sys/bus.h> 48 #include <sys/rman.h> 49 50 #include <sys/socket.h> 51 52 #include <net/if.h> 53 #include <net/if_media.h> 54 #include <net/if_arp.h> 55 #include <net/ethernet.h> 56 57 #include <netproto/802_11/ieee80211_var.h> 58 59 #include <dev/netif/ath/ath/if_athvar.h> 60 61 #if defined(__DragonFly__) 62 63 #include <bus/pci/pcivar.h> 64 #include <bus/pci/pcireg.h> 65 66 #else 67 68 #include <dev/pci/pcivar.h> 69 #include <dev/pci/pcireg.h> 70 71 #endif 72 73 /* For EEPROM firmware */ 74 #ifdef ATH_EEPROM_FIRMWARE 75 #include <sys/linker.h> 76 #include <sys/firmware.h> 77 #endif /* ATH_EEPROM_FIRMWARE */ 78 79 /* 80 * PCI glue. 81 */ 82 83 struct ath_pci_softc { 84 struct ath_softc sc_sc; 85 struct resource *sc_sr; /* memory resource */ 86 struct resource *sc_irq; /* irq resource */ 87 void *sc_ih; /* interrupt handler */ 88 }; 89 90 /* 91 * XXX eventually this should be some system level definition 92 * so modules will hvae probe/attach information like USB. 93 * But for now.. 94 */ 95 struct pci_device_id { 96 int vendor_id; 97 int device_id; 98 99 int sub_vendor_id; 100 int sub_device_id; 101 102 int driver_data; 103 104 int match_populated:1; 105 int match_vendor_id:1; 106 int match_device_id:1; 107 int match_sub_vendor_id:1; 108 int match_sub_device_id:1; 109 }; 110 111 #define PCI_VDEVICE(v, s) \ 112 .vendor_id = (v), \ 113 .device_id = (s), \ 114 .match_populated = 1, \ 115 .match_vendor_id = 1, \ 116 .match_device_id = 1 117 118 #define PCI_DEVICE_SUB(v, d, dv, ds) \ 119 .match_populated = 1, \ 120 .vendor_id = (v), .match_vendor_id = 1, \ 121 .device_id = (d), .match_device_id = 1, \ 122 .sub_vendor_id = (dv), .match_sub_vendor_id = 1, \ 123 .sub_device_id = (ds), .match_sub_device_id = 1 124 125 #define PCI_VENDOR_ID_ATHEROS 0x168c 126 #define PCI_VENDOR_ID_SAMSUNG 0x144d 127 #define PCI_VENDOR_ID_AZWAVE 0x1a3b 128 #define PCI_VENDOR_ID_FOXCONN 0x105b 129 #define PCI_VENDOR_ID_ATTANSIC 0x1969 130 #define PCI_VENDOR_ID_ASUSTEK 0x1043 131 #define PCI_VENDOR_ID_DELL 0x1028 132 #define PCI_VENDOR_ID_QMI 0x1a32 133 #define PCI_VENDOR_ID_LENOVO 0x17aa 134 #define PCI_VENDOR_ID_HP 0x103c 135 136 #include "if_ath_pci_devlist.h" 137 138 /* 139 * Attempt to find a match for the given device in 140 * the given device table. 141 * 142 * Returns the device structure or NULL if no matching 143 * PCI device is found. 144 */ 145 static const struct pci_device_id * 146 ath_pci_probe_device(device_t dev, const struct pci_device_id *dev_table, int nentries) 147 { 148 int i; 149 int vendor_id, device_id; 150 int sub_vendor_id, sub_device_id; 151 152 vendor_id = pci_get_vendor(dev); 153 device_id = pci_get_device(dev); 154 sub_vendor_id = pci_get_subvendor(dev); 155 sub_device_id = pci_get_subdevice(dev); 156 157 for (i = 0; i < nentries; i++) { 158 /* Don't match on non-populated (eg empty) entries */ 159 if (! dev_table[i].match_populated) 160 continue; 161 162 if (dev_table[i].match_vendor_id && 163 (dev_table[i].vendor_id != vendor_id)) 164 continue; 165 if (dev_table[i].match_device_id && 166 (dev_table[i].device_id != device_id)) 167 continue; 168 if (dev_table[i].match_sub_vendor_id && 169 (dev_table[i].sub_vendor_id != sub_vendor_id)) 170 continue; 171 if (dev_table[i].match_sub_device_id && 172 (dev_table[i].sub_device_id != sub_device_id)) 173 continue; 174 175 /* Match */ 176 return (&dev_table[i]); 177 } 178 179 return (NULL); 180 } 181 182 #define BS_BAR 0x10 183 #define PCIR_RETRY_TIMEOUT 0x41 184 #define PCIR_CFG_PMCSR 0x48 185 186 #define DEFAULT_CACHESIZE 32 187 188 static void 189 ath_pci_setup(device_t dev) 190 { 191 uint8_t cz; 192 193 /* XXX TODO: need to override the _system_ saved copies of this */ 194 195 /* 196 * If the cache line size is 0, force it to a reasonable 197 * value. 198 */ 199 cz = pci_read_config(dev, PCIR_CACHELNSZ, 1); 200 if (cz == 0) { 201 pci_write_config(dev, PCIR_CACHELNSZ, 202 DEFAULT_CACHESIZE / 4, 1); 203 } 204 205 /* Override the system latency timer */ 206 pci_write_config(dev, PCIR_LATTIMER, 0xa8, 1); 207 208 /* If a PCI NIC, force wakeup */ 209 #ifdef ATH_PCI_WAKEUP_WAR 210 /* XXX TODO: don't do this for non-PCI (ie, PCIe, Cardbus!) */ 211 if (1) { 212 uint16_t pmcsr; 213 pmcsr = pci_read_config(dev, PCIR_CFG_PMCSR, 2); 214 pmcsr |= 3; 215 pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2); 216 pmcsr &= ~3; 217 pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2); 218 } 219 #endif 220 221 /* 222 * Disable retry timeout to keep PCI Tx retries from 223 * interfering with C3 CPU state. 224 */ 225 pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1); 226 } 227 228 static int 229 ath_pci_probe(device_t dev) 230 { 231 const char* devname; 232 233 devname = ath_hal_probe(pci_get_vendor(dev), pci_get_device(dev)); 234 if (devname != NULL) { 235 device_set_desc(dev, devname); 236 return BUS_PROBE_DEFAULT; 237 } 238 return ENXIO; 239 } 240 241 static int 242 ath_pci_attach(device_t dev) 243 { 244 struct ath_pci_softc *psc = device_get_softc(dev); 245 struct ath_softc *sc = &psc->sc_sc; 246 int error = ENXIO; 247 int rid; 248 #ifdef ATH_EEPROM_FIRMWARE 249 const struct firmware *fw = NULL; 250 const char *buf; 251 #endif 252 const struct pci_device_id *pd; 253 254 sc->sc_dev = dev; 255 256 /* Do this lookup anyway; figure out what to do with it later */ 257 pd = ath_pci_probe_device(dev, ath_pci_id_table, nitems(ath_pci_id_table)); 258 if (pd) 259 sc->sc_pci_devinfo = pd->driver_data; 260 261 /* 262 * Enable bus mastering. 263 */ 264 pci_enable_busmaster(dev); 265 266 /* 267 * Setup other PCI bus configuration parameters. 268 */ 269 ath_pci_setup(dev); 270 271 /* 272 * Setup memory-mapping of PCI registers. 273 */ 274 rid = BS_BAR; 275 psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 276 RF_ACTIVE); 277 if (psc->sc_sr == NULL) { 278 device_printf(dev, "cannot map register space\n"); 279 goto bad; 280 } 281 sc->sc_st = (HAL_BUS_TAG) rman_get_bustag(psc->sc_sr); 282 sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr); 283 /* 284 * Mark device invalid so any interrupts (shared or otherwise) 285 * that arrive before the HAL is setup are discarded. 286 */ 287 sc->sc_invalid = 1; 288 289 /* 290 * Arrange interrupt line. 291 */ 292 rid = 0; 293 psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 294 RF_SHAREABLE|RF_ACTIVE); 295 if (psc->sc_irq == NULL) { 296 device_printf(dev, "could not map interrupt\n"); 297 goto bad1; 298 } 299 #if defined(__DragonFly__) 300 if (bus_setup_intr(dev, psc->sc_irq, 301 INTR_MPSAFE, 302 ath_intr, sc, &psc->sc_ih, 303 &wlan_global_serializer)) { 304 device_printf(dev, "could not establish interrupt\n"); 305 goto bad2; 306 } 307 #else 308 if (bus_setup_intr(dev, psc->sc_irq, 309 INTR_TYPE_NET | INTR_MPSAFE, 310 NULL, ath_intr, sc, &psc->sc_ih)) { 311 device_printf(dev, "could not establish interrupt\n"); 312 goto bad2; 313 } 314 #endif 315 316 /* 317 * Setup DMA descriptor area. 318 */ 319 if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 320 #if defined(__DragonFly__) 321 4, 0, /* alignment, bounds */ 322 #else 323 1, 0, /* alignment, bounds */ 324 #endif 325 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 326 BUS_SPACE_MAXADDR, /* highaddr */ 327 NULL, NULL, /* filter, filterarg */ 328 0x3ffff, /* maxsize XXX */ 329 ATH_MAX_SCATTER, /* nsegments */ 330 0x3ffff, /* maxsegsize XXX */ 331 BUS_DMA_ALLOCNOW, /* flags */ 332 #if !defined(__DragonFly__) 333 NULL, /* lockfunc */ 334 NULL, /* lockarg */ 335 #endif 336 &sc->sc_dmat)) { 337 device_printf(dev, "cannot allocate DMA tag\n"); 338 goto bad3; 339 } 340 341 #ifdef ATH_EEPROM_FIRMWARE 342 /* 343 * If there's an EEPROM firmware image, load that in. 344 */ 345 if (resource_string_value(device_get_name(dev), device_get_unit(dev), 346 "eeprom_firmware", &buf) == 0) { 347 if (bootverbose) 348 device_printf(dev, "%s: looking up firmware @ '%s'\n", 349 __func__, buf); 350 351 fw = firmware_get(buf); 352 if (fw == NULL) { 353 device_printf(dev, "%s: couldn't find firmware\n", 354 __func__); 355 goto bad3; 356 } 357 358 device_printf(dev, "%s: EEPROM firmware @ %p\n", 359 __func__, fw->data); 360 sc->sc_eepromdata = 361 kmalloc(fw->datasize, M_TEMP, M_WAITOK | M_ZERO); 362 if (! sc->sc_eepromdata) { 363 device_printf(dev, "%s: can't malloc eepromdata\n", 364 __func__); 365 goto bad3; 366 } 367 memcpy(sc->sc_eepromdata, fw->data, fw->datasize); 368 firmware_put(fw, 0); 369 } 370 #endif /* ATH_EEPROM_FIRMWARE */ 371 372 ATH_LOCK_INIT(sc); 373 ATH_PCU_LOCK_INIT(sc); 374 ATH_RX_LOCK_INIT(sc); 375 ATH_TX_LOCK_INIT(sc); 376 ATH_TX_IC_LOCK_INIT(sc); 377 ATH_TXSTATUS_LOCK_INIT(sc); 378 379 error = ath_attach(pci_get_device(dev), sc); 380 if (error == 0) /* success */ 381 return 0; 382 383 ATH_TXSTATUS_LOCK_DESTROY(sc); 384 ATH_PCU_LOCK_DESTROY(sc); 385 ATH_RX_LOCK_DESTROY(sc); 386 ATH_TX_IC_LOCK_DESTROY(sc); 387 ATH_TX_LOCK_DESTROY(sc); 388 ATH_LOCK_DESTROY(sc); 389 bus_dma_tag_destroy(sc->sc_dmat); 390 bad3: 391 bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); 392 bad2: 393 bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); 394 bad1: 395 bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr); 396 bad: 397 return (error); 398 } 399 400 static int 401 ath_pci_detach(device_t dev) 402 { 403 struct ath_pci_softc *psc = device_get_softc(dev); 404 struct ath_softc *sc = &psc->sc_sc; 405 406 /* check if device was removed */ 407 sc->sc_invalid = !bus_child_present(dev); 408 409 /* 410 * Do a config read to clear pre-existing pci error status. 411 */ 412 (void) pci_read_config(dev, PCIR_COMMAND, 4); 413 414 ath_detach(sc); 415 416 bus_generic_detach(dev); 417 bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); 418 bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); 419 420 bus_dma_tag_destroy(sc->sc_dmat); 421 bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr); 422 423 if (sc->sc_eepromdata) 424 kfree(sc->sc_eepromdata, M_TEMP); 425 426 ATH_TXSTATUS_LOCK_DESTROY(sc); 427 ATH_PCU_LOCK_DESTROY(sc); 428 ATH_RX_LOCK_DESTROY(sc); 429 ATH_TX_IC_LOCK_DESTROY(sc); 430 ATH_TX_LOCK_DESTROY(sc); 431 ATH_LOCK_DESTROY(sc); 432 433 return (0); 434 } 435 436 static int 437 ath_pci_shutdown(device_t dev) 438 { 439 struct ath_pci_softc *psc = device_get_softc(dev); 440 441 ath_shutdown(&psc->sc_sc); 442 return (0); 443 } 444 445 static int 446 ath_pci_suspend(device_t dev) 447 { 448 struct ath_pci_softc *psc = device_get_softc(dev); 449 450 ath_suspend(&psc->sc_sc); 451 452 return (0); 453 } 454 455 static int 456 ath_pci_resume(device_t dev) 457 { 458 struct ath_pci_softc *psc = device_get_softc(dev); 459 460 /* 461 * Suspend/resume resets the PCI configuration space. 462 */ 463 ath_pci_setup(dev); 464 465 ath_resume(&psc->sc_sc); 466 467 return (0); 468 } 469 470 static device_method_t ath_pci_methods[] = { 471 /* Device interface */ 472 DEVMETHOD(device_probe, ath_pci_probe), 473 DEVMETHOD(device_attach, ath_pci_attach), 474 DEVMETHOD(device_detach, ath_pci_detach), 475 DEVMETHOD(device_shutdown, ath_pci_shutdown), 476 DEVMETHOD(device_suspend, ath_pci_suspend), 477 DEVMETHOD(device_resume, ath_pci_resume), 478 479 { 0,0 } 480 }; 481 static driver_t ath_pci_driver = { 482 "ath", 483 ath_pci_methods, 484 sizeof (struct ath_pci_softc) 485 }; 486 static devclass_t ath_devclass; 487 DRIVER_MODULE(ath_pci, pci, ath_pci_driver, ath_devclass, NULL, NULL); 488 MODULE_VERSION(ath_pci, 1); 489 MODULE_DEPEND(ath_pci, wlan, 1, 1, 1); /* 802.11 media layer */ 490 MODULE_DEPEND(ath_pci, if_ath, 1, 1, 1); /* if_ath driver */ 491