1 /*- 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 * $FreeBSD: head/sys/dev/ath/if_ath_pci.c 192147 2009-05-15 17:02:11Z imp $ 30 * $DragonFly$ 31 */ 32 33 /* 34 * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver. 35 */ 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/module.h> 40 #include <sys/kernel.h> 41 #include <sys/lock.h> 42 #include <sys/mutex.h> 43 #include <sys/errno.h> 44 #include <sys/bus.h> 45 #include <sys/rman.h> 46 47 #include <sys/socket.h> 48 49 #include <net/if.h> 50 #include <net/if_media.h> 51 #include <net/if_arp.h> 52 53 #include <netproto/802_11/ieee80211_var.h> 54 55 #include <dev/netif/ath/ath/if_athvar.h> 56 57 #include <bus/pci/pcivar.h> 58 #include <bus/pci/pcireg.h> 59 60 /* 61 * PCI glue. 62 */ 63 64 struct ath_pci_softc { 65 struct ath_softc sc_sc; 66 struct resource *sc_sr; /* memory resource */ 67 struct resource *sc_irq; /* irq resource */ 68 void *sc_ih; /* interrupt handler */ 69 }; 70 71 #define BS_BAR 0x10 72 #define PCIR_RETRY_TIMEOUT 0x41 73 74 static int 75 ath_pci_probe(device_t dev) 76 { 77 const char* devname; 78 79 wlan_serialize_enter(); 80 devname = ath_hal_probe(pci_get_vendor(dev), pci_get_device(dev)); 81 if (devname != NULL) { 82 device_set_desc(dev, devname); 83 wlan_serialize_exit(); 84 return BUS_PROBE_DEFAULT; 85 } 86 wlan_serialize_exit(); 87 return ENXIO; 88 } 89 90 static int 91 ath_pci_attach(device_t dev) 92 { 93 struct ath_pci_softc *psc = device_get_softc(dev); 94 struct ath_softc *sc = &psc->sc_sc; 95 int error = ENXIO; 96 int rid; 97 98 wlan_serialize_enter(); 99 sc->sc_dev = dev; 100 101 /* 102 * Enable bus mastering. 103 */ 104 pci_enable_busmaster(dev); 105 106 /* 107 * Disable retry timeout to keep PCI Tx retries from 108 * interfering with C3 CPU state. 109 */ 110 pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1); 111 112 /* 113 * Setup memory-mapping of PCI registers. 114 */ 115 rid = BS_BAR; 116 psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 117 RF_ACTIVE); 118 if (psc->sc_sr == NULL) { 119 device_printf(dev, "cannot map register space\n"); 120 goto bad; 121 } 122 /* XXX uintptr_t is a bandaid for ia64; to be fixed */ 123 sc->sc_st = (HAL_BUS_TAG)(uintptr_t) rman_get_bustag(psc->sc_sr); 124 sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr); 125 /* 126 * Mark device invalid so any interrupts (shared or otherwise) 127 * that arrive before the HAL is setup are discarded. 128 */ 129 sc->sc_invalid = 1; 130 131 /* 132 * Arrange interrupt line. 133 */ 134 rid = 0; 135 psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 136 RF_SHAREABLE|RF_ACTIVE); 137 if (psc->sc_irq == NULL) { 138 device_printf(dev, "could not map interrupt\n"); 139 goto bad1; 140 } 141 if (bus_setup_intr(dev, psc->sc_irq, 142 INTR_MPSAFE, 143 ath_intr, sc, &psc->sc_ih, 144 &wlan_global_serializer)) { 145 device_printf(dev, "could not establish interrupt\n"); 146 goto bad2; 147 } 148 149 /* 150 * Setup DMA descriptor area. 151 */ 152 if (bus_dma_tag_create(sc->sc_dmat, /* parent */ 153 4, 0, /* alignment, bounds */ 154 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 155 BUS_SPACE_MAXADDR, /* highaddr */ 156 NULL, NULL, /* filter, filterarg */ 157 0x3ffff, /* maxsize XXX */ 158 ATH_MAX_SCATTER, /* nsegments */ 159 0x3ffff, /* maxsegsize XXX */ 160 BUS_DMA_ALLOCNOW, /* flags */ 161 &sc->sc_dmat)) { 162 device_printf(dev, "cannot allocate DMA tag\n"); 163 goto bad3; 164 } 165 166 error = ath_attach(pci_get_device(dev), sc); 167 if (error == 0) { /* success */ 168 wlan_serialize_exit(); 169 return 0; 170 } 171 172 bus_dma_tag_destroy(sc->sc_dmat); 173 bad3: 174 bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); 175 bad2: 176 bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); 177 bad1: 178 bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr); 179 bad: 180 wlan_serialize_exit(); 181 return (error); 182 } 183 184 static int 185 ath_pci_detach(device_t dev) 186 { 187 struct ath_pci_softc *psc = device_get_softc(dev); 188 struct ath_softc *sc = &psc->sc_sc; 189 190 wlan_serialize_enter(); 191 /* check if device was removed */ 192 sc->sc_invalid = !bus_child_present(dev); 193 194 ath_detach(sc); 195 196 bus_generic_detach(dev); 197 bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); 198 bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); 199 200 bus_dma_tag_destroy(sc->sc_dmat); 201 bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr); 202 203 wlan_serialize_exit(); 204 return (0); 205 } 206 207 static int 208 ath_pci_shutdown(device_t dev) 209 { 210 struct ath_pci_softc *psc = device_get_softc(dev); 211 212 wlan_serialize_enter(); 213 ath_shutdown(&psc->sc_sc); 214 wlan_serialize_exit(); 215 return (0); 216 } 217 218 static int 219 ath_pci_suspend(device_t dev) 220 { 221 struct ath_pci_softc *psc = device_get_softc(dev); 222 223 wlan_serialize_enter(); 224 ath_suspend(&psc->sc_sc); 225 wlan_serialize_exit(); 226 227 return (0); 228 } 229 230 static int 231 ath_pci_resume(device_t dev) 232 { 233 struct ath_pci_softc *psc = device_get_softc(dev); 234 235 wlan_serialize_enter(); 236 ath_resume(&psc->sc_sc); 237 wlan_serialize_exit(); 238 239 return (0); 240 } 241 242 static device_method_t ath_pci_methods[] = { 243 /* Device interface */ 244 DEVMETHOD(device_probe, ath_pci_probe), 245 DEVMETHOD(device_attach, ath_pci_attach), 246 DEVMETHOD(device_detach, ath_pci_detach), 247 DEVMETHOD(device_shutdown, ath_pci_shutdown), 248 DEVMETHOD(device_suspend, ath_pci_suspend), 249 DEVMETHOD(device_resume, ath_pci_resume), 250 251 { 0,0 } 252 }; 253 static driver_t ath_pci_driver = { 254 "ath", 255 ath_pci_methods, 256 sizeof (struct ath_pci_softc) 257 }; 258 static devclass_t ath_devclass; 259 DRIVER_MODULE(ath, pci, ath_pci_driver, ath_devclass, 0, 0); 260 MODULE_VERSION(ath, 1); 261 262 MODULE_DEPEND(ath, ath_hal, 1, 1, 1); /* Atheros HAL */ 263 MODULE_DEPEND(ath, ath_rate, 1, 1, 1); /* rate control algorithm */ 264 MODULE_DEPEND(ath, wlan, 1, 1, 1); /* 802.11 media layer */ 265