1 /*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 /* 34 * Driver for the Atheros Wireless LAN controller. 35 * 36 * This software is derived from work of Atsushi Onoe; his contribution 37 * is greatly appreciated. 38 */ 39 40 #include "opt_inet.h" 41 #include "opt_ath.h" 42 #include "opt_wlan.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/sysctl.h> 47 #include <sys/mbuf.h> 48 #include <sys/malloc.h> 49 #include <sys/lock.h> 50 #include <sys/mutex.h> 51 #include <sys/kernel.h> 52 #include <sys/socket.h> 53 #include <sys/sockio.h> 54 #include <sys/errno.h> 55 #include <sys/callout.h> 56 #include <sys/bus.h> 57 #include <sys/endian.h> 58 #include <sys/kthread.h> 59 #include <sys/taskqueue.h> 60 #include <sys/priv.h> 61 62 #if defined(__DragonFly__) 63 /* empty */ 64 #else 65 #include <machine/bus.h> 66 #endif 67 68 #include <net/if.h> 69 #include <net/if_var.h> 70 #include <net/if_dl.h> 71 #include <net/if_media.h> 72 #include <net/if_types.h> 73 #include <net/if_arp.h> 74 #include <net/ethernet.h> 75 #include <net/if_llc.h> 76 77 #include <netproto/802_11/ieee80211_var.h> 78 #include <netproto/802_11/ieee80211_regdomain.h> 79 #ifdef IEEE80211_SUPPORT_SUPERG 80 #include <netproto/802_11/ieee80211_superg.h> 81 #endif 82 #ifdef IEEE80211_SUPPORT_TDMA 83 #include <netproto/802_11/ieee80211_tdma.h> 84 #endif 85 86 #include <net/bpf.h> 87 88 #ifdef INET 89 #include <netinet/in.h> 90 #include <netinet/if_ether.h> 91 #endif 92 93 #include <dev/netif/ath/ath/if_athvar.h> 94 #include <dev/netif/ath/ath_hal/ah_devid.h> /* XXX for softled */ 95 #include <dev/netif/ath/ath_hal/ah_diagcodes.h> 96 97 #include <dev/netif/ath/ath/if_ath_debug.h> 98 #include <dev/netif/ath/ath/if_ath_led.h> 99 #include <dev/netif/ath/ath/if_ath_misc.h> 100 #include <dev/netif/ath/ath/if_ath_tx.h> 101 #include <dev/netif/ath/ath/if_ath_sysctl.h> 102 103 #ifdef ATH_TX99_DIAG 104 #include <dev/ath/ath_tx99/ath_tx99.h> 105 #endif 106 107 #ifdef ATH_DEBUG_ALQ 108 #include <dev/netif/ath/if_ath_alq.h> 109 #endif 110 111 static int 112 ath_sysctl_slottime(SYSCTL_HANDLER_ARGS) 113 { 114 struct ath_softc *sc = arg1; 115 u_int slottime; 116 int error; 117 118 ATH_LOCK(sc); 119 ath_power_set_power_state(sc, HAL_PM_AWAKE); 120 slottime = ath_hal_getslottime(sc->sc_ah); 121 ATH_UNLOCK(sc); 122 123 error = sysctl_handle_int(oidp, &slottime, 0, req); 124 if (error || !req->newptr) 125 goto finish; 126 127 error = !ath_hal_setslottime(sc->sc_ah, slottime) ? EINVAL : 0; 128 129 finish: 130 ATH_LOCK(sc); 131 ath_power_restore_power_state(sc); 132 ATH_UNLOCK(sc); 133 134 return error; 135 } 136 137 static int 138 ath_sysctl_acktimeout(SYSCTL_HANDLER_ARGS) 139 { 140 struct ath_softc *sc = arg1; 141 u_int acktimeout; 142 int error; 143 144 ATH_LOCK(sc); 145 ath_power_set_power_state(sc, HAL_PM_AWAKE); 146 acktimeout = ath_hal_getacktimeout(sc->sc_ah); 147 ATH_UNLOCK(sc); 148 149 error = sysctl_handle_int(oidp, &acktimeout, 0, req); 150 if (error || !req->newptr) 151 goto finish; 152 153 error = !ath_hal_setacktimeout(sc->sc_ah, acktimeout) ? EINVAL : 0; 154 155 finish: 156 ATH_LOCK(sc); 157 ath_power_restore_power_state(sc); 158 ATH_UNLOCK(sc); 159 160 return (error); 161 } 162 163 static int 164 ath_sysctl_ctstimeout(SYSCTL_HANDLER_ARGS) 165 { 166 struct ath_softc *sc = arg1; 167 u_int ctstimeout; 168 int error; 169 170 ATH_LOCK(sc); 171 ath_power_set_power_state(sc, HAL_PM_AWAKE); 172 ctstimeout = ath_hal_getctstimeout(sc->sc_ah); 173 ATH_UNLOCK(sc); 174 175 error = sysctl_handle_int(oidp, &ctstimeout, 0, req); 176 if (error || !req->newptr) 177 goto finish; 178 179 error = !ath_hal_setctstimeout(sc->sc_ah, ctstimeout) ? EINVAL : 0; 180 181 finish: 182 ATH_LOCK(sc); 183 ath_power_restore_power_state(sc); 184 ATH_UNLOCK(sc); 185 186 return (error); 187 } 188 189 static int 190 ath_sysctl_softled(SYSCTL_HANDLER_ARGS) 191 { 192 struct ath_softc *sc = arg1; 193 int softled = sc->sc_softled; 194 int error; 195 196 error = sysctl_handle_int(oidp, &softled, 0, req); 197 if (error || !req->newptr) 198 return error; 199 softled = (softled != 0); 200 if (softled != sc->sc_softled) { 201 if (softled) { 202 /* NB: handle any sc_ledpin change */ 203 ath_led_config(sc); 204 } 205 sc->sc_softled = softled; 206 } 207 return 0; 208 } 209 210 static int 211 ath_sysctl_ledpin(SYSCTL_HANDLER_ARGS) 212 { 213 struct ath_softc *sc = arg1; 214 int ledpin = sc->sc_ledpin; 215 int error; 216 217 error = sysctl_handle_int(oidp, &ledpin, 0, req); 218 if (error || !req->newptr) 219 return error; 220 if (ledpin != sc->sc_ledpin) { 221 sc->sc_ledpin = ledpin; 222 if (sc->sc_softled) { 223 ath_led_config(sc); 224 } 225 } 226 return 0; 227 } 228 229 static int 230 ath_sysctl_hardled(SYSCTL_HANDLER_ARGS) 231 { 232 struct ath_softc *sc = arg1; 233 int hardled = sc->sc_hardled; 234 int error; 235 236 error = sysctl_handle_int(oidp, &hardled, 0, req); 237 if (error || !req->newptr) 238 return error; 239 hardled = (hardled != 0); 240 if (hardled != sc->sc_hardled) { 241 if (hardled) { 242 /* NB: handle any sc_ledpin change */ 243 ath_led_config(sc); 244 } 245 sc->sc_hardled = hardled; 246 } 247 return 0; 248 } 249 250 static int 251 ath_sysctl_txantenna(SYSCTL_HANDLER_ARGS) 252 { 253 struct ath_softc *sc = arg1; 254 u_int txantenna; 255 int error; 256 257 ATH_LOCK(sc); 258 ath_power_set_power_state(sc, HAL_PM_AWAKE); 259 ATH_UNLOCK(sc); 260 261 txantenna = ath_hal_getantennaswitch(sc->sc_ah); 262 263 error = sysctl_handle_int(oidp, &txantenna, 0, req); 264 if (!error && req->newptr) { 265 /* XXX assumes 2 antenna ports */ 266 if (txantenna < HAL_ANT_VARIABLE || txantenna > HAL_ANT_FIXED_B) { 267 error = EINVAL; 268 goto finish; 269 } 270 ath_hal_setantennaswitch(sc->sc_ah, txantenna); 271 /* 272 * NB: with the switch locked this isn't meaningful, 273 * but set it anyway so things like radiotap get 274 * consistent info in their data. 275 */ 276 sc->sc_txantenna = txantenna; 277 } 278 279 finish: 280 ATH_LOCK(sc); 281 ath_power_restore_power_state(sc); 282 ATH_UNLOCK(sc); 283 284 return (error); 285 } 286 287 static int 288 ath_sysctl_rxantenna(SYSCTL_HANDLER_ARGS) 289 { 290 struct ath_softc *sc = arg1; 291 u_int defantenna; 292 int error; 293 294 ATH_LOCK(sc); 295 ath_power_set_power_state(sc, HAL_PM_AWAKE); 296 defantenna = ath_hal_getdefantenna(sc->sc_ah); 297 ATH_UNLOCK(sc); 298 299 error = sysctl_handle_int(oidp, &defantenna, 0, req); 300 if (!error && req->newptr) 301 ath_hal_setdefantenna(sc->sc_ah, defantenna); 302 303 ATH_LOCK(sc); 304 ath_power_restore_power_state(sc); 305 ATH_UNLOCK(sc); 306 307 return (error); 308 } 309 310 static int 311 ath_sysctl_diversity(SYSCTL_HANDLER_ARGS) 312 { 313 struct ath_softc *sc = arg1; 314 u_int diversity; 315 int error; 316 317 ATH_LOCK(sc); 318 ath_power_set_power_state(sc, HAL_PM_AWAKE); 319 ATH_UNLOCK(sc); 320 321 diversity = ath_hal_getdiversity(sc->sc_ah); 322 323 error = sysctl_handle_int(oidp, &diversity, 0, req); 324 if (error || !req->newptr) 325 goto finish; 326 if (!ath_hal_setdiversity(sc->sc_ah, diversity)) { 327 error = EINVAL; 328 goto finish; 329 } 330 sc->sc_diversity = diversity; 331 error = 0; 332 333 finish: 334 ATH_LOCK(sc); 335 ath_power_restore_power_state(sc); 336 ATH_UNLOCK(sc); 337 338 return (error); 339 } 340 341 static int 342 ath_sysctl_diag(SYSCTL_HANDLER_ARGS) 343 { 344 struct ath_softc *sc = arg1; 345 u_int32_t diag; 346 int error; 347 348 ATH_LOCK(sc); 349 ath_power_set_power_state(sc, HAL_PM_AWAKE); 350 ATH_UNLOCK(sc); 351 352 if (!ath_hal_getdiag(sc->sc_ah, &diag)) { 353 error = EINVAL; 354 goto finish; 355 } 356 357 error = sysctl_handle_int(oidp, &diag, 0, req); 358 if (error || !req->newptr) 359 goto finish; 360 error = !ath_hal_setdiag(sc->sc_ah, diag) ? EINVAL : 0; 361 362 finish: 363 ATH_LOCK(sc); 364 ath_power_restore_power_state(sc); 365 ATH_UNLOCK(sc); 366 367 return (error); 368 } 369 370 static int 371 ath_sysctl_tpscale(SYSCTL_HANDLER_ARGS) 372 { 373 struct ath_softc *sc = arg1; 374 u_int32_t scale; 375 int error; 376 377 ATH_LOCK(sc); 378 ath_power_set_power_state(sc, HAL_PM_AWAKE); 379 ATH_UNLOCK(sc); 380 381 (void) ath_hal_gettpscale(sc->sc_ah, &scale); 382 error = sysctl_handle_int(oidp, &scale, 0, req); 383 if (error || !req->newptr) 384 goto finish; 385 386 error = !ath_hal_settpscale(sc->sc_ah, scale) ? EINVAL : 387 (sc->sc_running) ? ath_reset(sc, ATH_RESET_NOLOSS) : 0; 388 389 finish: 390 ATH_LOCK(sc); 391 ath_power_restore_power_state(sc); 392 ATH_UNLOCK(sc); 393 394 return (error); 395 } 396 397 static int 398 ath_sysctl_tpc(SYSCTL_HANDLER_ARGS) 399 { 400 struct ath_softc *sc = arg1; 401 u_int tpc; 402 int error; 403 404 ATH_LOCK(sc); 405 ath_power_set_power_state(sc, HAL_PM_AWAKE); 406 ATH_UNLOCK(sc); 407 408 tpc = ath_hal_gettpc(sc->sc_ah); 409 410 error = sysctl_handle_int(oidp, &tpc, 0, req); 411 if (error || !req->newptr) 412 goto finish; 413 error = !ath_hal_settpc(sc->sc_ah, tpc) ? EINVAL : 0; 414 415 finish: 416 ATH_LOCK(sc); 417 ath_power_restore_power_state(sc); 418 ATH_UNLOCK(sc); 419 420 return (error); 421 } 422 423 static int 424 ath_sysctl_rfkill(SYSCTL_HANDLER_ARGS) 425 { 426 struct ath_softc *sc = arg1; 427 struct ath_hal *ah = sc->sc_ah; 428 u_int rfkill; 429 int error; 430 431 ATH_LOCK(sc); 432 ath_power_set_power_state(sc, HAL_PM_AWAKE); 433 ATH_UNLOCK(sc); 434 435 rfkill = ath_hal_getrfkill(ah); 436 437 error = sysctl_handle_int(oidp, &rfkill, 0, req); 438 if (error || !req->newptr) 439 goto finish; 440 if (rfkill == ath_hal_getrfkill(ah)) { /* unchanged */ 441 error = 0; 442 goto finish; 443 } 444 if (!ath_hal_setrfkill(ah, rfkill)) { 445 error = EINVAL; 446 goto finish; 447 } 448 error = sc->sc_running ? ath_reset(sc, ATH_RESET_FULL) : 0; 449 450 finish: 451 ATH_LOCK(sc); 452 ath_power_restore_power_state(sc); 453 ATH_UNLOCK(sc); 454 455 return (error); 456 } 457 458 static int 459 ath_sysctl_txagg(SYSCTL_HANDLER_ARGS) 460 { 461 struct ath_softc *sc = arg1; 462 int i, t, param = 0; 463 int error; 464 struct ath_buf *bf; 465 466 error = sysctl_handle_int(oidp, ¶m, 0, req); 467 if (error || !req->newptr) 468 return error; 469 470 if (param != 1) 471 return 0; 472 473 kprintf("no tx bufs (empty list): %d\n", sc->sc_stats.ast_tx_getnobuf); 474 kprintf("no tx bufs (was busy): %d\n", sc->sc_stats.ast_tx_getbusybuf); 475 476 kprintf("aggr single packet: %d\n", 477 sc->sc_aggr_stats.aggr_single_pkt); 478 kprintf("aggr single packet w/ BAW closed: %d\n", 479 sc->sc_aggr_stats.aggr_baw_closed_single_pkt); 480 kprintf("aggr non-baw packet: %d\n", 481 sc->sc_aggr_stats.aggr_nonbaw_pkt); 482 kprintf("aggr aggregate packet: %d\n", 483 sc->sc_aggr_stats.aggr_aggr_pkt); 484 kprintf("aggr single packet low hwq: %d\n", 485 sc->sc_aggr_stats.aggr_low_hwq_single_pkt); 486 kprintf("aggr single packet RTS aggr limited: %d\n", 487 sc->sc_aggr_stats.aggr_rts_aggr_limited); 488 kprintf("aggr sched, no work: %d\n", 489 sc->sc_aggr_stats.aggr_sched_nopkt); 490 for (i = 0; i < 64; i++) { 491 kprintf("%2d: %10d ", i, sc->sc_aggr_stats.aggr_pkts[i]); 492 if (i % 4 == 3) 493 kprintf("\n"); 494 } 495 kprintf("\n"); 496 497 for (i = 0; i < HAL_NUM_TX_QUEUES; i++) { 498 if (ATH_TXQ_SETUP(sc, i)) { 499 kprintf("HW TXQ %d: axq_depth=%d, axq_aggr_depth=%d, " 500 "axq_fifo_depth=%d, holdingbf=%p\n", 501 i, 502 sc->sc_txq[i].axq_depth, 503 sc->sc_txq[i].axq_aggr_depth, 504 sc->sc_txq[i].axq_fifo_depth, 505 sc->sc_txq[i].axq_holdingbf); 506 } 507 } 508 509 i = t = 0; 510 ATH_TXBUF_LOCK(sc); 511 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) { 512 if (bf->bf_flags & ATH_BUF_BUSY) { 513 kprintf("Busy: %d\n", t); 514 i++; 515 } 516 t++; 517 } 518 ATH_TXBUF_UNLOCK(sc); 519 kprintf("Total TX buffers: %d; Total TX buffers busy: %d (%d)\n", 520 t, i, sc->sc_txbuf_cnt); 521 522 i = t = 0; 523 ATH_TXBUF_LOCK(sc); 524 TAILQ_FOREACH(bf, &sc->sc_txbuf_mgmt, bf_list) { 525 if (bf->bf_flags & ATH_BUF_BUSY) { 526 kprintf("Busy: %d\n", t); 527 i++; 528 } 529 t++; 530 } 531 ATH_TXBUF_UNLOCK(sc); 532 kprintf("Total mgmt TX buffers: %d; Total mgmt TX buffers busy: %d\n", 533 t, i); 534 535 ATH_RX_LOCK(sc); 536 for (i = 0; i < 2; i++) { 537 kprintf("%d: fifolen: %d/%d; head=%d; tail=%d; m_pending=%p, m_holdbf=%p\n", 538 i, 539 sc->sc_rxedma[i].m_fifo_depth, 540 sc->sc_rxedma[i].m_fifolen, 541 sc->sc_rxedma[i].m_fifo_head, 542 sc->sc_rxedma[i].m_fifo_tail, 543 sc->sc_rxedma[i].m_rxpending, 544 sc->sc_rxedma[i].m_holdbf); 545 } 546 i = 0; 547 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 548 i++; 549 } 550 kprintf("Total RX buffers in free list: %d buffers\n", 551 i); 552 ATH_RX_UNLOCK(sc); 553 554 return 0; 555 } 556 557 static int 558 ath_sysctl_rfsilent(SYSCTL_HANDLER_ARGS) 559 { 560 struct ath_softc *sc = arg1; 561 u_int rfsilent; 562 int error; 563 564 ATH_LOCK(sc); 565 ath_power_set_power_state(sc, HAL_PM_AWAKE); 566 ATH_UNLOCK(sc); 567 568 (void) ath_hal_getrfsilent(sc->sc_ah, &rfsilent); 569 error = sysctl_handle_int(oidp, &rfsilent, 0, req); 570 if (error || !req->newptr) 571 goto finish; 572 if (!ath_hal_setrfsilent(sc->sc_ah, rfsilent)) { 573 error = EINVAL; 574 goto finish; 575 } 576 /* 577 * Earlier chips (< AR5212) have up to 8 GPIO 578 * pins exposed. 579 * 580 * AR5416 and later chips have many more GPIO 581 * pins (up to 16) so the mask is expanded to 582 * four bits. 583 */ 584 sc->sc_rfsilentpin = rfsilent & 0x3c; 585 sc->sc_rfsilentpol = (rfsilent & 0x2) != 0; 586 error = 0; 587 588 finish: 589 ATH_LOCK(sc); 590 ath_power_restore_power_state(sc); 591 ATH_UNLOCK(sc); 592 593 return (error); 594 } 595 596 static int 597 ath_sysctl_tpack(SYSCTL_HANDLER_ARGS) 598 { 599 struct ath_softc *sc = arg1; 600 u_int32_t tpack; 601 int error; 602 603 ATH_LOCK(sc); 604 ath_power_set_power_state(sc, HAL_PM_AWAKE); 605 ATH_UNLOCK(sc); 606 607 (void) ath_hal_gettpack(sc->sc_ah, &tpack); 608 error = sysctl_handle_int(oidp, &tpack, 0, req); 609 if (error || !req->newptr) 610 goto finish; 611 error = !ath_hal_settpack(sc->sc_ah, tpack) ? EINVAL : 0; 612 613 finish: 614 ATH_LOCK(sc); 615 ath_power_restore_power_state(sc); 616 ATH_UNLOCK(sc); 617 618 return (error); 619 } 620 621 static int 622 ath_sysctl_tpcts(SYSCTL_HANDLER_ARGS) 623 { 624 struct ath_softc *sc = arg1; 625 u_int32_t tpcts; 626 int error; 627 628 ATH_LOCK(sc); 629 ath_power_set_power_state(sc, HAL_PM_AWAKE); 630 ATH_UNLOCK(sc); 631 632 (void) ath_hal_gettpcts(sc->sc_ah, &tpcts); 633 error = sysctl_handle_int(oidp, &tpcts, 0, req); 634 if (error || !req->newptr) 635 goto finish; 636 637 error = !ath_hal_settpcts(sc->sc_ah, tpcts) ? EINVAL : 0; 638 639 finish: 640 ATH_LOCK(sc); 641 ath_power_restore_power_state(sc); 642 ATH_UNLOCK(sc); 643 644 return (error); 645 } 646 647 static int 648 ath_sysctl_intmit(SYSCTL_HANDLER_ARGS) 649 { 650 struct ath_softc *sc = arg1; 651 int intmit, error; 652 653 ATH_LOCK(sc); 654 ath_power_set_power_state(sc, HAL_PM_AWAKE); 655 ATH_UNLOCK(sc); 656 657 intmit = ath_hal_getintmit(sc->sc_ah); 658 error = sysctl_handle_int(oidp, &intmit, 0, req); 659 if (error || !req->newptr) 660 goto finish; 661 662 /* reusing error; 1 here means "good"; 0 means "fail" */ 663 error = ath_hal_setintmit(sc->sc_ah, intmit); 664 if (! error) { 665 error = EINVAL; 666 goto finish; 667 } 668 669 /* 670 * Reset the hardware here - disabling ANI in the HAL 671 * doesn't reset ANI related registers, so it'll leave 672 * things in an inconsistent state. 673 */ 674 if (sc->sc_running) 675 ath_reset(sc, ATH_RESET_NOLOSS); 676 677 error = 0; 678 679 finish: 680 ATH_LOCK(sc); 681 ath_power_restore_power_state(sc); 682 ATH_UNLOCK(sc); 683 684 return (error); 685 } 686 687 #ifdef IEEE80211_SUPPORT_TDMA 688 static int 689 ath_sysctl_setcca(SYSCTL_HANDLER_ARGS) 690 { 691 struct ath_softc *sc = arg1; 692 int setcca, error; 693 694 setcca = sc->sc_setcca; 695 error = sysctl_handle_int(oidp, &setcca, 0, req); 696 if (error || !req->newptr) 697 return error; 698 sc->sc_setcca = (setcca != 0); 699 return 0; 700 } 701 #endif /* IEEE80211_SUPPORT_TDMA */ 702 703 static int 704 ath_sysctl_forcebstuck(SYSCTL_HANDLER_ARGS) 705 { 706 struct ath_softc *sc = arg1; 707 int val = 0; 708 int error; 709 710 error = sysctl_handle_int(oidp, &val, 0, req); 711 if (error || !req->newptr) 712 return error; 713 if (val == 0) 714 return 0; 715 716 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask); 717 val = 0; 718 return 0; 719 } 720 721 static int 722 ath_sysctl_hangcheck(SYSCTL_HANDLER_ARGS) 723 { 724 struct ath_softc *sc = arg1; 725 int val = 0; 726 int error; 727 uint32_t mask = 0xffffffff; 728 uint32_t *sp; 729 uint32_t rsize; 730 struct ath_hal *ah = sc->sc_ah; 731 732 error = sysctl_handle_int(oidp, &val, 0, req); 733 if (error || !req->newptr) 734 return error; 735 if (val == 0) 736 return 0; 737 738 ATH_LOCK(sc); 739 ath_power_set_power_state(sc, HAL_PM_AWAKE); 740 ATH_UNLOCK(sc); 741 742 /* Do a hang check */ 743 if (!ath_hal_getdiagstate(ah, HAL_DIAG_CHECK_HANGS, 744 &mask, sizeof(mask), 745 (void *) &sp, &rsize)) { 746 error = 0; 747 goto finish; 748 } 749 750 device_printf(sc->sc_dev, "%s: sp=0x%08x\n", __func__, *sp); 751 752 val = 0; 753 error = 0; 754 finish: 755 ATH_LOCK(sc); 756 ath_power_restore_power_state(sc); 757 ATH_UNLOCK(sc); 758 759 return (error); 760 } 761 762 #ifdef ATH_DEBUG_ALQ 763 static int 764 ath_sysctl_alq_log(SYSCTL_HANDLER_ARGS) 765 { 766 struct ath_softc *sc = arg1; 767 int error, enable; 768 769 enable = (sc->sc_alq.sc_alq_isactive); 770 771 error = sysctl_handle_int(oidp, &enable, 0, req); 772 if (error || !req->newptr) 773 return (error); 774 else if (enable) 775 error = if_ath_alq_start(&sc->sc_alq); 776 else 777 error = if_ath_alq_stop(&sc->sc_alq); 778 return (error); 779 } 780 781 /* 782 * Attach the ALQ debugging if required. 783 */ 784 static void 785 ath_sysctl_alq_attach(struct ath_softc *sc) 786 { 787 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 788 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 789 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 790 791 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "alq", CTLFLAG_RD, 792 NULL, "Atheros ALQ logging parameters"); 793 child = SYSCTL_CHILDREN(tree); 794 795 SYSCTL_ADD_STRING(ctx, child, OID_AUTO, "filename", 796 CTLFLAG_RW, sc->sc_alq.sc_alq_filename, 0, "ALQ filename"); 797 798 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 799 "enable", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 800 ath_sysctl_alq_log, "I", ""); 801 802 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 803 "debugmask", CTLFLAG_RW, &sc->sc_alq.sc_alq_debug, 0, 804 "ALQ debug mask"); 805 806 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 807 "numlost", CTLFLAG_RW, &sc->sc_alq.sc_alq_numlost, 0, 808 "number lost"); 809 } 810 #endif /* ATH_DEBUG_ALQ */ 811 812 void 813 ath_sysctlattach(struct ath_softc *sc) 814 { 815 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 816 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 817 struct ath_hal *ah = sc->sc_ah; 818 819 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 820 "countrycode", CTLFLAG_RD, &sc->sc_eecc, 0, 821 "EEPROM country code"); 822 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 823 "regdomain", CTLFLAG_RD, &sc->sc_eerd, 0, 824 "EEPROM regdomain code"); 825 #ifdef ATH_DEBUG 826 SYSCTL_ADD_QUAD(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 827 "debug", CTLFLAG_RW, &sc->sc_debug, 828 #if defined(__DragonFly__) 829 0, 830 #endif 831 "control debugging printfs"); 832 #endif 833 #ifdef ATH_DEBUG_ALQ 834 SYSCTL_ADD_QUAD(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 835 "ktrdebug", CTLFLAG_RW, &sc->sc_ktrdebug, 836 #if defined(__DragonFly__) 837 0, 838 #endif 839 "control debugging KTR"); 840 #endif /* ATH_DEBUG_ALQ */ 841 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 842 "slottime", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 843 ath_sysctl_slottime, "I", "802.11 slot time (us)"); 844 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 845 "acktimeout", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 846 ath_sysctl_acktimeout, "I", "802.11 ACK timeout (us)"); 847 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 848 "ctstimeout", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 849 ath_sysctl_ctstimeout, "I", "802.11 CTS timeout (us)"); 850 851 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 852 "softled", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 853 ath_sysctl_softled, "I", "enable/disable software LED support"); 854 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 855 "ledpin", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 856 ath_sysctl_ledpin, "I", "GPIO pin connected to LED"); 857 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 858 "ledon", CTLFLAG_RW, &sc->sc_ledon, 0, 859 "setting to turn LED on"); 860 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 861 "ledidle", CTLFLAG_RW, &sc->sc_ledidle, 0, 862 "idle time for inactivity LED (ticks)"); 863 864 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 865 "hardled", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 866 ath_sysctl_hardled, "I", "enable/disable hardware LED support"); 867 /* XXX Laziness - configure pins, then flip hardled off/on */ 868 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 869 "led_net_pin", CTLFLAG_RW, &sc->sc_led_net_pin, 0, 870 "MAC Network LED pin, or -1 to disable"); 871 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 872 "led_pwr_pin", CTLFLAG_RW, &sc->sc_led_pwr_pin, 0, 873 "MAC Power LED pin, or -1 to disable"); 874 875 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 876 "txantenna", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 877 ath_sysctl_txantenna, "I", "antenna switch"); 878 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 879 "rxantenna", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 880 ath_sysctl_rxantenna, "I", "default/rx antenna"); 881 if (ath_hal_hasdiversity(ah)) 882 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 883 "diversity", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 884 ath_sysctl_diversity, "I", "antenna diversity"); 885 sc->sc_txintrperiod = ATH_TXINTR_PERIOD; 886 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 887 "txintrperiod", CTLFLAG_RW, &sc->sc_txintrperiod, 0, 888 "tx descriptor batching"); 889 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 890 "diag", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 891 ath_sysctl_diag, "I", "h/w diagnostic control"); 892 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 893 "tpscale", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 894 ath_sysctl_tpscale, "I", "tx power scaling"); 895 if (ath_hal_hastpc(ah)) { 896 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 897 "tpc", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 898 ath_sysctl_tpc, "I", "enable/disable per-packet TPC"); 899 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 900 "tpack", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 901 ath_sysctl_tpack, "I", "tx power for ack frames"); 902 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 903 "tpcts", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 904 ath_sysctl_tpcts, "I", "tx power for cts frames"); 905 } 906 if (ath_hal_hasrfsilent(ah)) { 907 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 908 "rfsilent", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 909 ath_sysctl_rfsilent, "I", "h/w RF silent config"); 910 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 911 "rfkill", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 912 ath_sysctl_rfkill, "I", "enable/disable RF kill switch"); 913 } 914 915 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 916 "txagg", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 917 ath_sysctl_txagg, "I", ""); 918 919 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 920 "forcebstuck", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 921 ath_sysctl_forcebstuck, "I", ""); 922 923 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 924 "hangcheck", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 925 ath_sysctl_hangcheck, "I", ""); 926 927 if (ath_hal_hasintmit(ah)) { 928 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 929 "intmit", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 930 ath_sysctl_intmit, "I", "interference mitigation"); 931 } 932 sc->sc_monpass = HAL_RXERR_DECRYPT | HAL_RXERR_MIC; 933 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 934 "monpass", CTLFLAG_RW, &sc->sc_monpass, 0, 935 "mask of error frames to pass when monitoring"); 936 937 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 938 "hwq_limit_nonaggr", CTLFLAG_RW, &sc->sc_hwq_limit_nonaggr, 0, 939 "Hardware non-AMPDU queue depth before software-queuing TX frames"); 940 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 941 "hwq_limit_aggr", CTLFLAG_RW, &sc->sc_hwq_limit_aggr, 0, 942 "Hardware AMPDU queue depth before software-queuing TX frames"); 943 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 944 "tid_hwq_lo", CTLFLAG_RW, &sc->sc_tid_hwq_lo, 0, 945 ""); 946 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 947 "tid_hwq_hi", CTLFLAG_RW, &sc->sc_tid_hwq_hi, 0, 948 ""); 949 950 /* Aggregate length twiddles */ 951 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 952 "aggr_limit", CTLFLAG_RW, &sc->sc_aggr_limit, 0, 953 "Maximum A-MPDU size, or 0 for 'default'"); 954 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 955 "rts_aggr_limit", CTLFLAG_RW, &sc->sc_rts_aggr_limit, 0, 956 "Maximum A-MPDU size for RTS-protected frames, or '0' " 957 "for default"); 958 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 959 "delim_min_pad", CTLFLAG_RW, &sc->sc_delim_min_pad, 0, 960 "Enforce a minimum number of delimiters per A-MPDU " 961 " sub-frame"); 962 963 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 964 "txq_data_minfree", CTLFLAG_RW, &sc->sc_txq_data_minfree, 965 0, "Minimum free buffers before adding a data frame" 966 " to the TX queue"); 967 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 968 "txq_mcastq_maxdepth", CTLFLAG_RW, 969 &sc->sc_txq_mcastq_maxdepth, 0, 970 "Maximum buffer depth for multicast/broadcast frames"); 971 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 972 "txq_node_maxdepth", CTLFLAG_RW, 973 &sc->sc_txq_node_maxdepth, 0, 974 "Maximum buffer depth for a single node"); 975 976 #if 0 977 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 978 "cabq_enable", CTLFLAG_RW, 979 &sc->sc_cabq_enable, 0, 980 "Whether to transmit on the CABQ or not"); 981 #endif 982 983 #ifdef IEEE80211_SUPPORT_TDMA 984 if (ath_hal_macversion(ah) > 0x78) { 985 sc->sc_tdmadbaprep = 2; 986 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 987 "dbaprep", CTLFLAG_RW, &sc->sc_tdmadbaprep, 0, 988 "TDMA DBA preparation time"); 989 sc->sc_tdmaswbaprep = 10; 990 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 991 "swbaprep", CTLFLAG_RW, &sc->sc_tdmaswbaprep, 0, 992 "TDMA SWBA preparation time"); 993 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 994 "guardtime", CTLFLAG_RW, &sc->sc_tdmaguard, 0, 995 "TDMA slot guard time"); 996 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 997 "superframe", CTLFLAG_RD, &sc->sc_tdmabintval, 0, 998 "TDMA calculated super frame"); 999 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1000 "setcca", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 1001 ath_sysctl_setcca, "I", "enable CCA control"); 1002 } 1003 #endif 1004 1005 #ifdef ATH_DEBUG_ALQ 1006 ath_sysctl_alq_attach(sc); 1007 #endif 1008 } 1009 1010 static int 1011 ath_sysctl_clearstats(SYSCTL_HANDLER_ARGS) 1012 { 1013 struct ath_softc *sc = arg1; 1014 int val = 0; 1015 int error; 1016 1017 error = sysctl_handle_int(oidp, &val, 0, req); 1018 if (error || !req->newptr) 1019 return error; 1020 if (val == 0) 1021 return 0; /* Not clearing the stats is still valid */ 1022 memset(&sc->sc_stats, 0, sizeof(sc->sc_stats)); 1023 memset(&sc->sc_aggr_stats, 0, sizeof(sc->sc_aggr_stats)); 1024 memset(&sc->sc_intr_stats, 0, sizeof(sc->sc_intr_stats)); 1025 1026 val = 0; 1027 return 0; 1028 } 1029 1030 static void 1031 ath_sysctl_stats_attach_rxphyerr(struct ath_softc *sc, struct sysctl_oid_list *parent) 1032 { 1033 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 1034 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 1035 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 1036 int i; 1037 char sn[8]; 1038 1039 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "rx_phy_err", CTLFLAG_RD, NULL, "Per-code RX PHY Errors"); 1040 child = SYSCTL_CHILDREN(tree); 1041 for (i = 0; i < 64; i++) { 1042 ksnprintf(sn, sizeof(sn), "%d", i); 1043 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, sn, CTLFLAG_RD, &sc->sc_stats.ast_rx_phy[i], 0, ""); 1044 } 1045 } 1046 1047 static void 1048 ath_sysctl_stats_attach_intr(struct ath_softc *sc, 1049 struct sysctl_oid_list *parent) 1050 { 1051 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 1052 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 1053 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 1054 int i; 1055 char sn[8]; 1056 1057 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "sync_intr", 1058 CTLFLAG_RD, NULL, "Sync interrupt statistics"); 1059 child = SYSCTL_CHILDREN(tree); 1060 for (i = 0; i < 32; i++) { 1061 ksnprintf(sn, sizeof(sn), "%d", i); 1062 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, sn, CTLFLAG_RD, 1063 &sc->sc_intr_stats.sync_intr[i], 0, ""); 1064 } 1065 } 1066 1067 void 1068 ath_sysctl_stats_attach(struct ath_softc *sc) 1069 { 1070 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 1071 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 1072 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 1073 1074 /* Create "clear" node */ 1075 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1076 "clear_stats", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 1077 ath_sysctl_clearstats, "I", "clear stats"); 1078 1079 /* Create stats node */ 1080 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD, 1081 NULL, "Statistics"); 1082 child = SYSCTL_CHILDREN(tree); 1083 1084 /* This was generated from if_athioctl.h */ 1085 1086 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_watchdog", CTLFLAG_RD, 1087 &sc->sc_stats.ast_watchdog, 0, "device reset by watchdog"); 1088 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_hardware", CTLFLAG_RD, 1089 &sc->sc_stats.ast_hardware, 0, "fatal hardware error interrupts"); 1090 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bmiss", CTLFLAG_RD, 1091 &sc->sc_stats.ast_bmiss, 0, "beacon miss interrupts"); 1092 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bmiss_phantom", CTLFLAG_RD, 1093 &sc->sc_stats.ast_bmiss_phantom, 0, "beacon miss interrupts"); 1094 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bstuck", CTLFLAG_RD, 1095 &sc->sc_stats.ast_bstuck, 0, "beacon stuck interrupts"); 1096 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rxorn", CTLFLAG_RD, 1097 &sc->sc_stats.ast_rxorn, 0, "rx overrun interrupts"); 1098 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rxeol", CTLFLAG_RD, 1099 &sc->sc_stats.ast_rxeol, 0, "rx eol interrupts"); 1100 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_txurn", CTLFLAG_RD, 1101 &sc->sc_stats.ast_txurn, 0, "tx underrun interrupts"); 1102 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_mib", CTLFLAG_RD, 1103 &sc->sc_stats.ast_mib, 0, "mib interrupts"); 1104 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_intrcoal", CTLFLAG_RD, 1105 &sc->sc_stats.ast_intrcoal, 0, "interrupts coalesced"); 1106 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_packets", CTLFLAG_RD, 1107 &sc->sc_stats.ast_tx_packets, 0, "packet sent on the interface"); 1108 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_mgmt", CTLFLAG_RD, 1109 &sc->sc_stats.ast_tx_mgmt, 0, "management frames transmitted"); 1110 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_discard", CTLFLAG_RD, 1111 &sc->sc_stats.ast_tx_discard, 0, "frames discarded prior to assoc"); 1112 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_qstop", CTLFLAG_RD, 1113 &sc->sc_stats.ast_tx_qstop, 0, "output stopped 'cuz no buffer"); 1114 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_encap", CTLFLAG_RD, 1115 &sc->sc_stats.ast_tx_encap, 0, "tx encapsulation failed"); 1116 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nonode", CTLFLAG_RD, 1117 &sc->sc_stats.ast_tx_nonode, 0, "tx failed 'cuz no node"); 1118 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nombuf", CTLFLAG_RD, 1119 &sc->sc_stats.ast_tx_nombuf, 0, "tx failed 'cuz no mbuf"); 1120 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nomcl", CTLFLAG_RD, 1121 &sc->sc_stats.ast_tx_nomcl, 0, "tx failed 'cuz no cluster"); 1122 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_linear", CTLFLAG_RD, 1123 &sc->sc_stats.ast_tx_linear, 0, "tx linearized to cluster"); 1124 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nodata", CTLFLAG_RD, 1125 &sc->sc_stats.ast_tx_nodata, 0, "tx discarded empty frame"); 1126 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_busdma", CTLFLAG_RD, 1127 &sc->sc_stats.ast_tx_busdma, 0, "tx failed for dma resrcs"); 1128 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_xretries", CTLFLAG_RD, 1129 &sc->sc_stats.ast_tx_xretries, 0, "tx failed 'cuz too many retries"); 1130 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_fifoerr", CTLFLAG_RD, 1131 &sc->sc_stats.ast_tx_fifoerr, 0, "tx failed 'cuz FIFO underrun"); 1132 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_filtered", CTLFLAG_RD, 1133 &sc->sc_stats.ast_tx_filtered, 0, "tx failed 'cuz xmit filtered"); 1134 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_shortretry", CTLFLAG_RD, 1135 &sc->sc_stats.ast_tx_shortretry, 0, "tx on-chip retries (short)"); 1136 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_longretry", CTLFLAG_RD, 1137 &sc->sc_stats.ast_tx_longretry, 0, "tx on-chip retries (long)"); 1138 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_badrate", CTLFLAG_RD, 1139 &sc->sc_stats.ast_tx_badrate, 0, "tx failed 'cuz bogus xmit rate"); 1140 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_noack", CTLFLAG_RD, 1141 &sc->sc_stats.ast_tx_noack, 0, "tx frames with no ack marked"); 1142 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_rts", CTLFLAG_RD, 1143 &sc->sc_stats.ast_tx_rts, 0, "tx frames with rts enabled"); 1144 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_cts", CTLFLAG_RD, 1145 &sc->sc_stats.ast_tx_cts, 0, "tx frames with cts enabled"); 1146 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_shortpre", CTLFLAG_RD, 1147 &sc->sc_stats.ast_tx_shortpre, 0, "tx frames with short preamble"); 1148 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_altrate", CTLFLAG_RD, 1149 &sc->sc_stats.ast_tx_altrate, 0, "tx frames with alternate rate"); 1150 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_protect", CTLFLAG_RD, 1151 &sc->sc_stats.ast_tx_protect, 0, "tx frames with protection"); 1152 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ctsburst", CTLFLAG_RD, 1153 &sc->sc_stats.ast_tx_ctsburst, 0, "tx frames with cts and bursting"); 1154 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ctsext", CTLFLAG_RD, 1155 &sc->sc_stats.ast_tx_ctsext, 0, "tx frames with cts extension"); 1156 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_nombuf", CTLFLAG_RD, 1157 &sc->sc_stats.ast_rx_nombuf, 0, "rx setup failed 'cuz no mbuf"); 1158 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_busdma", CTLFLAG_RD, 1159 &sc->sc_stats.ast_rx_busdma, 0, "rx setup failed for dma resrcs"); 1160 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_orn", CTLFLAG_RD, 1161 &sc->sc_stats.ast_rx_orn, 0, "rx failed 'cuz of desc overrun"); 1162 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_crcerr", CTLFLAG_RD, 1163 &sc->sc_stats.ast_rx_crcerr, 0, "rx failed 'cuz of bad CRC"); 1164 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_fifoerr", CTLFLAG_RD, 1165 &sc->sc_stats.ast_rx_fifoerr, 0, "rx failed 'cuz of FIFO overrun"); 1166 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_badcrypt", CTLFLAG_RD, 1167 &sc->sc_stats.ast_rx_badcrypt, 0, "rx failed 'cuz decryption"); 1168 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_badmic", CTLFLAG_RD, 1169 &sc->sc_stats.ast_rx_badmic, 0, "rx failed 'cuz MIC failure"); 1170 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_phyerr", CTLFLAG_RD, 1171 &sc->sc_stats.ast_rx_phyerr, 0, "rx failed 'cuz of PHY err"); 1172 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_tooshort", CTLFLAG_RD, 1173 &sc->sc_stats.ast_rx_tooshort, 0, "rx discarded 'cuz frame too short"); 1174 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_toobig", CTLFLAG_RD, 1175 &sc->sc_stats.ast_rx_toobig, 0, "rx discarded 'cuz frame too large"); 1176 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_packets", CTLFLAG_RD, 1177 &sc->sc_stats.ast_rx_packets, 0, "packet recv on the interface"); 1178 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_mgt", CTLFLAG_RD, 1179 &sc->sc_stats.ast_rx_mgt, 0, "management frames received"); 1180 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_ctl", CTLFLAG_RD, 1181 &sc->sc_stats.ast_rx_ctl, 0, "rx discarded 'cuz ctl frame"); 1182 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_xmit", CTLFLAG_RD, 1183 &sc->sc_stats.ast_be_xmit, 0, "beacons transmitted"); 1184 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_nombuf", CTLFLAG_RD, 1185 &sc->sc_stats.ast_be_nombuf, 0, "beacon setup failed 'cuz no mbuf"); 1186 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_cal", CTLFLAG_RD, 1187 &sc->sc_stats.ast_per_cal, 0, "periodic calibration calls"); 1188 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_calfail", CTLFLAG_RD, 1189 &sc->sc_stats.ast_per_calfail, 0, "periodic calibration failed"); 1190 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_rfgain", CTLFLAG_RD, 1191 &sc->sc_stats.ast_per_rfgain, 0, "periodic calibration rfgain reset"); 1192 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_calls", CTLFLAG_RD, 1193 &sc->sc_stats.ast_rate_calls, 0, "rate control checks"); 1194 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_raise", CTLFLAG_RD, 1195 &sc->sc_stats.ast_rate_raise, 0, "rate control raised xmit rate"); 1196 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_drop", CTLFLAG_RD, 1197 &sc->sc_stats.ast_rate_drop, 0, "rate control dropped xmit rate"); 1198 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ant_defswitch", CTLFLAG_RD, 1199 &sc->sc_stats.ast_ant_defswitch, 0, "rx/default antenna switches"); 1200 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ant_txswitch", CTLFLAG_RD, 1201 &sc->sc_stats.ast_ant_txswitch, 0, "tx antenna switches"); 1202 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_cabq_xmit", CTLFLAG_RD, 1203 &sc->sc_stats.ast_cabq_xmit, 0, "cabq frames transmitted"); 1204 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_cabq_busy", CTLFLAG_RD, 1205 &sc->sc_stats.ast_cabq_busy, 0, "cabq found busy"); 1206 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_raw", CTLFLAG_RD, 1207 &sc->sc_stats.ast_tx_raw, 0, "tx frames through raw api"); 1208 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_txok", CTLFLAG_RD, 1209 &sc->sc_stats.ast_ff_txok, 0, "fast frames tx'd successfully"); 1210 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_txerr", CTLFLAG_RD, 1211 &sc->sc_stats.ast_ff_txerr, 0, "fast frames tx'd w/ error"); 1212 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_rx", CTLFLAG_RD, 1213 &sc->sc_stats.ast_ff_rx, 0, "fast frames rx'd"); 1214 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_flush", CTLFLAG_RD, 1215 &sc->sc_stats.ast_ff_flush, 0, "fast frames flushed from staging q"); 1216 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_qfull", CTLFLAG_RD, 1217 &sc->sc_stats.ast_tx_qfull, 0, "tx dropped 'cuz of queue limit"); 1218 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nobuf", CTLFLAG_RD, 1219 &sc->sc_stats.ast_tx_nobuf, 0, "tx dropped 'cuz no ath buffer"); 1220 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_update", CTLFLAG_RD, 1221 &sc->sc_stats.ast_tdma_update, 0, "TDMA slot timing updates"); 1222 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_timers", CTLFLAG_RD, 1223 &sc->sc_stats.ast_tdma_timers, 0, "TDMA slot update set beacon timers"); 1224 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_tsf", CTLFLAG_RD, 1225 &sc->sc_stats.ast_tdma_tsf, 0, "TDMA slot update set TSF"); 1226 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_ack", CTLFLAG_RD, 1227 &sc->sc_stats.ast_tdma_ack, 0, "TDMA tx failed 'cuz ACK required"); 1228 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_raw_fail", CTLFLAG_RD, 1229 &sc->sc_stats.ast_tx_raw_fail, 0, "raw tx failed 'cuz h/w down"); 1230 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nofrag", CTLFLAG_RD, 1231 &sc->sc_stats.ast_tx_nofrag, 0, "tx dropped 'cuz no ath frag buffer"); 1232 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_missed", CTLFLAG_RD, 1233 &sc->sc_stats.ast_be_missed, 0, "number of -missed- beacons"); 1234 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ani_cal", CTLFLAG_RD, 1235 &sc->sc_stats.ast_ani_cal, 0, "number of ANI polls"); 1236 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_agg", CTLFLAG_RD, 1237 &sc->sc_stats.ast_rx_agg, 0, "number of aggregate frames received"); 1238 1239 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_halfgi", CTLFLAG_RD, 1240 &sc->sc_stats.ast_rx_halfgi, 0, "number of frames received with half-GI"); 1241 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_2040", CTLFLAG_RD, 1242 &sc->sc_stats.ast_rx_2040, 0, "number of HT/40 frames received"); 1243 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_pre_crc_err", CTLFLAG_RD, 1244 &sc->sc_stats.ast_rx_pre_crc_err, 0, "number of delimeter-CRC errors detected"); 1245 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_post_crc_err", CTLFLAG_RD, 1246 &sc->sc_stats.ast_rx_post_crc_err, 0, "number of post-delimiter CRC errors detected"); 1247 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_decrypt_busy_err", CTLFLAG_RD, 1248 &sc->sc_stats.ast_rx_decrypt_busy_err, 0, "number of frames received w/ busy decrypt engine"); 1249 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_hi_rx_chain", CTLFLAG_RD, 1250 &sc->sc_stats.ast_rx_hi_rx_chain, 0, ""); 1251 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_htprotect", CTLFLAG_RD, 1252 &sc->sc_stats.ast_tx_htprotect, 0, "HT tx frames with protection"); 1253 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_hitqueueend", CTLFLAG_RD, 1254 &sc->sc_stats.ast_rx_hitqueueend, 0, "RX hit queue end"); 1255 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_timeout", CTLFLAG_RD, 1256 &sc->sc_stats.ast_tx_timeout, 0, "TX Global Timeout"); 1257 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_cst", CTLFLAG_RD, 1258 &sc->sc_stats.ast_tx_cst, 0, "TX Carrier Sense Timeout"); 1259 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_xtxop", CTLFLAG_RD, 1260 &sc->sc_stats.ast_tx_xtxop, 0, "TX exceeded TXOP"); 1261 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_timerexpired", CTLFLAG_RD, 1262 &sc->sc_stats.ast_tx_timerexpired, 0, "TX exceeded TX_TIMER register"); 1263 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_desccfgerr", CTLFLAG_RD, 1264 &sc->sc_stats.ast_tx_desccfgerr, 0, "TX Descriptor Cfg Error"); 1265 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swretries", CTLFLAG_RD, 1266 &sc->sc_stats.ast_tx_swretries, 0, "TX software retry count"); 1267 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swretrymax", CTLFLAG_RD, 1268 &sc->sc_stats.ast_tx_swretrymax, 0, "TX software retry max reached"); 1269 1270 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_data_underrun", CTLFLAG_RD, 1271 &sc->sc_stats.ast_tx_data_underrun, 0, ""); 1272 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_delim_underrun", CTLFLAG_RD, 1273 &sc->sc_stats.ast_tx_delim_underrun, 0, ""); 1274 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_failall", CTLFLAG_RD, 1275 &sc->sc_stats.ast_tx_aggr_failall, 0, 1276 "Number of aggregate TX failures (whole frame)"); 1277 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_ok", CTLFLAG_RD, 1278 &sc->sc_stats.ast_tx_aggr_ok, 0, 1279 "Number of aggregate TX OK completions (subframe)"); 1280 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_fail", CTLFLAG_RD, 1281 &sc->sc_stats.ast_tx_aggr_fail, 0, 1282 "Number of aggregate TX failures (subframe)"); 1283 1284 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_intr", CTLFLAG_RD, 1285 &sc->sc_stats.ast_rx_intr, 0, "RX interrupts"); 1286 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_intr", CTLFLAG_RD, 1287 &sc->sc_stats.ast_tx_intr, 0, "TX interrupts"); 1288 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_mcastq_overflow", 1289 CTLFLAG_RD, &sc->sc_stats.ast_tx_mcastq_overflow, 0, 1290 "Number of multicast frames exceeding maximum mcast queue depth"); 1291 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_keymiss", CTLFLAG_RD, 1292 &sc->sc_stats.ast_rx_keymiss, 0, ""); 1293 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swfiltered", CTLFLAG_RD, 1294 &sc->sc_stats.ast_tx_swfiltered, 0, ""); 1295 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_stbc", 1296 CTLFLAG_RD, &sc->sc_stats.ast_rx_stbc, 0, 1297 "Number of STBC frames received"); 1298 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_stbc", 1299 CTLFLAG_RD, &sc->sc_stats.ast_tx_stbc, 0, 1300 "Number of STBC frames transmitted"); 1301 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ldpc", 1302 CTLFLAG_RD, &sc->sc_stats.ast_tx_ldpc, 0, 1303 "Number of LDPC frames transmitted"); 1304 1305 /* Attach the RX phy error array */ 1306 ath_sysctl_stats_attach_rxphyerr(sc, child); 1307 1308 /* Attach the interrupt statistics array */ 1309 ath_sysctl_stats_attach_intr(sc, child); 1310 } 1311 1312 /* 1313 * This doesn't necessarily belong here (because it's HAL related, not 1314 * driver related). 1315 */ 1316 void 1317 ath_sysctl_hal_attach(struct ath_softc *sc) 1318 { 1319 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 1320 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 1321 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 1322 1323 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "hal", CTLFLAG_RD, 1324 NULL, "Atheros HAL parameters"); 1325 child = SYSCTL_CHILDREN(tree); 1326 1327 sc->sc_ah->ah_config.ah_debug = 0; 1328 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "debug", CTLFLAG_RW, 1329 &sc->sc_ah->ah_config.ah_debug, 0, "Atheros HAL debugging printfs"); 1330 1331 sc->sc_ah->ah_config.ah_ar5416_biasadj = 0; 1332 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "ar5416_biasadj", CTLFLAG_RW, 1333 &sc->sc_ah->ah_config.ah_ar5416_biasadj, 0, 1334 "Enable 2GHz AR5416 direction sensitivity bias adjust"); 1335 1336 sc->sc_ah->ah_config.ah_dma_beacon_response_time = 2; 1337 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "dma_brt", CTLFLAG_RW, 1338 &sc->sc_ah->ah_config.ah_dma_beacon_response_time, 0, 1339 "Atheros HAL DMA beacon response time"); 1340 1341 sc->sc_ah->ah_config.ah_sw_beacon_response_time = 10; 1342 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "sw_brt", CTLFLAG_RW, 1343 &sc->sc_ah->ah_config.ah_sw_beacon_response_time, 0, 1344 "Atheros HAL software beacon response time"); 1345 1346 sc->sc_ah->ah_config.ah_additional_swba_backoff = 0; 1347 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "swba_backoff", CTLFLAG_RW, 1348 &sc->sc_ah->ah_config.ah_additional_swba_backoff, 0, 1349 "Atheros HAL additional SWBA backoff time"); 1350 1351 sc->sc_ah->ah_config.ah_force_full_reset = 0; 1352 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "force_full_reset", CTLFLAG_RW, 1353 &sc->sc_ah->ah_config.ah_force_full_reset, 0, 1354 "Force full chip reset rather than a warm reset"); 1355 1356 /* 1357 * This is initialised by the driver. 1358 */ 1359 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "serialise_reg_war", CTLFLAG_RW, 1360 &sc->sc_ah->ah_config.ah_serialise_reg_war, 0, 1361 "Force register access serialisation"); 1362 } 1363