1 /*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTABILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 /* 34 * Driver for the Atheros Wireless LAN controller. 35 * 36 * This software is derived from work of Atsushi Onoe; his contribution 37 * is greatly appreciated. 38 */ 39 40 #include "opt_inet.h" 41 #include "opt_ath.h" 42 #include "opt_wlan.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/sysctl.h> 47 #include <sys/mbuf.h> 48 #include <sys/malloc.h> 49 #include <sys/lock.h> 50 #include <sys/kernel.h> 51 #include <sys/socket.h> 52 #include <sys/sockio.h> 53 #include <sys/errno.h> 54 #include <sys/callout.h> 55 #include <sys/bus.h> 56 #include <sys/endian.h> 57 #include <sys/kthread.h> 58 #include <sys/taskqueue.h> 59 #include <sys/caps.h> 60 61 #if defined(__DragonFly__) 62 /* empty */ 63 #else 64 #include <machine/bus.h> 65 #endif 66 67 #include <net/if.h> 68 #include <net/if_var.h> 69 #include <net/if_dl.h> 70 #include <net/if_media.h> 71 #include <net/if_types.h> 72 #include <net/if_arp.h> 73 #include <net/ethernet.h> 74 #include <net/if_llc.h> 75 76 #include <netproto/802_11/ieee80211_var.h> 77 #include <netproto/802_11/ieee80211_regdomain.h> 78 #ifdef IEEE80211_SUPPORT_SUPERG 79 #include <netproto/802_11/ieee80211_superg.h> 80 #endif 81 #ifdef IEEE80211_SUPPORT_TDMA 82 #include <netproto/802_11/ieee80211_tdma.h> 83 #endif 84 85 #include <net/bpf.h> 86 87 #ifdef INET 88 #include <netinet/in.h> 89 #include <netinet/if_ether.h> 90 #endif 91 92 #include <dev/netif/ath/ath/if_athvar.h> 93 #include <dev/netif/ath/ath_hal/ah_devid.h> /* XXX for softled */ 94 #include <dev/netif/ath/ath_hal/ah_diagcodes.h> 95 96 #include <dev/netif/ath/ath/if_ath_debug.h> 97 #include <dev/netif/ath/ath/if_ath_led.h> 98 #include <dev/netif/ath/ath/if_ath_misc.h> 99 #include <dev/netif/ath/ath/if_ath_tx.h> 100 #include <dev/netif/ath/ath/if_ath_sysctl.h> 101 102 #ifdef ATH_TX99_DIAG 103 #include <dev/ath/ath_tx99/ath_tx99.h> 104 #endif 105 106 #ifdef ATH_DEBUG_ALQ 107 #include <dev/netif/ath/if_ath_alq.h> 108 #endif 109 110 static int 111 ath_sysctl_slottime(SYSCTL_HANDLER_ARGS) 112 { 113 struct ath_softc *sc = arg1; 114 u_int slottime; 115 int error; 116 117 ATH_LOCK(sc); 118 ath_power_set_power_state(sc, HAL_PM_AWAKE); 119 slottime = ath_hal_getslottime(sc->sc_ah); 120 ATH_UNLOCK(sc); 121 122 error = sysctl_handle_int(oidp, &slottime, 0, req); 123 if (error || !req->newptr) 124 goto finish; 125 126 error = !ath_hal_setslottime(sc->sc_ah, slottime) ? EINVAL : 0; 127 128 finish: 129 ATH_LOCK(sc); 130 ath_power_restore_power_state(sc); 131 ATH_UNLOCK(sc); 132 133 return error; 134 } 135 136 static int 137 ath_sysctl_acktimeout(SYSCTL_HANDLER_ARGS) 138 { 139 struct ath_softc *sc = arg1; 140 u_int acktimeout; 141 int error; 142 143 ATH_LOCK(sc); 144 ath_power_set_power_state(sc, HAL_PM_AWAKE); 145 acktimeout = ath_hal_getacktimeout(sc->sc_ah); 146 ATH_UNLOCK(sc); 147 148 error = sysctl_handle_int(oidp, &acktimeout, 0, req); 149 if (error || !req->newptr) 150 goto finish; 151 152 error = !ath_hal_setacktimeout(sc->sc_ah, acktimeout) ? EINVAL : 0; 153 154 finish: 155 ATH_LOCK(sc); 156 ath_power_restore_power_state(sc); 157 ATH_UNLOCK(sc); 158 159 return (error); 160 } 161 162 static int 163 ath_sysctl_ctstimeout(SYSCTL_HANDLER_ARGS) 164 { 165 struct ath_softc *sc = arg1; 166 u_int ctstimeout; 167 int error; 168 169 ATH_LOCK(sc); 170 ath_power_set_power_state(sc, HAL_PM_AWAKE); 171 ctstimeout = ath_hal_getctstimeout(sc->sc_ah); 172 ATH_UNLOCK(sc); 173 174 error = sysctl_handle_int(oidp, &ctstimeout, 0, req); 175 if (error || !req->newptr) 176 goto finish; 177 178 error = !ath_hal_setctstimeout(sc->sc_ah, ctstimeout) ? EINVAL : 0; 179 180 finish: 181 ATH_LOCK(sc); 182 ath_power_restore_power_state(sc); 183 ATH_UNLOCK(sc); 184 185 return (error); 186 } 187 188 static int 189 ath_sysctl_softled(SYSCTL_HANDLER_ARGS) 190 { 191 struct ath_softc *sc = arg1; 192 int softled = sc->sc_softled; 193 int error; 194 195 error = sysctl_handle_int(oidp, &softled, 0, req); 196 if (error || !req->newptr) 197 return error; 198 softled = (softled != 0); 199 if (softled != sc->sc_softled) { 200 if (softled) { 201 /* NB: handle any sc_ledpin change */ 202 ath_led_config(sc); 203 } 204 sc->sc_softled = softled; 205 } 206 return 0; 207 } 208 209 static int 210 ath_sysctl_ledpin(SYSCTL_HANDLER_ARGS) 211 { 212 struct ath_softc *sc = arg1; 213 int ledpin = sc->sc_ledpin; 214 int error; 215 216 error = sysctl_handle_int(oidp, &ledpin, 0, req); 217 if (error || !req->newptr) 218 return error; 219 if (ledpin != sc->sc_ledpin) { 220 sc->sc_ledpin = ledpin; 221 if (sc->sc_softled) { 222 ath_led_config(sc); 223 } 224 } 225 return 0; 226 } 227 228 static int 229 ath_sysctl_hardled(SYSCTL_HANDLER_ARGS) 230 { 231 struct ath_softc *sc = arg1; 232 int hardled = sc->sc_hardled; 233 int error; 234 235 error = sysctl_handle_int(oidp, &hardled, 0, req); 236 if (error || !req->newptr) 237 return error; 238 hardled = (hardled != 0); 239 if (hardled != sc->sc_hardled) { 240 if (hardled) { 241 /* NB: handle any sc_ledpin change */ 242 ath_led_config(sc); 243 } 244 sc->sc_hardled = hardled; 245 } 246 return 0; 247 } 248 249 static int 250 ath_sysctl_txantenna(SYSCTL_HANDLER_ARGS) 251 { 252 struct ath_softc *sc = arg1; 253 u_int txantenna; 254 int error; 255 256 ATH_LOCK(sc); 257 ath_power_set_power_state(sc, HAL_PM_AWAKE); 258 ATH_UNLOCK(sc); 259 260 txantenna = ath_hal_getantennaswitch(sc->sc_ah); 261 262 error = sysctl_handle_int(oidp, &txantenna, 0, req); 263 if (!error && req->newptr) { 264 /* XXX assumes 2 antenna ports */ 265 if (txantenna < HAL_ANT_VARIABLE || txantenna > HAL_ANT_FIXED_B) { 266 error = EINVAL; 267 goto finish; 268 } 269 ath_hal_setantennaswitch(sc->sc_ah, txantenna); 270 /* 271 * NB: with the switch locked this isn't meaningful, 272 * but set it anyway so things like radiotap get 273 * consistent info in their data. 274 */ 275 sc->sc_txantenna = txantenna; 276 } 277 278 finish: 279 ATH_LOCK(sc); 280 ath_power_restore_power_state(sc); 281 ATH_UNLOCK(sc); 282 283 return (error); 284 } 285 286 static int 287 ath_sysctl_rxantenna(SYSCTL_HANDLER_ARGS) 288 { 289 struct ath_softc *sc = arg1; 290 u_int defantenna; 291 int error; 292 293 ATH_LOCK(sc); 294 ath_power_set_power_state(sc, HAL_PM_AWAKE); 295 defantenna = ath_hal_getdefantenna(sc->sc_ah); 296 ATH_UNLOCK(sc); 297 298 error = sysctl_handle_int(oidp, &defantenna, 0, req); 299 if (!error && req->newptr) 300 ath_hal_setdefantenna(sc->sc_ah, defantenna); 301 302 ATH_LOCK(sc); 303 ath_power_restore_power_state(sc); 304 ATH_UNLOCK(sc); 305 306 return (error); 307 } 308 309 static int 310 ath_sysctl_diversity(SYSCTL_HANDLER_ARGS) 311 { 312 struct ath_softc *sc = arg1; 313 u_int diversity; 314 int error; 315 316 ATH_LOCK(sc); 317 ath_power_set_power_state(sc, HAL_PM_AWAKE); 318 ATH_UNLOCK(sc); 319 320 diversity = ath_hal_getdiversity(sc->sc_ah); 321 322 error = sysctl_handle_int(oidp, &diversity, 0, req); 323 if (error || !req->newptr) 324 goto finish; 325 if (!ath_hal_setdiversity(sc->sc_ah, diversity)) { 326 error = EINVAL; 327 goto finish; 328 } 329 sc->sc_diversity = diversity; 330 error = 0; 331 332 finish: 333 ATH_LOCK(sc); 334 ath_power_restore_power_state(sc); 335 ATH_UNLOCK(sc); 336 337 return (error); 338 } 339 340 static int 341 ath_sysctl_diag(SYSCTL_HANDLER_ARGS) 342 { 343 struct ath_softc *sc = arg1; 344 u_int32_t diag; 345 int error; 346 347 ATH_LOCK(sc); 348 ath_power_set_power_state(sc, HAL_PM_AWAKE); 349 ATH_UNLOCK(sc); 350 351 if (!ath_hal_getdiag(sc->sc_ah, &diag)) { 352 error = EINVAL; 353 goto finish; 354 } 355 356 error = sysctl_handle_int(oidp, &diag, 0, req); 357 if (error || !req->newptr) 358 goto finish; 359 error = !ath_hal_setdiag(sc->sc_ah, diag) ? EINVAL : 0; 360 361 finish: 362 ATH_LOCK(sc); 363 ath_power_restore_power_state(sc); 364 ATH_UNLOCK(sc); 365 366 return (error); 367 } 368 369 static int 370 ath_sysctl_tpscale(SYSCTL_HANDLER_ARGS) 371 { 372 struct ath_softc *sc = arg1; 373 u_int32_t scale; 374 int error; 375 376 ATH_LOCK(sc); 377 ath_power_set_power_state(sc, HAL_PM_AWAKE); 378 ATH_UNLOCK(sc); 379 380 (void) ath_hal_gettpscale(sc->sc_ah, &scale); 381 error = sysctl_handle_int(oidp, &scale, 0, req); 382 if (error || !req->newptr) 383 goto finish; 384 385 error = !ath_hal_settpscale(sc->sc_ah, scale) ? EINVAL : 386 (sc->sc_running) ? ath_reset(sc, ATH_RESET_NOLOSS) : 0; 387 388 finish: 389 ATH_LOCK(sc); 390 ath_power_restore_power_state(sc); 391 ATH_UNLOCK(sc); 392 393 return (error); 394 } 395 396 static int 397 ath_sysctl_tpc(SYSCTL_HANDLER_ARGS) 398 { 399 struct ath_softc *sc = arg1; 400 u_int tpc; 401 int error; 402 403 ATH_LOCK(sc); 404 ath_power_set_power_state(sc, HAL_PM_AWAKE); 405 ATH_UNLOCK(sc); 406 407 tpc = ath_hal_gettpc(sc->sc_ah); 408 409 error = sysctl_handle_int(oidp, &tpc, 0, req); 410 if (error || !req->newptr) 411 goto finish; 412 error = !ath_hal_settpc(sc->sc_ah, tpc) ? EINVAL : 0; 413 414 finish: 415 ATH_LOCK(sc); 416 ath_power_restore_power_state(sc); 417 ATH_UNLOCK(sc); 418 419 return (error); 420 } 421 422 static int 423 ath_sysctl_rfkill(SYSCTL_HANDLER_ARGS) 424 { 425 struct ath_softc *sc = arg1; 426 struct ath_hal *ah = sc->sc_ah; 427 u_int rfkill; 428 int error; 429 430 ATH_LOCK(sc); 431 ath_power_set_power_state(sc, HAL_PM_AWAKE); 432 ATH_UNLOCK(sc); 433 434 rfkill = ath_hal_getrfkill(ah); 435 436 error = sysctl_handle_int(oidp, &rfkill, 0, req); 437 if (error || !req->newptr) 438 goto finish; 439 if (rfkill == ath_hal_getrfkill(ah)) { /* unchanged */ 440 error = 0; 441 goto finish; 442 } 443 if (!ath_hal_setrfkill(ah, rfkill)) { 444 error = EINVAL; 445 goto finish; 446 } 447 error = sc->sc_running ? ath_reset(sc, ATH_RESET_FULL) : 0; 448 449 finish: 450 ATH_LOCK(sc); 451 ath_power_restore_power_state(sc); 452 ATH_UNLOCK(sc); 453 454 return (error); 455 } 456 457 static int 458 ath_sysctl_txagg(SYSCTL_HANDLER_ARGS) 459 { 460 struct ath_softc *sc = arg1; 461 int i, t, param = 0; 462 int error; 463 struct ath_buf *bf; 464 465 error = sysctl_handle_int(oidp, ¶m, 0, req); 466 if (error || !req->newptr) 467 return error; 468 469 if (param != 1) 470 return 0; 471 472 kprintf("no tx bufs (empty list): %d\n", sc->sc_stats.ast_tx_getnobuf); 473 kprintf("no tx bufs (was busy): %d\n", sc->sc_stats.ast_tx_getbusybuf); 474 475 kprintf("aggr single packet: %d\n", 476 sc->sc_aggr_stats.aggr_single_pkt); 477 kprintf("aggr single packet w/ BAW closed: %d\n", 478 sc->sc_aggr_stats.aggr_baw_closed_single_pkt); 479 kprintf("aggr non-baw packet: %d\n", 480 sc->sc_aggr_stats.aggr_nonbaw_pkt); 481 kprintf("aggr aggregate packet: %d\n", 482 sc->sc_aggr_stats.aggr_aggr_pkt); 483 kprintf("aggr single packet low hwq: %d\n", 484 sc->sc_aggr_stats.aggr_low_hwq_single_pkt); 485 kprintf("aggr single packet RTS aggr limited: %d\n", 486 sc->sc_aggr_stats.aggr_rts_aggr_limited); 487 kprintf("aggr sched, no work: %d\n", 488 sc->sc_aggr_stats.aggr_sched_nopkt); 489 for (i = 0; i < 64; i++) { 490 kprintf("%2d: %10d ", i, sc->sc_aggr_stats.aggr_pkts[i]); 491 if (i % 4 == 3) 492 kprintf("\n"); 493 } 494 kprintf("\n"); 495 496 for (i = 0; i < HAL_NUM_TX_QUEUES; i++) { 497 if (ATH_TXQ_SETUP(sc, i)) { 498 kprintf("HW TXQ %d: axq_depth=%d, axq_aggr_depth=%d, " 499 "axq_fifo_depth=%d, holdingbf=%p\n", 500 i, 501 sc->sc_txq[i].axq_depth, 502 sc->sc_txq[i].axq_aggr_depth, 503 sc->sc_txq[i].axq_fifo_depth, 504 sc->sc_txq[i].axq_holdingbf); 505 } 506 } 507 508 i = t = 0; 509 ATH_TXBUF_LOCK(sc); 510 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) { 511 if (bf->bf_flags & ATH_BUF_BUSY) { 512 kprintf("Busy: %d\n", t); 513 i++; 514 } 515 t++; 516 } 517 ATH_TXBUF_UNLOCK(sc); 518 kprintf("Total TX buffers: %d; Total TX buffers busy: %d (%d)\n", 519 t, i, sc->sc_txbuf_cnt); 520 521 i = t = 0; 522 ATH_TXBUF_LOCK(sc); 523 TAILQ_FOREACH(bf, &sc->sc_txbuf_mgmt, bf_list) { 524 if (bf->bf_flags & ATH_BUF_BUSY) { 525 kprintf("Busy: %d\n", t); 526 i++; 527 } 528 t++; 529 } 530 ATH_TXBUF_UNLOCK(sc); 531 kprintf("Total mgmt TX buffers: %d; Total mgmt TX buffers busy: %d\n", 532 t, i); 533 534 ATH_RX_LOCK(sc); 535 for (i = 0; i < 2; i++) { 536 kprintf("%d: fifolen: %d/%d; head=%d; tail=%d; m_pending=%p, m_holdbf=%p\n", 537 i, 538 sc->sc_rxedma[i].m_fifo_depth, 539 sc->sc_rxedma[i].m_fifolen, 540 sc->sc_rxedma[i].m_fifo_head, 541 sc->sc_rxedma[i].m_fifo_tail, 542 sc->sc_rxedma[i].m_rxpending, 543 sc->sc_rxedma[i].m_holdbf); 544 } 545 i = 0; 546 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 547 i++; 548 } 549 kprintf("Total RX buffers in free list: %d buffers\n", 550 i); 551 ATH_RX_UNLOCK(sc); 552 553 return 0; 554 } 555 556 static int 557 ath_sysctl_rfsilent(SYSCTL_HANDLER_ARGS) 558 { 559 struct ath_softc *sc = arg1; 560 u_int rfsilent; 561 int error; 562 563 ATH_LOCK(sc); 564 ath_power_set_power_state(sc, HAL_PM_AWAKE); 565 ATH_UNLOCK(sc); 566 567 (void) ath_hal_getrfsilent(sc->sc_ah, &rfsilent); 568 error = sysctl_handle_int(oidp, &rfsilent, 0, req); 569 if (error || !req->newptr) 570 goto finish; 571 if (!ath_hal_setrfsilent(sc->sc_ah, rfsilent)) { 572 error = EINVAL; 573 goto finish; 574 } 575 /* 576 * Earlier chips (< AR5212) have up to 8 GPIO 577 * pins exposed. 578 * 579 * AR5416 and later chips have many more GPIO 580 * pins (up to 16) so the mask is expanded to 581 * four bits. 582 */ 583 sc->sc_rfsilentpin = rfsilent & 0x3c; 584 sc->sc_rfsilentpol = (rfsilent & 0x2) != 0; 585 error = 0; 586 587 finish: 588 ATH_LOCK(sc); 589 ath_power_restore_power_state(sc); 590 ATH_UNLOCK(sc); 591 592 return (error); 593 } 594 595 static int 596 ath_sysctl_tpack(SYSCTL_HANDLER_ARGS) 597 { 598 struct ath_softc *sc = arg1; 599 u_int32_t tpack; 600 int error; 601 602 ATH_LOCK(sc); 603 ath_power_set_power_state(sc, HAL_PM_AWAKE); 604 ATH_UNLOCK(sc); 605 606 (void) ath_hal_gettpack(sc->sc_ah, &tpack); 607 error = sysctl_handle_int(oidp, &tpack, 0, req); 608 if (error || !req->newptr) 609 goto finish; 610 error = !ath_hal_settpack(sc->sc_ah, tpack) ? EINVAL : 0; 611 612 finish: 613 ATH_LOCK(sc); 614 ath_power_restore_power_state(sc); 615 ATH_UNLOCK(sc); 616 617 return (error); 618 } 619 620 static int 621 ath_sysctl_tpcts(SYSCTL_HANDLER_ARGS) 622 { 623 struct ath_softc *sc = arg1; 624 u_int32_t tpcts; 625 int error; 626 627 ATH_LOCK(sc); 628 ath_power_set_power_state(sc, HAL_PM_AWAKE); 629 ATH_UNLOCK(sc); 630 631 (void) ath_hal_gettpcts(sc->sc_ah, &tpcts); 632 error = sysctl_handle_int(oidp, &tpcts, 0, req); 633 if (error || !req->newptr) 634 goto finish; 635 636 error = !ath_hal_settpcts(sc->sc_ah, tpcts) ? EINVAL : 0; 637 638 finish: 639 ATH_LOCK(sc); 640 ath_power_restore_power_state(sc); 641 ATH_UNLOCK(sc); 642 643 return (error); 644 } 645 646 static int 647 ath_sysctl_intmit(SYSCTL_HANDLER_ARGS) 648 { 649 struct ath_softc *sc = arg1; 650 int intmit, error; 651 652 ATH_LOCK(sc); 653 ath_power_set_power_state(sc, HAL_PM_AWAKE); 654 ATH_UNLOCK(sc); 655 656 intmit = ath_hal_getintmit(sc->sc_ah); 657 error = sysctl_handle_int(oidp, &intmit, 0, req); 658 if (error || !req->newptr) 659 goto finish; 660 661 /* reusing error; 1 here means "good"; 0 means "fail" */ 662 error = ath_hal_setintmit(sc->sc_ah, intmit); 663 if (! error) { 664 error = EINVAL; 665 goto finish; 666 } 667 668 /* 669 * Reset the hardware here - disabling ANI in the HAL 670 * doesn't reset ANI related registers, so it'll leave 671 * things in an inconsistent state. 672 */ 673 if (sc->sc_running) 674 ath_reset(sc, ATH_RESET_NOLOSS); 675 676 error = 0; 677 678 finish: 679 ATH_LOCK(sc); 680 ath_power_restore_power_state(sc); 681 ATH_UNLOCK(sc); 682 683 return (error); 684 } 685 686 #ifdef IEEE80211_SUPPORT_TDMA 687 static int 688 ath_sysctl_setcca(SYSCTL_HANDLER_ARGS) 689 { 690 struct ath_softc *sc = arg1; 691 int setcca, error; 692 693 setcca = sc->sc_setcca; 694 error = sysctl_handle_int(oidp, &setcca, 0, req); 695 if (error || !req->newptr) 696 return error; 697 sc->sc_setcca = (setcca != 0); 698 return 0; 699 } 700 #endif /* IEEE80211_SUPPORT_TDMA */ 701 702 static int 703 ath_sysctl_forcebstuck(SYSCTL_HANDLER_ARGS) 704 { 705 struct ath_softc *sc = arg1; 706 int val = 0; 707 int error; 708 709 error = sysctl_handle_int(oidp, &val, 0, req); 710 if (error || !req->newptr) 711 return error; 712 if (val == 0) 713 return 0; 714 715 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask); 716 val = 0; 717 return 0; 718 } 719 720 static int 721 ath_sysctl_hangcheck(SYSCTL_HANDLER_ARGS) 722 { 723 struct ath_softc *sc = arg1; 724 int val = 0; 725 int error; 726 uint32_t mask = 0xffffffff; 727 uint32_t *sp; 728 uint32_t rsize; 729 struct ath_hal *ah = sc->sc_ah; 730 731 error = sysctl_handle_int(oidp, &val, 0, req); 732 if (error || !req->newptr) 733 return error; 734 if (val == 0) 735 return 0; 736 737 ATH_LOCK(sc); 738 ath_power_set_power_state(sc, HAL_PM_AWAKE); 739 ATH_UNLOCK(sc); 740 741 /* Do a hang check */ 742 if (!ath_hal_getdiagstate(ah, HAL_DIAG_CHECK_HANGS, 743 &mask, sizeof(mask), 744 (void *) &sp, &rsize)) { 745 error = 0; 746 goto finish; 747 } 748 749 device_printf(sc->sc_dev, "%s: sp=0x%08x\n", __func__, *sp); 750 751 val = 0; 752 error = 0; 753 finish: 754 ATH_LOCK(sc); 755 ath_power_restore_power_state(sc); 756 ATH_UNLOCK(sc); 757 758 return (error); 759 } 760 761 #ifdef ATH_DEBUG_ALQ 762 static int 763 ath_sysctl_alq_log(SYSCTL_HANDLER_ARGS) 764 { 765 struct ath_softc *sc = arg1; 766 int error, enable; 767 768 enable = (sc->sc_alq.sc_alq_isactive); 769 770 error = sysctl_handle_int(oidp, &enable, 0, req); 771 if (error || !req->newptr) 772 return (error); 773 else if (enable) 774 error = if_ath_alq_start(&sc->sc_alq); 775 else 776 error = if_ath_alq_stop(&sc->sc_alq); 777 return (error); 778 } 779 780 /* 781 * Attach the ALQ debugging if required. 782 */ 783 static void 784 ath_sysctl_alq_attach(struct ath_softc *sc) 785 { 786 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 787 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 788 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 789 790 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "alq", CTLFLAG_RD, 791 NULL, "Atheros ALQ logging parameters"); 792 child = SYSCTL_CHILDREN(tree); 793 794 SYSCTL_ADD_STRING(ctx, child, OID_AUTO, "filename", 795 CTLFLAG_RW, sc->sc_alq.sc_alq_filename, 0, "ALQ filename"); 796 797 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 798 "enable", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 799 ath_sysctl_alq_log, "I", ""); 800 801 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 802 "debugmask", CTLFLAG_RW, &sc->sc_alq.sc_alq_debug, 0, 803 "ALQ debug mask"); 804 805 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 806 "numlost", CTLFLAG_RW, &sc->sc_alq.sc_alq_numlost, 0, 807 "number lost"); 808 } 809 #endif /* ATH_DEBUG_ALQ */ 810 811 void 812 ath_sysctlattach(struct ath_softc *sc) 813 { 814 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 815 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 816 struct ath_hal *ah = sc->sc_ah; 817 818 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 819 "countrycode", CTLFLAG_RD, &sc->sc_eecc, 0, 820 "EEPROM country code"); 821 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 822 "regdomain", CTLFLAG_RD, &sc->sc_eerd, 0, 823 "EEPROM regdomain code"); 824 #ifdef ATH_DEBUG 825 SYSCTL_ADD_QUAD(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 826 "debug", CTLFLAG_RW, &sc->sc_debug, 827 #if defined(__DragonFly__) 828 0, 829 #endif 830 "control debugging printfs"); 831 #endif 832 #ifdef ATH_DEBUG_ALQ 833 SYSCTL_ADD_QUAD(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 834 "ktrdebug", CTLFLAG_RW, &sc->sc_ktrdebug, 835 #if defined(__DragonFly__) 836 0, 837 #endif 838 "control debugging KTR"); 839 #endif /* ATH_DEBUG_ALQ */ 840 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 841 "slottime", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 842 ath_sysctl_slottime, "I", "802.11 slot time (us)"); 843 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 844 "acktimeout", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 845 ath_sysctl_acktimeout, "I", "802.11 ACK timeout (us)"); 846 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 847 "ctstimeout", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 848 ath_sysctl_ctstimeout, "I", "802.11 CTS timeout (us)"); 849 850 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 851 "softled", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 852 ath_sysctl_softled, "I", "enable/disable software LED support"); 853 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 854 "ledpin", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 855 ath_sysctl_ledpin, "I", "GPIO pin connected to LED"); 856 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 857 "ledon", CTLFLAG_RW, &sc->sc_ledon, 0, 858 "setting to turn LED on"); 859 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 860 "ledidle", CTLFLAG_RW, &sc->sc_ledidle, 0, 861 "idle time for inactivity LED (ticks)"); 862 863 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 864 "hardled", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 865 ath_sysctl_hardled, "I", "enable/disable hardware LED support"); 866 /* XXX Laziness - configure pins, then flip hardled off/on */ 867 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 868 "led_net_pin", CTLFLAG_RW, &sc->sc_led_net_pin, 0, 869 "MAC Network LED pin, or -1 to disable"); 870 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 871 "led_pwr_pin", CTLFLAG_RW, &sc->sc_led_pwr_pin, 0, 872 "MAC Power LED pin, or -1 to disable"); 873 874 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 875 "txantenna", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 876 ath_sysctl_txantenna, "I", "antenna switch"); 877 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 878 "rxantenna", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 879 ath_sysctl_rxantenna, "I", "default/rx antenna"); 880 if (ath_hal_hasdiversity(ah)) 881 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 882 "diversity", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 883 ath_sysctl_diversity, "I", "antenna diversity"); 884 sc->sc_txintrperiod = ATH_TXINTR_PERIOD; 885 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 886 "txintrperiod", CTLFLAG_RW, &sc->sc_txintrperiod, 0, 887 "tx descriptor batching"); 888 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 889 "diag", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 890 ath_sysctl_diag, "I", "h/w diagnostic control"); 891 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 892 "tpscale", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 893 ath_sysctl_tpscale, "I", "tx power scaling"); 894 if (ath_hal_hastpc(ah)) { 895 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 896 "tpc", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 897 ath_sysctl_tpc, "I", "enable/disable per-packet TPC"); 898 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 899 "tpack", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 900 ath_sysctl_tpack, "I", "tx power for ack frames"); 901 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 902 "tpcts", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 903 ath_sysctl_tpcts, "I", "tx power for cts frames"); 904 } 905 if (ath_hal_hasrfsilent(ah)) { 906 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 907 "rfsilent", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 908 ath_sysctl_rfsilent, "I", "h/w RF silent config"); 909 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 910 "rfkill", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 911 ath_sysctl_rfkill, "I", "enable/disable RF kill switch"); 912 } 913 914 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 915 "txagg", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 916 ath_sysctl_txagg, "I", ""); 917 918 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 919 "forcebstuck", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 920 ath_sysctl_forcebstuck, "I", ""); 921 922 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 923 "hangcheck", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 924 ath_sysctl_hangcheck, "I", ""); 925 926 if (ath_hal_hasintmit(ah)) { 927 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 928 "intmit", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 929 ath_sysctl_intmit, "I", "interference mitigation"); 930 } 931 sc->sc_monpass = HAL_RXERR_DECRYPT | HAL_RXERR_MIC; 932 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 933 "monpass", CTLFLAG_RW, &sc->sc_monpass, 0, 934 "mask of error frames to pass when monitoring"); 935 936 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 937 "hwq_limit_nonaggr", CTLFLAG_RW, &sc->sc_hwq_limit_nonaggr, 0, 938 "Hardware non-AMPDU queue depth before software-queuing TX frames"); 939 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 940 "hwq_limit_aggr", CTLFLAG_RW, &sc->sc_hwq_limit_aggr, 0, 941 "Hardware AMPDU queue depth before software-queuing TX frames"); 942 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 943 "tid_hwq_lo", CTLFLAG_RW, &sc->sc_tid_hwq_lo, 0, 944 ""); 945 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 946 "tid_hwq_hi", CTLFLAG_RW, &sc->sc_tid_hwq_hi, 0, 947 ""); 948 949 /* Aggregate length twiddles */ 950 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 951 "aggr_limit", CTLFLAG_RW, &sc->sc_aggr_limit, 0, 952 "Maximum A-MPDU size, or 0 for 'default'"); 953 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 954 "rts_aggr_limit", CTLFLAG_RW, &sc->sc_rts_aggr_limit, 0, 955 "Maximum A-MPDU size for RTS-protected frames, or '0' " 956 "for default"); 957 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 958 "delim_min_pad", CTLFLAG_RW, &sc->sc_delim_min_pad, 0, 959 "Enforce a minimum number of delimiters per A-MPDU " 960 " sub-frame"); 961 962 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 963 "txq_data_minfree", CTLFLAG_RW, &sc->sc_txq_data_minfree, 964 0, "Minimum free buffers before adding a data frame" 965 " to the TX queue"); 966 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 967 "txq_mcastq_maxdepth", CTLFLAG_RW, 968 &sc->sc_txq_mcastq_maxdepth, 0, 969 "Maximum buffer depth for multicast/broadcast frames"); 970 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 971 "txq_node_maxdepth", CTLFLAG_RW, 972 &sc->sc_txq_node_maxdepth, 0, 973 "Maximum buffer depth for a single node"); 974 975 #if 0 976 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 977 "cabq_enable", CTLFLAG_RW, 978 &sc->sc_cabq_enable, 0, 979 "Whether to transmit on the CABQ or not"); 980 #endif 981 982 #ifdef IEEE80211_SUPPORT_TDMA 983 if (ath_hal_macversion(ah) > 0x78) { 984 sc->sc_tdmadbaprep = 2; 985 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 986 "dbaprep", CTLFLAG_RW, &sc->sc_tdmadbaprep, 0, 987 "TDMA DBA preparation time"); 988 sc->sc_tdmaswbaprep = 10; 989 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 990 "swbaprep", CTLFLAG_RW, &sc->sc_tdmaswbaprep, 0, 991 "TDMA SWBA preparation time"); 992 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 993 "guardtime", CTLFLAG_RW, &sc->sc_tdmaguard, 0, 994 "TDMA slot guard time"); 995 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 996 "superframe", CTLFLAG_RD, &sc->sc_tdmabintval, 0, 997 "TDMA calculated super frame"); 998 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 999 "setcca", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 1000 ath_sysctl_setcca, "I", "enable CCA control"); 1001 } 1002 #endif 1003 1004 #ifdef ATH_DEBUG_ALQ 1005 ath_sysctl_alq_attach(sc); 1006 #endif 1007 } 1008 1009 static int 1010 ath_sysctl_clearstats(SYSCTL_HANDLER_ARGS) 1011 { 1012 struct ath_softc *sc = arg1; 1013 int val = 0; 1014 int error; 1015 1016 error = sysctl_handle_int(oidp, &val, 0, req); 1017 if (error || !req->newptr) 1018 return error; 1019 if (val == 0) 1020 return 0; /* Not clearing the stats is still valid */ 1021 memset(&sc->sc_stats, 0, sizeof(sc->sc_stats)); 1022 memset(&sc->sc_aggr_stats, 0, sizeof(sc->sc_aggr_stats)); 1023 memset(&sc->sc_intr_stats, 0, sizeof(sc->sc_intr_stats)); 1024 1025 val = 0; 1026 return 0; 1027 } 1028 1029 static void 1030 ath_sysctl_stats_attach_rxphyerr(struct ath_softc *sc, struct sysctl_oid_list *parent) 1031 { 1032 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 1033 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 1034 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 1035 int i; 1036 char sn[8]; 1037 1038 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "rx_phy_err", CTLFLAG_RD, NULL, "Per-code RX PHY Errors"); 1039 child = SYSCTL_CHILDREN(tree); 1040 for (i = 0; i < 64; i++) { 1041 ksnprintf(sn, sizeof(sn), "%d", i); 1042 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, sn, CTLFLAG_RD, &sc->sc_stats.ast_rx_phy[i], 0, ""); 1043 } 1044 } 1045 1046 static void 1047 ath_sysctl_stats_attach_intr(struct ath_softc *sc, 1048 struct sysctl_oid_list *parent) 1049 { 1050 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 1051 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 1052 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 1053 int i; 1054 char sn[8]; 1055 1056 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "sync_intr", 1057 CTLFLAG_RD, NULL, "Sync interrupt statistics"); 1058 child = SYSCTL_CHILDREN(tree); 1059 for (i = 0; i < 32; i++) { 1060 ksnprintf(sn, sizeof(sn), "%d", i); 1061 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, sn, CTLFLAG_RD, 1062 &sc->sc_intr_stats.sync_intr[i], 0, ""); 1063 } 1064 } 1065 1066 void 1067 ath_sysctl_stats_attach(struct ath_softc *sc) 1068 { 1069 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 1070 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 1071 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 1072 1073 /* Create "clear" node */ 1074 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1075 "clear_stats", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 1076 ath_sysctl_clearstats, "I", "clear stats"); 1077 1078 /* Create stats node */ 1079 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD, 1080 NULL, "Statistics"); 1081 child = SYSCTL_CHILDREN(tree); 1082 1083 /* This was generated from if_athioctl.h */ 1084 1085 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_watchdog", CTLFLAG_RD, 1086 &sc->sc_stats.ast_watchdog, 0, "device reset by watchdog"); 1087 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_hardware", CTLFLAG_RD, 1088 &sc->sc_stats.ast_hardware, 0, "fatal hardware error interrupts"); 1089 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bmiss", CTLFLAG_RD, 1090 &sc->sc_stats.ast_bmiss, 0, "beacon miss interrupts"); 1091 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bmiss_phantom", CTLFLAG_RD, 1092 &sc->sc_stats.ast_bmiss_phantom, 0, "beacon miss interrupts"); 1093 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bstuck", CTLFLAG_RD, 1094 &sc->sc_stats.ast_bstuck, 0, "beacon stuck interrupts"); 1095 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rxorn", CTLFLAG_RD, 1096 &sc->sc_stats.ast_rxorn, 0, "rx overrun interrupts"); 1097 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rxeol", CTLFLAG_RD, 1098 &sc->sc_stats.ast_rxeol, 0, "rx eol interrupts"); 1099 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_txurn", CTLFLAG_RD, 1100 &sc->sc_stats.ast_txurn, 0, "tx underrun interrupts"); 1101 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_mib", CTLFLAG_RD, 1102 &sc->sc_stats.ast_mib, 0, "mib interrupts"); 1103 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_intrcoal", CTLFLAG_RD, 1104 &sc->sc_stats.ast_intrcoal, 0, "interrupts coalesced"); 1105 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_packets", CTLFLAG_RD, 1106 &sc->sc_stats.ast_tx_packets, 0, "packet sent on the interface"); 1107 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_mgmt", CTLFLAG_RD, 1108 &sc->sc_stats.ast_tx_mgmt, 0, "management frames transmitted"); 1109 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_discard", CTLFLAG_RD, 1110 &sc->sc_stats.ast_tx_discard, 0, "frames discarded prior to assoc"); 1111 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_qstop", CTLFLAG_RD, 1112 &sc->sc_stats.ast_tx_qstop, 0, "output stopped 'cuz no buffer"); 1113 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_encap", CTLFLAG_RD, 1114 &sc->sc_stats.ast_tx_encap, 0, "tx encapsulation failed"); 1115 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nonode", CTLFLAG_RD, 1116 &sc->sc_stats.ast_tx_nonode, 0, "tx failed 'cuz no node"); 1117 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nombuf", CTLFLAG_RD, 1118 &sc->sc_stats.ast_tx_nombuf, 0, "tx failed 'cuz no mbuf"); 1119 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nomcl", CTLFLAG_RD, 1120 &sc->sc_stats.ast_tx_nomcl, 0, "tx failed 'cuz no cluster"); 1121 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_linear", CTLFLAG_RD, 1122 &sc->sc_stats.ast_tx_linear, 0, "tx linearized to cluster"); 1123 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nodata", CTLFLAG_RD, 1124 &sc->sc_stats.ast_tx_nodata, 0, "tx discarded empty frame"); 1125 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_busdma", CTLFLAG_RD, 1126 &sc->sc_stats.ast_tx_busdma, 0, "tx failed for dma resrcs"); 1127 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_xretries", CTLFLAG_RD, 1128 &sc->sc_stats.ast_tx_xretries, 0, "tx failed 'cuz too many retries"); 1129 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_fifoerr", CTLFLAG_RD, 1130 &sc->sc_stats.ast_tx_fifoerr, 0, "tx failed 'cuz FIFO underrun"); 1131 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_filtered", CTLFLAG_RD, 1132 &sc->sc_stats.ast_tx_filtered, 0, "tx failed 'cuz xmit filtered"); 1133 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_shortretry", CTLFLAG_RD, 1134 &sc->sc_stats.ast_tx_shortretry, 0, "tx on-chip retries (short)"); 1135 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_longretry", CTLFLAG_RD, 1136 &sc->sc_stats.ast_tx_longretry, 0, "tx on-chip retries (long)"); 1137 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_badrate", CTLFLAG_RD, 1138 &sc->sc_stats.ast_tx_badrate, 0, "tx failed 'cuz bogus xmit rate"); 1139 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_noack", CTLFLAG_RD, 1140 &sc->sc_stats.ast_tx_noack, 0, "tx frames with no ack marked"); 1141 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_rts", CTLFLAG_RD, 1142 &sc->sc_stats.ast_tx_rts, 0, "tx frames with rts enabled"); 1143 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_cts", CTLFLAG_RD, 1144 &sc->sc_stats.ast_tx_cts, 0, "tx frames with cts enabled"); 1145 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_shortpre", CTLFLAG_RD, 1146 &sc->sc_stats.ast_tx_shortpre, 0, "tx frames with short preamble"); 1147 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_altrate", CTLFLAG_RD, 1148 &sc->sc_stats.ast_tx_altrate, 0, "tx frames with alternate rate"); 1149 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_protect", CTLFLAG_RD, 1150 &sc->sc_stats.ast_tx_protect, 0, "tx frames with protection"); 1151 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ctsburst", CTLFLAG_RD, 1152 &sc->sc_stats.ast_tx_ctsburst, 0, "tx frames with cts and bursting"); 1153 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ctsext", CTLFLAG_RD, 1154 &sc->sc_stats.ast_tx_ctsext, 0, "tx frames with cts extension"); 1155 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_nombuf", CTLFLAG_RD, 1156 &sc->sc_stats.ast_rx_nombuf, 0, "rx setup failed 'cuz no mbuf"); 1157 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_busdma", CTLFLAG_RD, 1158 &sc->sc_stats.ast_rx_busdma, 0, "rx setup failed for dma resrcs"); 1159 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_orn", CTLFLAG_RD, 1160 &sc->sc_stats.ast_rx_orn, 0, "rx failed 'cuz of desc overrun"); 1161 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_crcerr", CTLFLAG_RD, 1162 &sc->sc_stats.ast_rx_crcerr, 0, "rx failed 'cuz of bad CRC"); 1163 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_fifoerr", CTLFLAG_RD, 1164 &sc->sc_stats.ast_rx_fifoerr, 0, "rx failed 'cuz of FIFO overrun"); 1165 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_badcrypt", CTLFLAG_RD, 1166 &sc->sc_stats.ast_rx_badcrypt, 0, "rx failed 'cuz decryption"); 1167 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_badmic", CTLFLAG_RD, 1168 &sc->sc_stats.ast_rx_badmic, 0, "rx failed 'cuz MIC failure"); 1169 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_phyerr", CTLFLAG_RD, 1170 &sc->sc_stats.ast_rx_phyerr, 0, "rx failed 'cuz of PHY err"); 1171 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_tooshort", CTLFLAG_RD, 1172 &sc->sc_stats.ast_rx_tooshort, 0, "rx discarded 'cuz frame too short"); 1173 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_toobig", CTLFLAG_RD, 1174 &sc->sc_stats.ast_rx_toobig, 0, "rx discarded 'cuz frame too large"); 1175 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_packets", CTLFLAG_RD, 1176 &sc->sc_stats.ast_rx_packets, 0, "packet recv on the interface"); 1177 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_mgt", CTLFLAG_RD, 1178 &sc->sc_stats.ast_rx_mgt, 0, "management frames received"); 1179 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_ctl", CTLFLAG_RD, 1180 &sc->sc_stats.ast_rx_ctl, 0, "rx discarded 'cuz ctl frame"); 1181 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_xmit", CTLFLAG_RD, 1182 &sc->sc_stats.ast_be_xmit, 0, "beacons transmitted"); 1183 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_nombuf", CTLFLAG_RD, 1184 &sc->sc_stats.ast_be_nombuf, 0, "beacon setup failed 'cuz no mbuf"); 1185 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_cal", CTLFLAG_RD, 1186 &sc->sc_stats.ast_per_cal, 0, "periodic calibration calls"); 1187 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_calfail", CTLFLAG_RD, 1188 &sc->sc_stats.ast_per_calfail, 0, "periodic calibration failed"); 1189 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_rfgain", CTLFLAG_RD, 1190 &sc->sc_stats.ast_per_rfgain, 0, "periodic calibration rfgain reset"); 1191 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_calls", CTLFLAG_RD, 1192 &sc->sc_stats.ast_rate_calls, 0, "rate control checks"); 1193 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_raise", CTLFLAG_RD, 1194 &sc->sc_stats.ast_rate_raise, 0, "rate control raised xmit rate"); 1195 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_drop", CTLFLAG_RD, 1196 &sc->sc_stats.ast_rate_drop, 0, "rate control dropped xmit rate"); 1197 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ant_defswitch", CTLFLAG_RD, 1198 &sc->sc_stats.ast_ant_defswitch, 0, "rx/default antenna switches"); 1199 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ant_txswitch", CTLFLAG_RD, 1200 &sc->sc_stats.ast_ant_txswitch, 0, "tx antenna switches"); 1201 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_cabq_xmit", CTLFLAG_RD, 1202 &sc->sc_stats.ast_cabq_xmit, 0, "cabq frames transmitted"); 1203 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_cabq_busy", CTLFLAG_RD, 1204 &sc->sc_stats.ast_cabq_busy, 0, "cabq found busy"); 1205 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_raw", CTLFLAG_RD, 1206 &sc->sc_stats.ast_tx_raw, 0, "tx frames through raw api"); 1207 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_txok", CTLFLAG_RD, 1208 &sc->sc_stats.ast_ff_txok, 0, "fast frames tx'd successfully"); 1209 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_txerr", CTLFLAG_RD, 1210 &sc->sc_stats.ast_ff_txerr, 0, "fast frames tx'd w/ error"); 1211 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_rx", CTLFLAG_RD, 1212 &sc->sc_stats.ast_ff_rx, 0, "fast frames rx'd"); 1213 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_flush", CTLFLAG_RD, 1214 &sc->sc_stats.ast_ff_flush, 0, "fast frames flushed from staging q"); 1215 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_qfull", CTLFLAG_RD, 1216 &sc->sc_stats.ast_tx_qfull, 0, "tx dropped 'cuz of queue limit"); 1217 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nobuf", CTLFLAG_RD, 1218 &sc->sc_stats.ast_tx_nobuf, 0, "tx dropped 'cuz no ath buffer"); 1219 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_update", CTLFLAG_RD, 1220 &sc->sc_stats.ast_tdma_update, 0, "TDMA slot timing updates"); 1221 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_timers", CTLFLAG_RD, 1222 &sc->sc_stats.ast_tdma_timers, 0, "TDMA slot update set beacon timers"); 1223 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_tsf", CTLFLAG_RD, 1224 &sc->sc_stats.ast_tdma_tsf, 0, "TDMA slot update set TSF"); 1225 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_ack", CTLFLAG_RD, 1226 &sc->sc_stats.ast_tdma_ack, 0, "TDMA tx failed 'cuz ACK required"); 1227 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_raw_fail", CTLFLAG_RD, 1228 &sc->sc_stats.ast_tx_raw_fail, 0, "raw tx failed 'cuz h/w down"); 1229 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nofrag", CTLFLAG_RD, 1230 &sc->sc_stats.ast_tx_nofrag, 0, "tx dropped 'cuz no ath frag buffer"); 1231 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_missed", CTLFLAG_RD, 1232 &sc->sc_stats.ast_be_missed, 0, "number of -missed- beacons"); 1233 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ani_cal", CTLFLAG_RD, 1234 &sc->sc_stats.ast_ani_cal, 0, "number of ANI polls"); 1235 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_agg", CTLFLAG_RD, 1236 &sc->sc_stats.ast_rx_agg, 0, "number of aggregate frames received"); 1237 1238 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_halfgi", CTLFLAG_RD, 1239 &sc->sc_stats.ast_rx_halfgi, 0, "number of frames received with half-GI"); 1240 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_2040", CTLFLAG_RD, 1241 &sc->sc_stats.ast_rx_2040, 0, "number of HT/40 frames received"); 1242 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_pre_crc_err", CTLFLAG_RD, 1243 &sc->sc_stats.ast_rx_pre_crc_err, 0, "number of delimeter-CRC errors detected"); 1244 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_post_crc_err", CTLFLAG_RD, 1245 &sc->sc_stats.ast_rx_post_crc_err, 0, "number of post-delimiter CRC errors detected"); 1246 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_decrypt_busy_err", CTLFLAG_RD, 1247 &sc->sc_stats.ast_rx_decrypt_busy_err, 0, "number of frames received w/ busy decrypt engine"); 1248 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_hi_rx_chain", CTLFLAG_RD, 1249 &sc->sc_stats.ast_rx_hi_rx_chain, 0, ""); 1250 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_htprotect", CTLFLAG_RD, 1251 &sc->sc_stats.ast_tx_htprotect, 0, "HT tx frames with protection"); 1252 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_hitqueueend", CTLFLAG_RD, 1253 &sc->sc_stats.ast_rx_hitqueueend, 0, "RX hit queue end"); 1254 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_timeout", CTLFLAG_RD, 1255 &sc->sc_stats.ast_tx_timeout, 0, "TX Global Timeout"); 1256 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_cst", CTLFLAG_RD, 1257 &sc->sc_stats.ast_tx_cst, 0, "TX Carrier Sense Timeout"); 1258 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_xtxop", CTLFLAG_RD, 1259 &sc->sc_stats.ast_tx_xtxop, 0, "TX exceeded TXOP"); 1260 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_timerexpired", CTLFLAG_RD, 1261 &sc->sc_stats.ast_tx_timerexpired, 0, "TX exceeded TX_TIMER register"); 1262 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_desccfgerr", CTLFLAG_RD, 1263 &sc->sc_stats.ast_tx_desccfgerr, 0, "TX Descriptor Cfg Error"); 1264 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swretries", CTLFLAG_RD, 1265 &sc->sc_stats.ast_tx_swretries, 0, "TX software retry count"); 1266 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swretrymax", CTLFLAG_RD, 1267 &sc->sc_stats.ast_tx_swretrymax, 0, "TX software retry max reached"); 1268 1269 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_data_underrun", CTLFLAG_RD, 1270 &sc->sc_stats.ast_tx_data_underrun, 0, ""); 1271 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_delim_underrun", CTLFLAG_RD, 1272 &sc->sc_stats.ast_tx_delim_underrun, 0, ""); 1273 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_failall", CTLFLAG_RD, 1274 &sc->sc_stats.ast_tx_aggr_failall, 0, 1275 "Number of aggregate TX failures (whole frame)"); 1276 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_ok", CTLFLAG_RD, 1277 &sc->sc_stats.ast_tx_aggr_ok, 0, 1278 "Number of aggregate TX OK completions (subframe)"); 1279 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_fail", CTLFLAG_RD, 1280 &sc->sc_stats.ast_tx_aggr_fail, 0, 1281 "Number of aggregate TX failures (subframe)"); 1282 1283 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_intr", CTLFLAG_RD, 1284 &sc->sc_stats.ast_rx_intr, 0, "RX interrupts"); 1285 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_intr", CTLFLAG_RD, 1286 &sc->sc_stats.ast_tx_intr, 0, "TX interrupts"); 1287 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_mcastq_overflow", 1288 CTLFLAG_RD, &sc->sc_stats.ast_tx_mcastq_overflow, 0, 1289 "Number of multicast frames exceeding maximum mcast queue depth"); 1290 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_keymiss", CTLFLAG_RD, 1291 &sc->sc_stats.ast_rx_keymiss, 0, ""); 1292 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swfiltered", CTLFLAG_RD, 1293 &sc->sc_stats.ast_tx_swfiltered, 0, ""); 1294 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_stbc", 1295 CTLFLAG_RD, &sc->sc_stats.ast_rx_stbc, 0, 1296 "Number of STBC frames received"); 1297 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_stbc", 1298 CTLFLAG_RD, &sc->sc_stats.ast_tx_stbc, 0, 1299 "Number of STBC frames transmitted"); 1300 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ldpc", 1301 CTLFLAG_RD, &sc->sc_stats.ast_tx_ldpc, 0, 1302 "Number of LDPC frames transmitted"); 1303 1304 /* Attach the RX phy error array */ 1305 ath_sysctl_stats_attach_rxphyerr(sc, child); 1306 1307 /* Attach the interrupt statistics array */ 1308 ath_sysctl_stats_attach_intr(sc, child); 1309 } 1310 1311 /* 1312 * This doesn't necessarily belong here (because it's HAL related, not 1313 * driver related). 1314 */ 1315 void 1316 ath_sysctl_hal_attach(struct ath_softc *sc) 1317 { 1318 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 1319 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 1320 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 1321 1322 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "hal", CTLFLAG_RD, 1323 NULL, "Atheros HAL parameters"); 1324 child = SYSCTL_CHILDREN(tree); 1325 1326 sc->sc_ah->ah_config.ah_debug = 0; 1327 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "debug", CTLFLAG_RW, 1328 &sc->sc_ah->ah_config.ah_debug, 0, "Atheros HAL debugging printfs"); 1329 1330 sc->sc_ah->ah_config.ah_ar5416_biasadj = 0; 1331 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "ar5416_biasadj", CTLFLAG_RW, 1332 &sc->sc_ah->ah_config.ah_ar5416_biasadj, 0, 1333 "Enable 2GHz AR5416 direction sensitivity bias adjust"); 1334 1335 sc->sc_ah->ah_config.ah_dma_beacon_response_time = 2; 1336 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "dma_brt", CTLFLAG_RW, 1337 &sc->sc_ah->ah_config.ah_dma_beacon_response_time, 0, 1338 "Atheros HAL DMA beacon response time"); 1339 1340 sc->sc_ah->ah_config.ah_sw_beacon_response_time = 10; 1341 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "sw_brt", CTLFLAG_RW, 1342 &sc->sc_ah->ah_config.ah_sw_beacon_response_time, 0, 1343 "Atheros HAL software beacon response time"); 1344 1345 sc->sc_ah->ah_config.ah_additional_swba_backoff = 0; 1346 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "swba_backoff", CTLFLAG_RW, 1347 &sc->sc_ah->ah_config.ah_additional_swba_backoff, 0, 1348 "Atheros HAL additional SWBA backoff time"); 1349 1350 sc->sc_ah->ah_config.ah_force_full_reset = 0; 1351 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "force_full_reset", CTLFLAG_RW, 1352 &sc->sc_ah->ah_config.ah_force_full_reset, 0, 1353 "Force full chip reset rather than a warm reset"); 1354 1355 /* 1356 * This is initialised by the driver. 1357 */ 1358 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "serialise_reg_war", CTLFLAG_RW, 1359 &sc->sc_ah->ah_config.ah_serialise_reg_war, 0, 1360 "Force register access serialisation"); 1361 } 1362