1 /*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 /* 34 * Driver for the Atheros Wireless LAN controller. 35 * 36 * This software is derived from work of Atsushi Onoe; his contribution 37 * is greatly appreciated. 38 */ 39 40 #include "opt_inet.h" 41 #include "opt_ath.h" 42 /* 43 * This is needed for register operations which are performed 44 * by the driver - eg, calls to ath_hal_gettsf32(). 45 * 46 * It's also required for any AH_DEBUG checks in here, eg the 47 * module dependencies. 48 */ 49 #include "opt_ah.h" 50 #include "opt_wlan.h" 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/sysctl.h> 55 #include <sys/mbuf.h> 56 #include <sys/malloc.h> 57 #include <sys/lock.h> 58 #include <sys/mutex.h> 59 #include <sys/kernel.h> 60 #include <sys/socket.h> 61 #include <sys/sockio.h> 62 #include <sys/errno.h> 63 #include <sys/callout.h> 64 #include <sys/bus.h> 65 #include <sys/endian.h> 66 #include <sys/kthread.h> 67 #include <sys/taskqueue.h> 68 #include <sys/priv.h> 69 #include <sys/module.h> 70 #include <sys/ktr.h> 71 72 #if defined(__DragonFly__) 73 /* empty */ 74 #else 75 #include <sys/smp.h> 76 #include <machine/bus.h> 77 #endif 78 79 #include <net/if.h> 80 #include <net/if_var.h> 81 #include <net/if_dl.h> 82 #include <net/if_media.h> 83 #include <net/if_types.h> 84 #include <net/if_arp.h> 85 #include <net/ethernet.h> 86 #include <net/if_llc.h> 87 88 #include <netproto/802_11/ieee80211_var.h> 89 #include <netproto/802_11/ieee80211_regdomain.h> 90 #ifdef IEEE80211_SUPPORT_SUPERG 91 #include <netproto/802_11/ieee80211_superg.h> 92 #endif 93 #ifdef IEEE80211_SUPPORT_TDMA 94 #include <netproto/802_11/ieee80211_tdma.h> 95 #endif 96 97 #include <net/bpf.h> 98 99 #ifdef INET 100 #include <netinet/in.h> 101 #include <netinet/if_ether.h> 102 #endif 103 104 #include <dev/netif/ath/ath/if_athvar.h> 105 #include <dev/netif/ath/ath_hal/ah_devid.h> /* XXX for softled */ 106 #include <dev/netif/ath/ath_hal/ah_diagcodes.h> 107 108 #include <dev/netif/ath/ath/if_ath_debug.h> 109 #include <dev/netif/ath/ath/if_ath_misc.h> 110 #include <dev/netif/ath/ath/if_ath_tsf.h> 111 #include <dev/netif/ath/ath/if_ath_tx.h> 112 #include <dev/netif/ath/ath/if_ath_sysctl.h> 113 #include <dev/netif/ath/ath/if_ath_led.h> 114 #include <dev/netif/ath/ath/if_ath_keycache.h> 115 #include <dev/netif/ath/ath/if_ath_rx.h> 116 #include <dev/netif/ath/ath/if_ath_beacon.h> 117 #include <dev/netif/ath/ath/if_athdfs.h> 118 119 #ifdef ATH_TX99_DIAG 120 #include <dev/netif/ath/ath_tx99/ath_tx99.h> 121 #endif 122 123 #ifdef ATH_DEBUG_ALQ 124 #include <dev/netif/ath/ath/if_ath_alq.h> 125 #endif 126 127 #ifdef IEEE80211_SUPPORT_TDMA 128 #include <dev/netif/ath/ath/if_ath_tdma.h> 129 130 static void ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt, 131 u_int32_t bintval); 132 static void ath_tdma_bintvalsetup(struct ath_softc *sc, 133 const struct ieee80211_tdma_state *tdma); 134 #endif /* IEEE80211_SUPPORT_TDMA */ 135 136 #ifdef IEEE80211_SUPPORT_TDMA 137 static void 138 ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt, u_int32_t bintval) 139 { 140 struct ath_hal *ah = sc->sc_ah; 141 HAL_BEACON_TIMERS bt; 142 143 bt.bt_intval = bintval | HAL_BEACON_ENA; 144 bt.bt_nexttbtt = nexttbtt; 145 bt.bt_nextdba = (nexttbtt<<3) - sc->sc_tdmadbaprep; 146 bt.bt_nextswba = (nexttbtt<<3) - sc->sc_tdmaswbaprep; 147 bt.bt_nextatim = nexttbtt+1; 148 /* Enables TBTT, DBA, SWBA timers by default */ 149 bt.bt_flags = 0; 150 #if 0 151 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 152 "%s: intval=%d (0x%08x) nexttbtt=%u (0x%08x), nextdba=%u (0x%08x), nextswba=%u (0x%08x),nextatim=%u (0x%08x)\n", 153 __func__, 154 bt.bt_intval, 155 bt.bt_intval, 156 bt.bt_nexttbtt, 157 bt.bt_nexttbtt, 158 bt.bt_nextdba, 159 bt.bt_nextdba, 160 bt.bt_nextswba, 161 bt.bt_nextswba, 162 bt.bt_nextatim, 163 bt.bt_nextatim); 164 #endif 165 166 #ifdef ATH_DEBUG_ALQ 167 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET)) { 168 struct if_ath_alq_tdma_timer_set t; 169 t.bt_intval = htobe32(bt.bt_intval); 170 t.bt_nexttbtt = htobe32(bt.bt_nexttbtt); 171 t.bt_nextdba = htobe32(bt.bt_nextdba); 172 t.bt_nextswba = htobe32(bt.bt_nextswba); 173 t.bt_nextatim = htobe32(bt.bt_nextatim); 174 t.bt_flags = htobe32(bt.bt_flags); 175 t.sc_tdmadbaprep = htobe32(sc->sc_tdmadbaprep); 176 t.sc_tdmaswbaprep = htobe32(sc->sc_tdmaswbaprep); 177 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET, 178 sizeof(t), (char *) &t); 179 } 180 #endif 181 182 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 183 "%s: nexttbtt=%u (0x%08x), nexttbtt tsf=%lld (0x%08llx)\n", 184 __func__, 185 bt.bt_nexttbtt, 186 bt.bt_nexttbtt, 187 (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10), 188 (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10)); 189 ath_hal_beaconsettimers(ah, &bt); 190 } 191 192 /* 193 * Calculate the beacon interval. This is periodic in the 194 * superframe for the bss. We assume each station is configured 195 * identically wrt transmit rate so the guard time we calculate 196 * above will be the same on all stations. Note we need to 197 * factor in the xmit time because the hardware will schedule 198 * a frame for transmit if the start of the frame is within 199 * the burst time. When we get hardware that properly kills 200 * frames in the PCU we can reduce/eliminate the guard time. 201 * 202 * Roundup to 1024 is so we have 1 TU buffer in the guard time 203 * to deal with the granularity of the nexttbtt timer. 11n MAC's 204 * with 1us timer granularity should allow us to reduce/eliminate 205 * this. 206 */ 207 static void 208 ath_tdma_bintvalsetup(struct ath_softc *sc, 209 const struct ieee80211_tdma_state *tdma) 210 { 211 /* copy from vap state (XXX check all vaps have same value?) */ 212 sc->sc_tdmaslotlen = tdma->tdma_slotlen; 213 214 sc->sc_tdmabintval = roundup((sc->sc_tdmaslotlen+sc->sc_tdmaguard) * 215 tdma->tdma_slotcnt, 1024); 216 sc->sc_tdmabintval >>= 10; /* TSF -> TU */ 217 if (sc->sc_tdmabintval & 1) 218 sc->sc_tdmabintval++; 219 220 if (tdma->tdma_slot == 0) { 221 /* 222 * Only slot 0 beacons; other slots respond. 223 */ 224 sc->sc_imask |= HAL_INT_SWBA; 225 sc->sc_tdmaswba = 0; /* beacon immediately */ 226 } else { 227 /* XXX all vaps must be slot 0 or slot !0 */ 228 sc->sc_imask &= ~HAL_INT_SWBA; 229 } 230 } 231 232 /* 233 * Max 802.11 overhead. This assumes no 4-address frames and 234 * the encapsulation done by ieee80211_encap (llc). We also 235 * include potential crypto overhead. 236 */ 237 #define IEEE80211_MAXOVERHEAD \ 238 (sizeof(struct ieee80211_qosframe) \ 239 + sizeof(struct llc) \ 240 + IEEE80211_ADDR_LEN \ 241 + IEEE80211_WEP_IVLEN \ 242 + IEEE80211_WEP_KIDLEN \ 243 + IEEE80211_WEP_CRCLEN \ 244 + IEEE80211_WEP_MICLEN \ 245 + IEEE80211_CRC_LEN) 246 247 /* 248 * Setup initially for tdma operation. Start the beacon 249 * timers and enable SWBA if we are slot 0. Otherwise 250 * we wait for slot 0 to arrive so we can sync up before 251 * starting to transmit. 252 */ 253 void 254 ath_tdma_config(struct ath_softc *sc, struct ieee80211vap *vap) 255 { 256 struct ath_hal *ah = sc->sc_ah; 257 struct ieee80211com *ic = &sc->sc_ic; 258 const struct ieee80211_txparam *tp; 259 const struct ieee80211_tdma_state *tdma = NULL; 260 int rix; 261 262 if (vap == NULL) { 263 vap = TAILQ_FIRST(&ic->ic_vaps); /* XXX */ 264 if (vap == NULL) { 265 device_printf(sc->sc_dev, "%s: no vaps?\n", __func__); 266 return; 267 } 268 } 269 /* XXX should take a locked ref to iv_bss */ 270 tp = vap->iv_bss->ni_txparms; 271 /* 272 * Calculate the guard time for each slot. This is the 273 * time to send a maximal-size frame according to the 274 * fixed/lowest transmit rate. Note that the interface 275 * mtu does not include the 802.11 overhead so we must 276 * tack that on (ath_hal_computetxtime includes the 277 * preamble and plcp in it's calculation). 278 */ 279 tdma = vap->iv_tdma; 280 if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 281 rix = ath_tx_findrix(sc, tp->ucastrate); 282 else 283 rix = ath_tx_findrix(sc, tp->mcastrate); 284 285 /* 286 * If the chip supports enforcing TxOP on transmission, 287 * we can just delete the guard window. It isn't at all required. 288 */ 289 if (sc->sc_hasenforcetxop) { 290 sc->sc_tdmaguard = 0; 291 } else { 292 /* XXX short preamble assumed */ 293 /* XXX non-11n rate assumed */ 294 sc->sc_tdmaguard = ath_hal_computetxtime(ah, sc->sc_currates, 295 vap->iv_ifp->if_mtu + IEEE80211_MAXOVERHEAD, rix, AH_TRUE); 296 } 297 298 ath_hal_intrset(ah, 0); 299 300 ath_beaconq_config(sc); /* setup h/w beacon q */ 301 if (sc->sc_setcca) 302 ath_hal_setcca(ah, AH_FALSE); /* disable CCA */ 303 ath_tdma_bintvalsetup(sc, tdma); /* calculate beacon interval */ 304 ath_tdma_settimers(sc, sc->sc_tdmabintval, 305 sc->sc_tdmabintval | HAL_BEACON_RESET_TSF); 306 sc->sc_syncbeacon = 0; 307 308 sc->sc_avgtsfdeltap = TDMA_DUMMY_MARKER; 309 sc->sc_avgtsfdeltam = TDMA_DUMMY_MARKER; 310 311 ath_hal_intrset(ah, sc->sc_imask); 312 313 DPRINTF(sc, ATH_DEBUG_TDMA, "%s: slot %u len %uus cnt %u " 314 "bsched %u guard %uus bintval %u TU dba prep %u\n", __func__, 315 tdma->tdma_slot, tdma->tdma_slotlen, tdma->tdma_slotcnt, 316 tdma->tdma_bintval, sc->sc_tdmaguard, sc->sc_tdmabintval, 317 sc->sc_tdmadbaprep); 318 319 #ifdef ATH_DEBUG_ALQ 320 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG)) { 321 struct if_ath_alq_tdma_timer_config t; 322 323 t.tdma_slot = htobe32(tdma->tdma_slot); 324 t.tdma_slotlen = htobe32(tdma->tdma_slotlen); 325 t.tdma_slotcnt = htobe32(tdma->tdma_slotcnt); 326 t.tdma_bintval = htobe32(tdma->tdma_bintval); 327 t.tdma_guard = htobe32(sc->sc_tdmaguard); 328 t.tdma_scbintval = htobe32(sc->sc_tdmabintval); 329 t.tdma_dbaprep = htobe32(sc->sc_tdmadbaprep); 330 331 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG, 332 sizeof(t), (char *) &t); 333 } 334 #endif /* ATH_DEBUG_ALQ */ 335 } 336 337 /* 338 * Update tdma operation. Called from the 802.11 layer 339 * when a beacon is received from the TDMA station operating 340 * in the slot immediately preceding us in the bss. Use 341 * the rx timestamp for the beacon frame to update our 342 * beacon timers so we follow their schedule. Note that 343 * by using the rx timestamp we implicitly include the 344 * propagation delay in our schedule. 345 * 346 * XXX TODO: since the changes for the AR5416 and later chips 347 * involved changing the TSF/TU calculations, we need to make 348 * sure that various calculations wrap consistently. 349 * 350 * A lot of the problems stemmed from the calculations wrapping 351 * at 65,535 TU. Since a lot of the math is still being done in 352 * TU, please audit it to ensure that when the TU values programmed 353 * into the timers wrap at (2^31)-1 TSF, all the various terms 354 * wrap consistently. 355 */ 356 void 357 ath_tdma_update(struct ieee80211_node *ni, 358 const struct ieee80211_tdma_param *tdma, int changed) 359 { 360 #define TSF_TO_TU(_h,_l) \ 361 ((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10)) 362 #define TU_TO_TSF(_tu) (((u_int64_t)(_tu)) << 10) 363 struct ieee80211vap *vap = ni->ni_vap; 364 struct ieee80211com *ic = ni->ni_ic; 365 struct ath_softc *sc = ic->ic_softc; 366 struct ath_hal *ah = sc->sc_ah; 367 const HAL_RATE_TABLE *rt = sc->sc_currates; 368 u_int64_t tsf, rstamp, nextslot, nexttbtt, nexttbtt_full; 369 u_int32_t txtime, nextslottu; 370 int32_t tudelta, tsfdelta; 371 const struct ath_rx_status *rs; 372 int rix; 373 374 sc->sc_stats.ast_tdma_update++; 375 376 /* 377 * Check for and adopt configuration changes. 378 */ 379 if (changed != 0) { 380 const struct ieee80211_tdma_state *ts = vap->iv_tdma; 381 382 ath_tdma_bintvalsetup(sc, ts); 383 if (changed & TDMA_UPDATE_SLOTLEN) 384 ath_wme_update(ic); 385 386 DPRINTF(sc, ATH_DEBUG_TDMA, 387 "%s: adopt slot %u slotcnt %u slotlen %u us " 388 "bintval %u TU\n", __func__, 389 ts->tdma_slot, ts->tdma_slotcnt, ts->tdma_slotlen, 390 sc->sc_tdmabintval); 391 392 /* XXX right? */ 393 ath_hal_intrset(ah, sc->sc_imask); 394 /* NB: beacon timers programmed below */ 395 } 396 397 /* extend rx timestamp to 64 bits */ 398 rs = sc->sc_lastrs; 399 tsf = ath_hal_gettsf64(ah); 400 rstamp = ath_extend_tsf(sc, rs->rs_tstamp, tsf); 401 /* 402 * The rx timestamp is set by the hardware on completing 403 * reception (at the point where the rx descriptor is DMA'd 404 * to the host). To find the start of our next slot we 405 * must adjust this time by the time required to send 406 * the packet just received. 407 */ 408 rix = rt->rateCodeToIndex[rs->rs_rate]; 409 410 /* 411 * To calculate the packet duration for legacy rates, we 412 * only need the rix and preamble. 413 * 414 * For 11n non-aggregate frames, we also need the channel 415 * width and short/long guard interval. 416 * 417 * For 11n aggregate frames, the required hacks are a little 418 * more subtle. You need to figure out the frame duration 419 * for each frame, including the delimiters. However, when 420 * a frame isn't received successfully, we won't hear it 421 * (unless you enable reception of CRC errored frames), so 422 * your duration calculation is going to be off. 423 * 424 * However, we can assume that the beacon frames won't be 425 * transmitted as aggregate frames, so we should be okay. 426 * Just add a check to ensure that we aren't handed something 427 * bad. 428 * 429 * For ath_hal_pkt_txtime() - for 11n rates, shortPreamble is 430 * actually short guard interval. For legacy rates, 431 * it's short preamble. 432 */ 433 txtime = ath_hal_pkt_txtime(ah, rt, rs->rs_datalen, 434 rix, 435 !! (rs->rs_flags & HAL_RX_2040), 436 (rix & 0x80) ? 437 (! (rs->rs_flags & HAL_RX_GI)) : rt->info[rix].shortPreamble); 438 /* NB: << 9 is to cvt to TU and /2 */ 439 nextslot = (rstamp - txtime) + (sc->sc_tdmabintval << 9); 440 441 /* 442 * For 802.11n chips: nextslottu needs to be the full TSF space, 443 * not just 0..65535 TU. 444 */ 445 nextslottu = TSF_TO_TU(nextslot>>32, nextslot); 446 /* 447 * Retrieve the hardware NextTBTT in usecs 448 * and calculate the difference between what the 449 * other station thinks and what we have programmed. This 450 * lets us figure how to adjust our timers to match. The 451 * adjustments are done by pulling the TSF forward and possibly 452 * rewriting the beacon timers. 453 */ 454 /* 455 * The logic here assumes the nexttbtt counter is in TSF 456 * but the prr-11n NICs are in TU. The HAL shifts them 457 * to TSF but there's two important differences: 458 * 459 * + The TU->TSF values have 0's for the low 9 bits, and 460 * + The counter wraps at TU_TO_TSF(HAL_BEACON_PERIOD + 1) for 461 * the pre-11n NICs, but not for the 11n NICs. 462 * 463 * So for now, just make sure the nexttbtt value we get 464 * matches the second issue or once nexttbtt exceeds this 465 * value, tsfdelta ends up becoming very negative and all 466 * of the adjustments get very messed up. 467 */ 468 469 /* 470 * We need to track the full nexttbtt rather than having it 471 * truncated at HAL_BEACON_PERIOD, as programming the 472 * nexttbtt (and related) registers for the 11n chips is 473 * actually going to take the full 32 bit space, rather than 474 * just 0..65535 TU. 475 */ 476 nexttbtt_full = ath_hal_getnexttbtt(ah); 477 nexttbtt = nexttbtt_full % (TU_TO_TSF(HAL_BEACON_PERIOD + 1)); 478 tsfdelta = (int32_t)((nextslot % TU_TO_TSF(HAL_BEACON_PERIOD + 1)) - nexttbtt); 479 480 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 481 "rs->rstamp %llu rstamp %llu tsf %llu txtime %d, nextslot %llu, " 482 "nextslottu %d, nextslottume %d\n", 483 (unsigned long long) rs->rs_tstamp, 484 (unsigned long long) rstamp, 485 (unsigned long long) tsf, txtime, 486 (unsigned long long) nextslot, 487 nextslottu, TSF_TO_TU(nextslot >> 32, nextslot)); 488 DPRINTF(sc, ATH_DEBUG_TDMA, 489 " beacon tstamp: %llu (0x%016llx)\n", 490 (unsigned long long) le64toh(ni->ni_tstamp.tsf), 491 (unsigned long long) le64toh(ni->ni_tstamp.tsf)); 492 493 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 494 "nexttbtt %llu (0x%08llx) tsfdelta %d avg +%d/-%d\n", 495 (unsigned long long) nexttbtt, 496 (long long) nexttbtt, 497 tsfdelta, 498 TDMA_AVG(sc->sc_avgtsfdeltap), TDMA_AVG(sc->sc_avgtsfdeltam)); 499 500 if (tsfdelta < 0) { 501 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0); 502 TDMA_SAMPLE(sc->sc_avgtsfdeltam, -tsfdelta); 503 tsfdelta = -tsfdelta % 1024; 504 nextslottu++; 505 } else if (tsfdelta > 0) { 506 TDMA_SAMPLE(sc->sc_avgtsfdeltap, tsfdelta); 507 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0); 508 tsfdelta = 1024 - (tsfdelta % 1024); 509 nextslottu++; 510 } else { 511 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0); 512 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0); 513 } 514 tudelta = nextslottu - TSF_TO_TU(nexttbtt_full >> 32, nexttbtt_full); 515 516 #ifdef ATH_DEBUG_ALQ 517 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE)) { 518 struct if_ath_alq_tdma_beacon_state t; 519 t.rx_tsf = htobe64(rstamp); 520 t.beacon_tsf = htobe64(le64toh(ni->ni_tstamp.tsf)); 521 t.tsf64 = htobe64(tsf); 522 t.nextslot_tsf = htobe64(nextslot); 523 t.nextslot_tu = htobe32(nextslottu); 524 t.txtime = htobe32(txtime); 525 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE, 526 sizeof(t), (char *) &t); 527 } 528 529 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC)) { 530 struct if_ath_alq_tdma_slot_calc t; 531 532 t.nexttbtt = htobe64(nexttbtt_full); 533 t.next_slot = htobe64(nextslot); 534 t.tsfdelta = htobe32(tsfdelta); 535 t.avg_plus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltap)); 536 t.avg_minus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltam)); 537 538 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC, 539 sizeof(t), (char *) &t); 540 } 541 #endif 542 543 /* 544 * Copy sender's timetstamp into tdma ie so they can 545 * calculate roundtrip time. We submit a beacon frame 546 * below after any timer adjustment. The frame goes out 547 * at the next TBTT so the sender can calculate the 548 * roundtrip by inspecting the tdma ie in our beacon frame. 549 * 550 * NB: This tstamp is subtlely preserved when 551 * IEEE80211_BEACON_TDMA is marked (e.g. when the 552 * slot position changes) because ieee80211_add_tdma 553 * skips over the data. 554 */ 555 memcpy(vap->iv_bcn_off.bo_tdma + 556 __offsetof(struct ieee80211_tdma_param, tdma_tstamp), 557 &ni->ni_tstamp.data, 8); 558 #if 0 559 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 560 "tsf %llu nextslot %llu (%d, %d) nextslottu %u nexttbtt %llu (%d)\n", 561 (unsigned long long) tsf, (unsigned long long) nextslot, 562 (int)(nextslot - tsf), tsfdelta, nextslottu, nexttbtt, tudelta); 563 #endif 564 /* 565 * Adjust the beacon timers only when pulling them forward 566 * or when going back by less than the beacon interval. 567 * Negative jumps larger than the beacon interval seem to 568 * cause the timers to stop and generally cause instability. 569 * This basically filters out jumps due to missed beacons. 570 */ 571 if (tudelta != 0 && (tudelta > 0 || -tudelta < sc->sc_tdmabintval)) { 572 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 573 "%s: calling ath_tdma_settimers; nextslottu=%d, bintval=%d\n", 574 __func__, 575 nextslottu, 576 sc->sc_tdmabintval); 577 ath_tdma_settimers(sc, nextslottu, sc->sc_tdmabintval); 578 sc->sc_stats.ast_tdma_timers++; 579 } 580 if (tsfdelta > 0) { 581 uint64_t tsf; 582 583 /* XXX should just teach ath_hal_adjusttsf() to do this */ 584 tsf = ath_hal_gettsf64(ah); 585 ath_hal_settsf64(ah, tsf + tsfdelta); 586 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 587 "%s: calling ath_hal_adjusttsf: TSF=%llu, tsfdelta=%d\n", 588 __func__, 589 (unsigned long long) tsf, 590 tsfdelta); 591 592 #ifdef ATH_DEBUG_ALQ 593 if (if_ath_alq_checkdebug(&sc->sc_alq, 594 ATH_ALQ_TDMA_TSF_ADJUST)) { 595 struct if_ath_alq_tdma_tsf_adjust t; 596 597 t.tsfdelta = htobe32(tsfdelta); 598 t.tsf64_old = htobe64(tsf); 599 t.tsf64_new = htobe64(tsf + tsfdelta); 600 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TSF_ADJUST, 601 sizeof(t), (char *) &t); 602 } 603 #endif /* ATH_DEBUG_ALQ */ 604 sc->sc_stats.ast_tdma_tsf++; 605 } 606 ath_tdma_beacon_send(sc, vap); /* prepare response */ 607 #undef TU_TO_TSF 608 #undef TSF_TO_TU 609 } 610 611 /* 612 * Transmit a beacon frame at SWBA. Dynamic updates 613 * to the frame contents are done as needed. 614 */ 615 void 616 ath_tdma_beacon_send(struct ath_softc *sc, struct ieee80211vap *vap) 617 { 618 struct ath_hal *ah = sc->sc_ah; 619 struct ath_buf *bf; 620 int otherant; 621 622 /* 623 * Check if the previous beacon has gone out. If 624 * not don't try to post another, skip this period 625 * and wait for the next. Missed beacons indicate 626 * a problem and should not occur. If we miss too 627 * many consecutive beacons reset the device. 628 */ 629 if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) { 630 sc->sc_bmisscount++; 631 DPRINTF(sc, ATH_DEBUG_BEACON, 632 "%s: missed %u consecutive beacons\n", 633 __func__, sc->sc_bmisscount); 634 if (sc->sc_bmisscount >= ath_bstuck_threshold) 635 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask); 636 return; 637 } 638 if (sc->sc_bmisscount != 0) { 639 DPRINTF(sc, ATH_DEBUG_BEACON, 640 "%s: resume beacon xmit after %u misses\n", 641 __func__, sc->sc_bmisscount); 642 sc->sc_bmisscount = 0; 643 } 644 645 /* 646 * Check recent per-antenna transmit statistics and flip 647 * the default antenna if noticeably more frames went out 648 * on the non-default antenna. 649 * XXX assumes 2 anntenae 650 */ 651 if (!sc->sc_diversity) { 652 otherant = sc->sc_defant & 1 ? 2 : 1; 653 if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2) 654 ath_setdefantenna(sc, otherant); 655 sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0; 656 } 657 658 bf = ath_beacon_generate(sc, vap); 659 /* XXX We don't do cabq traffic, but just for completeness .. */ 660 ATH_TXQ_LOCK(sc->sc_cabq); 661 ath_beacon_cabq_start(sc); 662 ATH_TXQ_UNLOCK(sc->sc_cabq); 663 664 if (bf != NULL) { 665 /* 666 * Stop any current dma and put the new frame on the queue. 667 * This should never fail since we check above that no frames 668 * are still pending on the queue. 669 */ 670 if ((! sc->sc_isedma) && 671 (! ath_hal_stoptxdma(ah, sc->sc_bhalq))) { 672 DPRINTF(sc, ATH_DEBUG_ANY, 673 "%s: beacon queue %u did not stop?\n", 674 __func__, sc->sc_bhalq); 675 /* NB: the HAL still stops DMA, so proceed */ 676 } 677 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr); 678 ath_hal_txstart(ah, sc->sc_bhalq); 679 680 sc->sc_stats.ast_be_xmit++; /* XXX per-vap? */ 681 682 /* 683 * Record local TSF for our last send for use 684 * in arbitrating slot collisions. 685 */ 686 /* XXX should take a locked ref to iv_bss */ 687 vap->iv_bss->ni_tstamp.tsf = ath_hal_gettsf64(ah); 688 } 689 } 690 #endif /* IEEE80211_SUPPORT_TDMA */ 691