1 /*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTABILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 /* 34 * Driver for the Atheros Wireless LAN controller. 35 * 36 * This software is derived from work of Atsushi Onoe; his contribution 37 * is greatly appreciated. 38 */ 39 40 #include "opt_inet.h" 41 #include "opt_ath.h" 42 /* 43 * This is needed for register operations which are performed 44 * by the driver - eg, calls to ath_hal_gettsf32(). 45 * 46 * It's also required for any AH_DEBUG checks in here, eg the 47 * module dependencies. 48 */ 49 #include "opt_ah.h" 50 #include "opt_wlan.h" 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/sysctl.h> 55 #include <sys/mbuf.h> 56 #include <sys/malloc.h> 57 #include <sys/lock.h> 58 #include <sys/kernel.h> 59 #include <sys/socket.h> 60 #include <sys/sockio.h> 61 #include <sys/errno.h> 62 #include <sys/callout.h> 63 #include <sys/bus.h> 64 #include <sys/endian.h> 65 #include <sys/kthread.h> 66 #include <sys/taskqueue.h> 67 #include <sys/priv.h> 68 #include <sys/module.h> 69 #include <sys/ktr.h> 70 71 #if defined(__DragonFly__) 72 /* empty */ 73 #else 74 #include <sys/smp.h> 75 #include <machine/bus.h> 76 #endif 77 78 #include <net/if.h> 79 #include <net/if_var.h> 80 #include <net/if_dl.h> 81 #include <net/if_media.h> 82 #include <net/if_types.h> 83 #include <net/if_arp.h> 84 #include <net/ethernet.h> 85 #include <net/if_llc.h> 86 87 #include <netproto/802_11/ieee80211_var.h> 88 #include <netproto/802_11/ieee80211_regdomain.h> 89 #ifdef IEEE80211_SUPPORT_SUPERG 90 #include <netproto/802_11/ieee80211_superg.h> 91 #endif 92 #ifdef IEEE80211_SUPPORT_TDMA 93 #include <netproto/802_11/ieee80211_tdma.h> 94 #endif 95 96 #include <net/bpf.h> 97 98 #ifdef INET 99 #include <netinet/in.h> 100 #include <netinet/if_ether.h> 101 #endif 102 103 #include <dev/netif/ath/ath/if_athvar.h> 104 #include <dev/netif/ath/ath_hal/ah_devid.h> /* XXX for softled */ 105 #include <dev/netif/ath/ath_hal/ah_diagcodes.h> 106 107 #include <dev/netif/ath/ath/if_ath_debug.h> 108 #include <dev/netif/ath/ath/if_ath_misc.h> 109 #include <dev/netif/ath/ath/if_ath_tsf.h> 110 #include <dev/netif/ath/ath/if_ath_tx.h> 111 #include <dev/netif/ath/ath/if_ath_sysctl.h> 112 #include <dev/netif/ath/ath/if_ath_led.h> 113 #include <dev/netif/ath/ath/if_ath_keycache.h> 114 #include <dev/netif/ath/ath/if_ath_rx.h> 115 #include <dev/netif/ath/ath/if_ath_beacon.h> 116 #include <dev/netif/ath/ath/if_athdfs.h> 117 118 #ifdef ATH_TX99_DIAG 119 #include <dev/netif/ath/ath_tx99/ath_tx99.h> 120 #endif 121 122 #ifdef ATH_DEBUG_ALQ 123 #include <dev/netif/ath/ath/if_ath_alq.h> 124 #endif 125 126 #ifdef IEEE80211_SUPPORT_TDMA 127 #include <dev/netif/ath/ath/if_ath_tdma.h> 128 129 static void ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt, 130 u_int32_t bintval); 131 static void ath_tdma_bintvalsetup(struct ath_softc *sc, 132 const struct ieee80211_tdma_state *tdma); 133 #endif /* IEEE80211_SUPPORT_TDMA */ 134 135 #ifdef IEEE80211_SUPPORT_TDMA 136 static void 137 ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt, u_int32_t bintval) 138 { 139 struct ath_hal *ah = sc->sc_ah; 140 HAL_BEACON_TIMERS bt; 141 142 bt.bt_intval = bintval | HAL_BEACON_ENA; 143 bt.bt_nexttbtt = nexttbtt; 144 bt.bt_nextdba = (nexttbtt<<3) - sc->sc_tdmadbaprep; 145 bt.bt_nextswba = (nexttbtt<<3) - sc->sc_tdmaswbaprep; 146 bt.bt_nextatim = nexttbtt+1; 147 /* Enables TBTT, DBA, SWBA timers by default */ 148 bt.bt_flags = 0; 149 #if 0 150 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 151 "%s: intval=%d (0x%08x) nexttbtt=%u (0x%08x), nextdba=%u (0x%08x), nextswba=%u (0x%08x),nextatim=%u (0x%08x)\n", 152 __func__, 153 bt.bt_intval, 154 bt.bt_intval, 155 bt.bt_nexttbtt, 156 bt.bt_nexttbtt, 157 bt.bt_nextdba, 158 bt.bt_nextdba, 159 bt.bt_nextswba, 160 bt.bt_nextswba, 161 bt.bt_nextatim, 162 bt.bt_nextatim); 163 #endif 164 165 #ifdef ATH_DEBUG_ALQ 166 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET)) { 167 struct if_ath_alq_tdma_timer_set t; 168 t.bt_intval = htobe32(bt.bt_intval); 169 t.bt_nexttbtt = htobe32(bt.bt_nexttbtt); 170 t.bt_nextdba = htobe32(bt.bt_nextdba); 171 t.bt_nextswba = htobe32(bt.bt_nextswba); 172 t.bt_nextatim = htobe32(bt.bt_nextatim); 173 t.bt_flags = htobe32(bt.bt_flags); 174 t.sc_tdmadbaprep = htobe32(sc->sc_tdmadbaprep); 175 t.sc_tdmaswbaprep = htobe32(sc->sc_tdmaswbaprep); 176 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET, 177 sizeof(t), (char *) &t); 178 } 179 #endif 180 181 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 182 "%s: nexttbtt=%u (0x%08x), nexttbtt tsf=%lld (0x%08llx)\n", 183 __func__, 184 bt.bt_nexttbtt, 185 bt.bt_nexttbtt, 186 (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10), 187 (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10)); 188 ath_hal_beaconsettimers(ah, &bt); 189 } 190 191 /* 192 * Calculate the beacon interval. This is periodic in the 193 * superframe for the bss. We assume each station is configured 194 * identically wrt transmit rate so the guard time we calculate 195 * above will be the same on all stations. Note we need to 196 * factor in the xmit time because the hardware will schedule 197 * a frame for transmit if the start of the frame is within 198 * the burst time. When we get hardware that properly kills 199 * frames in the PCU we can reduce/eliminate the guard time. 200 * 201 * Roundup to 1024 is so we have 1 TU buffer in the guard time 202 * to deal with the granularity of the nexttbtt timer. 11n MAC's 203 * with 1us timer granularity should allow us to reduce/eliminate 204 * this. 205 */ 206 static void 207 ath_tdma_bintvalsetup(struct ath_softc *sc, 208 const struct ieee80211_tdma_state *tdma) 209 { 210 /* copy from vap state (XXX check all vaps have same value?) */ 211 sc->sc_tdmaslotlen = tdma->tdma_slotlen; 212 213 sc->sc_tdmabintval = roundup((sc->sc_tdmaslotlen+sc->sc_tdmaguard) * 214 tdma->tdma_slotcnt, 1024); 215 sc->sc_tdmabintval >>= 10; /* TSF -> TU */ 216 if (sc->sc_tdmabintval & 1) 217 sc->sc_tdmabintval++; 218 219 if (tdma->tdma_slot == 0) { 220 /* 221 * Only slot 0 beacons; other slots respond. 222 */ 223 sc->sc_imask |= HAL_INT_SWBA; 224 sc->sc_tdmaswba = 0; /* beacon immediately */ 225 } else { 226 /* XXX all vaps must be slot 0 or slot !0 */ 227 sc->sc_imask &= ~HAL_INT_SWBA; 228 } 229 } 230 231 /* 232 * Max 802.11 overhead. This assumes no 4-address frames and 233 * the encapsulation done by ieee80211_encap (llc). We also 234 * include potential crypto overhead. 235 */ 236 #define IEEE80211_MAXOVERHEAD \ 237 (sizeof(struct ieee80211_qosframe) \ 238 + sizeof(struct llc) \ 239 + IEEE80211_ADDR_LEN \ 240 + IEEE80211_WEP_IVLEN \ 241 + IEEE80211_WEP_KIDLEN \ 242 + IEEE80211_WEP_CRCLEN \ 243 + IEEE80211_WEP_MICLEN \ 244 + IEEE80211_CRC_LEN) 245 246 /* 247 * Setup initially for tdma operation. Start the beacon 248 * timers and enable SWBA if we are slot 0. Otherwise 249 * we wait for slot 0 to arrive so we can sync up before 250 * starting to transmit. 251 */ 252 void 253 ath_tdma_config(struct ath_softc *sc, struct ieee80211vap *vap) 254 { 255 struct ath_hal *ah = sc->sc_ah; 256 struct ieee80211com *ic = &sc->sc_ic; 257 const struct ieee80211_txparam *tp; 258 const struct ieee80211_tdma_state *tdma = NULL; 259 int rix; 260 261 if (vap == NULL) { 262 vap = TAILQ_FIRST(&ic->ic_vaps); /* XXX */ 263 if (vap == NULL) { 264 device_printf(sc->sc_dev, "%s: no vaps?\n", __func__); 265 return; 266 } 267 } 268 /* XXX should take a locked ref to iv_bss */ 269 tp = vap->iv_bss->ni_txparms; 270 /* 271 * Calculate the guard time for each slot. This is the 272 * time to send a maximal-size frame according to the 273 * fixed/lowest transmit rate. Note that the interface 274 * mtu does not include the 802.11 overhead so we must 275 * tack that on (ath_hal_computetxtime includes the 276 * preamble and plcp in it's calculation). 277 */ 278 tdma = vap->iv_tdma; 279 if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 280 rix = ath_tx_findrix(sc, tp->ucastrate); 281 else 282 rix = ath_tx_findrix(sc, tp->mcastrate); 283 284 /* 285 * If the chip supports enforcing TxOP on transmission, 286 * we can just delete the guard window. It isn't at all required. 287 */ 288 if (sc->sc_hasenforcetxop) { 289 sc->sc_tdmaguard = 0; 290 } else { 291 /* XXX short preamble assumed */ 292 /* XXX non-11n rate assumed */ 293 sc->sc_tdmaguard = ath_hal_computetxtime(ah, sc->sc_currates, 294 vap->iv_ifp->if_mtu + IEEE80211_MAXOVERHEAD, rix, AH_TRUE); 295 } 296 297 ath_hal_intrset(ah, 0); 298 299 ath_beaconq_config(sc); /* setup h/w beacon q */ 300 if (sc->sc_setcca) 301 ath_hal_setcca(ah, AH_FALSE); /* disable CCA */ 302 ath_tdma_bintvalsetup(sc, tdma); /* calculate beacon interval */ 303 ath_tdma_settimers(sc, sc->sc_tdmabintval, 304 sc->sc_tdmabintval | HAL_BEACON_RESET_TSF); 305 sc->sc_syncbeacon = 0; 306 307 sc->sc_avgtsfdeltap = TDMA_DUMMY_MARKER; 308 sc->sc_avgtsfdeltam = TDMA_DUMMY_MARKER; 309 310 ath_hal_intrset(ah, sc->sc_imask); 311 312 DPRINTF(sc, ATH_DEBUG_TDMA, "%s: slot %u len %uus cnt %u " 313 "bsched %u guard %uus bintval %u TU dba prep %u\n", __func__, 314 tdma->tdma_slot, tdma->tdma_slotlen, tdma->tdma_slotcnt, 315 tdma->tdma_bintval, sc->sc_tdmaguard, sc->sc_tdmabintval, 316 sc->sc_tdmadbaprep); 317 318 #ifdef ATH_DEBUG_ALQ 319 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG)) { 320 struct if_ath_alq_tdma_timer_config t; 321 322 t.tdma_slot = htobe32(tdma->tdma_slot); 323 t.tdma_slotlen = htobe32(tdma->tdma_slotlen); 324 t.tdma_slotcnt = htobe32(tdma->tdma_slotcnt); 325 t.tdma_bintval = htobe32(tdma->tdma_bintval); 326 t.tdma_guard = htobe32(sc->sc_tdmaguard); 327 t.tdma_scbintval = htobe32(sc->sc_tdmabintval); 328 t.tdma_dbaprep = htobe32(sc->sc_tdmadbaprep); 329 330 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG, 331 sizeof(t), (char *) &t); 332 } 333 #endif /* ATH_DEBUG_ALQ */ 334 } 335 336 /* 337 * Update tdma operation. Called from the 802.11 layer 338 * when a beacon is received from the TDMA station operating 339 * in the slot immediately preceding us in the bss. Use 340 * the rx timestamp for the beacon frame to update our 341 * beacon timers so we follow their schedule. Note that 342 * by using the rx timestamp we implicitly include the 343 * propagation delay in our schedule. 344 * 345 * XXX TODO: since the changes for the AR5416 and later chips 346 * involved changing the TSF/TU calculations, we need to make 347 * sure that various calculations wrap consistently. 348 * 349 * A lot of the problems stemmed from the calculations wrapping 350 * at 65,535 TU. Since a lot of the math is still being done in 351 * TU, please audit it to ensure that when the TU values programmed 352 * into the timers wrap at (2^31)-1 TSF, all the various terms 353 * wrap consistently. 354 */ 355 void 356 ath_tdma_update(struct ieee80211_node *ni, 357 const struct ieee80211_tdma_param *tdma, int changed) 358 { 359 #define TSF_TO_TU(_h,_l) \ 360 ((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10)) 361 #define TU_TO_TSF(_tu) (((u_int64_t)(_tu)) << 10) 362 struct ieee80211vap *vap = ni->ni_vap; 363 struct ieee80211com *ic = ni->ni_ic; 364 struct ath_softc *sc = ic->ic_softc; 365 struct ath_hal *ah = sc->sc_ah; 366 const HAL_RATE_TABLE *rt = sc->sc_currates; 367 u_int64_t tsf, rstamp, nextslot, nexttbtt, nexttbtt_full; 368 u_int32_t txtime, nextslottu; 369 int32_t tudelta, tsfdelta; 370 const struct ath_rx_status *rs; 371 int rix; 372 373 sc->sc_stats.ast_tdma_update++; 374 375 /* 376 * Check for and adopt configuration changes. 377 */ 378 if (changed != 0) { 379 const struct ieee80211_tdma_state *ts = vap->iv_tdma; 380 381 ath_tdma_bintvalsetup(sc, ts); 382 if (changed & TDMA_UPDATE_SLOTLEN) 383 ath_wme_update(ic); 384 385 DPRINTF(sc, ATH_DEBUG_TDMA, 386 "%s: adopt slot %u slotcnt %u slotlen %u us " 387 "bintval %u TU\n", __func__, 388 ts->tdma_slot, ts->tdma_slotcnt, ts->tdma_slotlen, 389 sc->sc_tdmabintval); 390 391 /* XXX right? */ 392 ath_hal_intrset(ah, sc->sc_imask); 393 /* NB: beacon timers programmed below */ 394 } 395 396 /* extend rx timestamp to 64 bits */ 397 rs = sc->sc_lastrs; 398 tsf = ath_hal_gettsf64(ah); 399 rstamp = ath_extend_tsf(sc, rs->rs_tstamp, tsf); 400 /* 401 * The rx timestamp is set by the hardware on completing 402 * reception (at the point where the rx descriptor is DMA'd 403 * to the host). To find the start of our next slot we 404 * must adjust this time by the time required to send 405 * the packet just received. 406 */ 407 rix = rt->rateCodeToIndex[rs->rs_rate]; 408 409 /* 410 * To calculate the packet duration for legacy rates, we 411 * only need the rix and preamble. 412 * 413 * For 11n non-aggregate frames, we also need the channel 414 * width and short/long guard interval. 415 * 416 * For 11n aggregate frames, the required hacks are a little 417 * more subtle. You need to figure out the frame duration 418 * for each frame, including the delimiters. However, when 419 * a frame isn't received successfully, we won't hear it 420 * (unless you enable reception of CRC errored frames), so 421 * your duration calculation is going to be off. 422 * 423 * However, we can assume that the beacon frames won't be 424 * transmitted as aggregate frames, so we should be okay. 425 * Just add a check to ensure that we aren't handed something 426 * bad. 427 * 428 * For ath_hal_pkt_txtime() - for 11n rates, shortPreamble is 429 * actually short guard interval. For legacy rates, 430 * it's short preamble. 431 */ 432 txtime = ath_hal_pkt_txtime(ah, rt, rs->rs_datalen, 433 rix, 434 !! (rs->rs_flags & HAL_RX_2040), 435 (rix & 0x80) ? 436 (! (rs->rs_flags & HAL_RX_GI)) : rt->info[rix].shortPreamble); 437 /* NB: << 9 is to cvt to TU and /2 */ 438 nextslot = (rstamp - txtime) + (sc->sc_tdmabintval << 9); 439 440 /* 441 * For 802.11n chips: nextslottu needs to be the full TSF space, 442 * not just 0..65535 TU. 443 */ 444 nextslottu = TSF_TO_TU(nextslot>>32, nextslot); 445 /* 446 * Retrieve the hardware NextTBTT in usecs 447 * and calculate the difference between what the 448 * other station thinks and what we have programmed. This 449 * lets us figure how to adjust our timers to match. The 450 * adjustments are done by pulling the TSF forward and possibly 451 * rewriting the beacon timers. 452 */ 453 /* 454 * The logic here assumes the nexttbtt counter is in TSF 455 * but the prr-11n NICs are in TU. The HAL shifts them 456 * to TSF but there's two important differences: 457 * 458 * + The TU->TSF values have 0's for the low 9 bits, and 459 * + The counter wraps at TU_TO_TSF(HAL_BEACON_PERIOD + 1) for 460 * the pre-11n NICs, but not for the 11n NICs. 461 * 462 * So for now, just make sure the nexttbtt value we get 463 * matches the second issue or once nexttbtt exceeds this 464 * value, tsfdelta ends up becoming very negative and all 465 * of the adjustments get very messed up. 466 */ 467 468 /* 469 * We need to track the full nexttbtt rather than having it 470 * truncated at HAL_BEACON_PERIOD, as programming the 471 * nexttbtt (and related) registers for the 11n chips is 472 * actually going to take the full 32 bit space, rather than 473 * just 0..65535 TU. 474 */ 475 nexttbtt_full = ath_hal_getnexttbtt(ah); 476 nexttbtt = nexttbtt_full % (TU_TO_TSF(HAL_BEACON_PERIOD + 1)); 477 tsfdelta = (int32_t)((nextslot % TU_TO_TSF(HAL_BEACON_PERIOD + 1)) - nexttbtt); 478 479 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 480 "rs->rstamp %llu rstamp %llu tsf %llu txtime %d, nextslot %llu, " 481 "nextslottu %d, nextslottume %d\n", 482 (unsigned long long) rs->rs_tstamp, 483 (unsigned long long) rstamp, 484 (unsigned long long) tsf, txtime, 485 (unsigned long long) nextslot, 486 nextslottu, TSF_TO_TU(nextslot >> 32, nextslot)); 487 DPRINTF(sc, ATH_DEBUG_TDMA, 488 " beacon tstamp: %llu (0x%016llx)\n", 489 (unsigned long long) le64toh(ni->ni_tstamp.tsf), 490 (unsigned long long) le64toh(ni->ni_tstamp.tsf)); 491 492 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 493 "nexttbtt %llu (0x%08llx) tsfdelta %d avg +%d/-%d\n", 494 (unsigned long long) nexttbtt, 495 (long long) nexttbtt, 496 tsfdelta, 497 TDMA_AVG(sc->sc_avgtsfdeltap), TDMA_AVG(sc->sc_avgtsfdeltam)); 498 499 if (tsfdelta < 0) { 500 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0); 501 TDMA_SAMPLE(sc->sc_avgtsfdeltam, -tsfdelta); 502 tsfdelta = -tsfdelta % 1024; 503 nextslottu++; 504 } else if (tsfdelta > 0) { 505 TDMA_SAMPLE(sc->sc_avgtsfdeltap, tsfdelta); 506 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0); 507 tsfdelta = 1024 - (tsfdelta % 1024); 508 nextslottu++; 509 } else { 510 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0); 511 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0); 512 } 513 tudelta = nextslottu - TSF_TO_TU(nexttbtt_full >> 32, nexttbtt_full); 514 515 #ifdef ATH_DEBUG_ALQ 516 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE)) { 517 struct if_ath_alq_tdma_beacon_state t; 518 t.rx_tsf = htobe64(rstamp); 519 t.beacon_tsf = htobe64(le64toh(ni->ni_tstamp.tsf)); 520 t.tsf64 = htobe64(tsf); 521 t.nextslot_tsf = htobe64(nextslot); 522 t.nextslot_tu = htobe32(nextslottu); 523 t.txtime = htobe32(txtime); 524 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE, 525 sizeof(t), (char *) &t); 526 } 527 528 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC)) { 529 struct if_ath_alq_tdma_slot_calc t; 530 531 t.nexttbtt = htobe64(nexttbtt_full); 532 t.next_slot = htobe64(nextslot); 533 t.tsfdelta = htobe32(tsfdelta); 534 t.avg_plus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltap)); 535 t.avg_minus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltam)); 536 537 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC, 538 sizeof(t), (char *) &t); 539 } 540 #endif 541 542 /* 543 * Copy sender's timetstamp into tdma ie so they can 544 * calculate roundtrip time. We submit a beacon frame 545 * below after any timer adjustment. The frame goes out 546 * at the next TBTT so the sender can calculate the 547 * roundtrip by inspecting the tdma ie in our beacon frame. 548 * 549 * NB: This tstamp is subtlely preserved when 550 * IEEE80211_BEACON_TDMA is marked (e.g. when the 551 * slot position changes) because ieee80211_add_tdma 552 * skips over the data. 553 */ 554 memcpy(vap->iv_bcn_off.bo_tdma + 555 __offsetof(struct ieee80211_tdma_param, tdma_tstamp), 556 &ni->ni_tstamp.data, 8); 557 #if 0 558 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 559 "tsf %llu nextslot %llu (%d, %d) nextslottu %u nexttbtt %llu (%d)\n", 560 (unsigned long long) tsf, (unsigned long long) nextslot, 561 (int)(nextslot - tsf), tsfdelta, nextslottu, nexttbtt, tudelta); 562 #endif 563 /* 564 * Adjust the beacon timers only when pulling them forward 565 * or when going back by less than the beacon interval. 566 * Negative jumps larger than the beacon interval seem to 567 * cause the timers to stop and generally cause instability. 568 * This basically filters out jumps due to missed beacons. 569 */ 570 if (tudelta != 0 && (tudelta > 0 || -tudelta < sc->sc_tdmabintval)) { 571 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 572 "%s: calling ath_tdma_settimers; nextslottu=%d, bintval=%d\n", 573 __func__, 574 nextslottu, 575 sc->sc_tdmabintval); 576 ath_tdma_settimers(sc, nextslottu, sc->sc_tdmabintval); 577 sc->sc_stats.ast_tdma_timers++; 578 } 579 if (tsfdelta > 0) { 580 uint64_t tsf; 581 582 /* XXX should just teach ath_hal_adjusttsf() to do this */ 583 tsf = ath_hal_gettsf64(ah); 584 ath_hal_settsf64(ah, tsf + tsfdelta); 585 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 586 "%s: calling ath_hal_adjusttsf: TSF=%llu, tsfdelta=%d\n", 587 __func__, 588 (unsigned long long) tsf, 589 tsfdelta); 590 591 #ifdef ATH_DEBUG_ALQ 592 if (if_ath_alq_checkdebug(&sc->sc_alq, 593 ATH_ALQ_TDMA_TSF_ADJUST)) { 594 struct if_ath_alq_tdma_tsf_adjust t; 595 596 t.tsfdelta = htobe32(tsfdelta); 597 t.tsf64_old = htobe64(tsf); 598 t.tsf64_new = htobe64(tsf + tsfdelta); 599 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TSF_ADJUST, 600 sizeof(t), (char *) &t); 601 } 602 #endif /* ATH_DEBUG_ALQ */ 603 sc->sc_stats.ast_tdma_tsf++; 604 } 605 ath_tdma_beacon_send(sc, vap); /* prepare response */ 606 #undef TU_TO_TSF 607 #undef TSF_TO_TU 608 } 609 610 /* 611 * Transmit a beacon frame at SWBA. Dynamic updates 612 * to the frame contents are done as needed. 613 */ 614 void 615 ath_tdma_beacon_send(struct ath_softc *sc, struct ieee80211vap *vap) 616 { 617 struct ath_hal *ah = sc->sc_ah; 618 struct ath_buf *bf; 619 int otherant; 620 621 /* 622 * Check if the previous beacon has gone out. If 623 * not don't try to post another, skip this period 624 * and wait for the next. Missed beacons indicate 625 * a problem and should not occur. If we miss too 626 * many consecutive beacons reset the device. 627 */ 628 if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) { 629 sc->sc_bmisscount++; 630 DPRINTF(sc, ATH_DEBUG_BEACON, 631 "%s: missed %u consecutive beacons\n", 632 __func__, sc->sc_bmisscount); 633 if (sc->sc_bmisscount >= ath_bstuck_threshold) 634 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask); 635 return; 636 } 637 if (sc->sc_bmisscount != 0) { 638 DPRINTF(sc, ATH_DEBUG_BEACON, 639 "%s: resume beacon xmit after %u misses\n", 640 __func__, sc->sc_bmisscount); 641 sc->sc_bmisscount = 0; 642 } 643 644 /* 645 * Check recent per-antenna transmit statistics and flip 646 * the default antenna if noticeably more frames went out 647 * on the non-default antenna. 648 * XXX assumes 2 anntenae 649 */ 650 if (!sc->sc_diversity) { 651 otherant = sc->sc_defant & 1 ? 2 : 1; 652 if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2) 653 ath_setdefantenna(sc, otherant); 654 sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0; 655 } 656 657 bf = ath_beacon_generate(sc, vap); 658 /* XXX We don't do cabq traffic, but just for completeness .. */ 659 ATH_TXQ_LOCK(sc->sc_cabq); 660 ath_beacon_cabq_start(sc); 661 ATH_TXQ_UNLOCK(sc->sc_cabq); 662 663 if (bf != NULL) { 664 /* 665 * Stop any current dma and put the new frame on the queue. 666 * This should never fail since we check above that no frames 667 * are still pending on the queue. 668 */ 669 if ((! sc->sc_isedma) && 670 (! ath_hal_stoptxdma(ah, sc->sc_bhalq))) { 671 DPRINTF(sc, ATH_DEBUG_ANY, 672 "%s: beacon queue %u did not stop?\n", 673 __func__, sc->sc_bhalq); 674 /* NB: the HAL still stops DMA, so proceed */ 675 } 676 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr); 677 ath_hal_txstart(ah, sc->sc_bhalq); 678 679 sc->sc_stats.ast_be_xmit++; /* XXX per-vap? */ 680 681 /* 682 * Record local TSF for our last send for use 683 * in arbitrating slot collisions. 684 */ 685 /* XXX should take a locked ref to iv_bss */ 686 vap->iv_bss->ni_tstamp.tsf = ath_hal_gettsf64(ah); 687 } 688 } 689 #endif /* IEEE80211_SUPPORT_TDMA */ 690