1 /*- 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 * $FreeBSD$ 30 */ 31 #include "opt_ath.h" 32 #include "opt_inet.h" 33 #include "opt_wlan.h" 34 #include "opt_ah.h" 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/module.h> 40 #include <sys/sysctl.h> 41 #include <sys/bus.h> 42 #include <sys/malloc.h> 43 #include <sys/proc.h> 44 #include <sys/lock.h> 45 #include <sys/mutex.h> 46 47 #include <machine/stdarg.h> 48 49 #include <net/if.h> 50 #include <net/if_var.h> 51 #include <net/if_media.h> 52 #include <net/if_arp.h> 53 #include <net/ethernet.h> /* XXX for ether_sprintf */ 54 55 #include <netproto/802_11/ieee80211_var.h> 56 57 #include <dev/netif/ath/ath_hal/ah.h> 58 #include <dev/netif/ath/ath_hal/ah_debug.h> 59 60 /* 61 * WiSoC boards overload the bus tag with information about the 62 * board layout. We must extract the bus space tag from that 63 * indirect structure. For everyone else the tag is passed in 64 * directly. 65 * XXX cache indirect ref privately 66 */ 67 #ifdef AH_SUPPORT_AR5312 68 #define BUSTAG(ah) \ 69 ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag) 70 #else 71 #define BUSTAG(ah) ((ah)->ah_st) 72 #endif 73 74 /* 75 * This lock is used to seralise register access for chips which have 76 * problems w/ SMP CPUs issuing concurrent PCI transactions. 77 * 78 * XXX This is a global lock for now; it should be pushed to 79 * a per-device lock in some platform-independent fashion. 80 */ 81 struct spinlock ah_regser_spin = SPINLOCK_INITIALIZER(ah_regser_spin); 82 83 extern void ath_hal_printf(struct ath_hal *, const char*, ...) 84 __printflike(2,3); 85 extern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list) 86 __printflike(2, 0); 87 extern const char* ath_hal_ether_sprintf(const u_int8_t *mac); 88 extern void *ath_hal_malloc(size_t); 89 extern void ath_hal_free(void *); 90 #ifdef AH_ASSERT 91 extern void ath_hal_assert_failed(const char* filename, 92 int lineno, const char* msg); 93 #endif 94 #ifdef AH_DEBUG 95 extern void DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...) 96 __printflike(3, 4); 97 #endif /* AH_DEBUG */ 98 99 /* NB: put this here instead of the driver to avoid circular references */ 100 SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters"); 101 static SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, 102 "Atheros HAL parameters"); 103 104 #ifdef AH_DEBUG 105 int ath_hal_debug = 0; 106 SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug, 107 0, "Atheros HAL debugging printfs"); 108 TUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug); 109 #endif /* AH_DEBUG */ 110 111 static MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data"); 112 113 void* 114 ath_hal_malloc(size_t size) 115 { 116 return kmalloc(size, M_ATH_HAL, M_INTWAIT | M_ZERO); 117 } 118 119 void 120 ath_hal_free(void* p) 121 { 122 kfree(p, M_ATH_HAL); 123 } 124 125 void 126 ath_hal_vprintf(struct ath_hal *ah, const char* fmt, __va_list ap) 127 { 128 kvprintf(fmt, ap); 129 } 130 131 void 132 ath_hal_printf(struct ath_hal *ah, const char* fmt, ...) 133 { 134 __va_list ap; 135 __va_start(ap, fmt); 136 ath_hal_vprintf(ah, fmt, ap); 137 __va_end(ap); 138 } 139 140 const char* 141 ath_hal_ether_sprintf(const u_int8_t *mac) 142 { 143 static char etherbuf[ETHER_ADDRSTRLEN + 1]; 144 145 kether_ntoa(mac, etherbuf); 146 147 return etherbuf; 148 } 149 150 #ifdef AH_DEBUG 151 152 /* 153 * XXX This is highly relevant only for the AR5416 and later 154 * PCI/PCIe NICs. It'll need adjustment for other hardware 155 * variations. 156 */ 157 static int 158 ath_hal_reg_whilst_asleep(struct ath_hal *ah, uint32_t reg) 159 { 160 161 if (reg >= 0x4000 && reg < 0x5000) 162 return (1); 163 if (reg >= 0x6000 && reg < 0x7000) 164 return (1); 165 if (reg >= 0x7000 && reg < 0x8000) 166 return (1); 167 return (0); 168 } 169 170 void 171 DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...) 172 { 173 if ((mask == HAL_DEBUG_UNMASKABLE) || 174 (ah != NULL && ah->ah_config.ah_debug & mask) || 175 (ath_hal_debug & mask)) { 176 __va_list ap; 177 __va_start(ap, fmt); 178 ath_hal_vprintf(ah, fmt, ap); 179 __va_end(ap); 180 } 181 } 182 #undef HAL_DEBUG_UNMASKABLE 183 #endif /* AH_DEBUG */ 184 185 #ifdef AH_DEBUG_ALQ 186 /* 187 * ALQ register tracing support. 188 * 189 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and 190 * writes to the file /tmp/ath_hal.log. The file format is a simple 191 * fixed-size array of records. When done logging set hw.ath.hal.alq=0 192 * and then decode the file with the arcode program (that is part of the 193 * HAL). If you start+stop tracing the data will be appended to an 194 * existing file. 195 * 196 * NB: doesn't handle multiple devices properly; only one DEVICE record 197 * is emitted and the different devices are not identified. 198 */ 199 #include <sys/alq.h> 200 #include <dev/netif/ath/ath_hal/ah_decode.h> 201 202 static struct alq *ath_hal_alq; 203 static int ath_hal_alq_emitdev; /* need to emit DEVICE record */ 204 static u_int ath_hal_alq_lost; /* count of lost records */ 205 static char ath_hal_logfile[MAXPATHLEN] = "/tmp/ath_hal.log"; 206 207 SYSCTL_STRING(_hw_ath_hal, OID_AUTO, alq_logfile, CTLFLAG_RW, 208 &ath_hal_logfile, sizeof(kernelname), "Name of ALQ logfile"); 209 210 static u_int ath_hal_alq_qsize = 64*1024; 211 212 static int 213 ath_hal_setlogging(int enable) 214 { 215 int error; 216 217 if (enable) { 218 error = alq_open(&ath_hal_alq, ath_hal_logfile, 219 curthread->td_ucred, ALQ_DEFAULT_CMODE, 220 sizeof (struct athregrec), ath_hal_alq_qsize); 221 ath_hal_alq_lost = 0; 222 ath_hal_alq_emitdev = 1; 223 kprintf("ath_hal: logging to %s enabled\n", 224 ath_hal_logfile); 225 } else { 226 if (ath_hal_alq) 227 alq_close(ath_hal_alq); 228 ath_hal_alq = NULL; 229 kprintf("ath_hal: logging disabled\n"); 230 error = 0; 231 } 232 return (error); 233 } 234 235 static int 236 sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS) 237 { 238 int error, enable; 239 240 enable = (ath_hal_alq != NULL); 241 error = sysctl_handle_int(oidp, &enable, 0, req); 242 if (error || !req->newptr) 243 return (error); 244 else 245 return (ath_hal_setlogging(enable)); 246 } 247 SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW, 248 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging"); 249 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW, 250 &ath_hal_alq_qsize, 0, "In-memory log size (#records)"); 251 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW, 252 &ath_hal_alq_lost, 0, "Register operations not logged"); 253 254 static struct ale * 255 ath_hal_alq_get(struct ath_hal *ah) 256 { 257 struct ale *ale; 258 259 if (ath_hal_alq_emitdev) { 260 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 261 if (ale) { 262 struct athregrec *r = 263 (struct athregrec *) ale->ae_data; 264 r->op = OP_DEVICE; 265 r->reg = 0; 266 r->val = ah->ah_devid; 267 alq_post(ath_hal_alq, ale); 268 ath_hal_alq_emitdev = 0; 269 } else 270 ath_hal_alq_lost++; 271 } 272 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 273 if (!ale) 274 ath_hal_alq_lost++; 275 return ale; 276 } 277 278 void 279 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 280 { 281 bus_space_tag_t tag = BUSTAG(ah); 282 bus_space_handle_t h = ah->ah_sh; 283 284 /* Debug - complain if we haven't fully waken things up */ 285 if (! ath_hal_reg_whilst_asleep(ah, reg) && 286 ah->ah_powerMode != HAL_PM_AWAKE) { 287 ath_hal_printf(ah, "%s: reg=0x%08x, val=0x%08x, pm=%d\n", 288 __func__, reg, val, ah->ah_powerMode); 289 } 290 291 if (ath_hal_alq) { 292 struct ale *ale = ath_hal_alq_get(ah); 293 if (ale) { 294 struct athregrec *r = (struct athregrec *) ale->ae_data; 295 r->threadid = curthread->td_tid; 296 r->op = OP_WRITE; 297 r->reg = reg; 298 r->val = val; 299 alq_post(ath_hal_alq, ale); 300 } 301 } 302 if (ah->ah_config.ah_serialise_reg_war) 303 spin_lock(&ah_regser_spin); 304 bus_space_write_4(tag, h, reg, val); 305 if (ah->ah_config.ah_serialise_reg_war) 306 spin_unlock(&ah_regser_spin); 307 } 308 309 u_int32_t 310 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 311 { 312 bus_space_tag_t tag = BUSTAG(ah); 313 bus_space_handle_t h = ah->ah_sh; 314 u_int32_t val; 315 316 /* Debug - complain if we haven't fully waken things up */ 317 if (! ath_hal_reg_whilst_asleep(ah, reg) && 318 ah->ah_powerMode != HAL_PM_AWAKE) { 319 ath_hal_printf(ah, "%s: reg=0x%08x, pm=%d\n", 320 __func__, reg, ah->ah_powerMode); 321 } 322 323 if (ah->ah_config.ah_serialise_reg_war) 324 spin_lock(&ah_regser_spin); 325 val = bus_space_read_4(tag, h, reg); 326 if (ah->ah_config.ah_serialise_reg_war) 327 spin_unlock(&ah_regser_spin); 328 if (ath_hal_alq) { 329 struct ale *ale = ath_hal_alq_get(ah); 330 if (ale) { 331 struct athregrec *r = (struct athregrec *) ale->ae_data; 332 r->threadid = curthread->td_tid; 333 r->op = OP_READ; 334 r->reg = reg; 335 r->val = val; 336 alq_post(ath_hal_alq, ale); 337 } 338 } 339 return val; 340 } 341 342 void 343 OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v) 344 { 345 if (ath_hal_alq) { 346 struct ale *ale = ath_hal_alq_get(ah); 347 if (ale) { 348 struct athregrec *r = (struct athregrec *) ale->ae_data; 349 r->threadid = curthread->td_tid; 350 r->op = OP_MARK; 351 r->reg = id; 352 r->val = v; 353 alq_post(ath_hal_alq, ale); 354 } 355 } 356 } 357 #elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) 358 /* 359 * Memory-mapped device register read/write. These are here 360 * as routines when debugging support is enabled and/or when 361 * explicitly configured to use function calls. The latter is 362 * for architectures that might need to do something before 363 * referencing memory (e.g. remap an i/o window). 364 * 365 * NB: see the comments in ah_osdep.h about byte-swapping register 366 * reads and writes to understand what's going on below. 367 */ 368 369 void 370 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 371 { 372 bus_space_tag_t tag = BUSTAG(ah); 373 bus_space_handle_t h = ah->ah_sh; 374 375 /* Debug - complain if we haven't fully waken things up */ 376 if (! ath_hal_reg_whilst_asleep(ah, reg) && 377 ah->ah_powerMode != HAL_PM_AWAKE) { 378 ath_hal_printf(ah, "%s: reg=0x%08x, val=0x%08x, pm=%d\n", 379 __func__, reg, val, ah->ah_powerMode); 380 } 381 382 /* Debug - complain if we haven't fully waken things up */ 383 if (! ath_hal_reg_whilst_asleep(ah, reg) && 384 ah->ah_powerMode != HAL_PM_AWAKE) { 385 ath_hal_printf(ah, "%s: reg=0x%08x, pm=%d\n", 386 __func__, reg, ah->ah_powerMode); 387 } 388 389 if (ah->ah_config.ah_serialise_reg_war) 390 spin_lock(&ah_regser_spin); 391 bus_space_write_4(tag, h, reg, val); 392 if (ah->ah_config.ah_serialise_reg_war) 393 spin_unlock(&ah_regser_spin); 394 } 395 396 u_int32_t 397 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 398 { 399 bus_space_tag_t tag = BUSTAG(ah); 400 bus_space_handle_t h = ah->ah_sh; 401 u_int32_t val; 402 403 if (ah->ah_config.ah_serialise_reg_war) 404 spin_lock(&ah_regser_spin); 405 val = bus_space_read_4(tag, h, reg); 406 if (ah->ah_config.ah_serialise_reg_war) 407 spin_unlock(&ah_regser_spin); 408 return val; 409 } 410 #endif /* AH_DEBUG || AH_REGOPS_FUNC */ 411 412 #ifdef AH_ASSERT 413 void 414 ath_hal_assert_failed(const char* filename, int lineno, const char *msg) 415 { 416 kprintf("Atheros HAL assertion failure: %s: line %u: %s\n", 417 filename, lineno, msg); 418 panic("ath_hal_assert"); 419 } 420 #endif /* AH_ASSERT */ 421 422 /* 423 * Module glue. 424 */ 425 static int 426 ath_hal_modevent(module_t mod, int type, void *unused) 427 { 428 int error; 429 430 wlan_serialize_enter(); 431 432 switch (type) { 433 case MOD_LOAD: 434 error = 0; 435 break; 436 case MOD_UNLOAD: 437 error = 0; 438 break; 439 default: 440 error = EINVAL; 441 break; 442 } 443 wlan_serialize_exit(); 444 445 return error; 446 } 447 448 static moduledata_t ath_hal_mod = { 449 "ath_hal", 450 ath_hal_modevent, 451 0 452 }; 453 454 DECLARE_MODULE(ath_hal, ath_hal_mod, SI_SUB_DRIVERS, SI_ORDER_ANY); 455 MODULE_VERSION(ath_hal, 1); 456