1 /*- 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 * $FreeBSD$ 30 */ 31 #include "opt_ah.h" 32 33 #define CTLFLAG_RWTUN CTLFLAG_RW 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/module.h> 39 #include <sys/sysctl.h> 40 #include <sys/bus.h> 41 #include <sys/malloc.h> 42 #include <sys/proc.h> 43 #include <sys/lock.h> 44 #include <sys/mutex.h> 45 46 #include <machine/stdarg.h> 47 48 #include <net/ethernet.h> /* XXX for ether_sprintf */ 49 #include <net/if.h> 50 #include <net/if_var.h> 51 #include <net/if_media.h> 52 #include <net/if_types.h> 53 54 #include <dev/netif/ath/ath_hal/ah.h> 55 #include <dev/netif/ath/ath_hal/ah_debug.h> 56 57 #include <netproto/802_11/ieee80211_var.h> 58 59 /* 60 * WiSoC boards overload the bus tag with information about the 61 * board layout. We must extract the bus space tag from that 62 * indirect structure. For everyone else the tag is passed in 63 * directly. 64 * XXX cache indirect ref privately 65 */ 66 #ifdef AH_SUPPORT_AR5312 67 #define BUSTAG(ah) \ 68 ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag) 69 #else 70 #define BUSTAG(ah) ((ah)->ah_st) 71 #endif 72 73 /* 74 * This lock is used to seralise register access for chips which have 75 * problems w/ SMP CPUs issuing concurrent PCI transactions. 76 * 77 * XXX This is a global lock for now; it should be pushed to 78 * a per-device lock in some platform-independent fashion. 79 */ 80 struct lock ah_regser_mtx; 81 LOCK_SYSINIT(ah_regser, &ah_regser_mtx, "Atheros register access mutex", 0); 82 83 extern void ath_hal_printf(struct ath_hal *, const char*, ...) 84 __printflike(2,3); 85 extern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list) 86 __printflike(2, 0); 87 extern const char* ath_hal_ether_sprintf(const u_int8_t *mac); 88 extern void *ath_hal_malloc(size_t); 89 extern void ath_hal_free(void *); 90 #ifdef AH_ASSERT 91 extern void ath_hal_assert_failed(const char* filename, 92 int lineno, const char* msg); 93 #endif 94 #ifdef AH_DEBUG 95 extern void DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...); 96 #endif /* AH_DEBUG */ 97 98 /* NB: put this here instead of the driver to avoid circular references */ 99 SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters"); 100 static SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, 101 "Atheros HAL parameters"); 102 103 #ifdef AH_DEBUG 104 int ath_hal_debug = 0; 105 SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RWTUN, &ath_hal_debug, 106 0, "Atheros HAL debugging printfs"); 107 #endif /* AH_DEBUG */ 108 109 static MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data"); 110 111 void* 112 ath_hal_malloc(size_t size) 113 { 114 return kmalloc(size, M_ATH_HAL, M_INTWAIT | M_ZERO); 115 } 116 117 void 118 ath_hal_free(void* p) 119 { 120 kfree(p, M_ATH_HAL); 121 } 122 123 void 124 ath_hal_vprintf(struct ath_hal *ah, const char* fmt, __va_list ap) 125 { 126 kvprintf(fmt, ap); 127 } 128 129 void 130 ath_hal_printf(struct ath_hal *ah, const char* fmt, ...) 131 { 132 __va_list ap; 133 __va_start(ap, fmt); 134 ath_hal_vprintf(ah, fmt, ap); 135 __va_end(ap); 136 } 137 138 const char* 139 ath_hal_ether_sprintf(const u_int8_t *mac) 140 { 141 return ether_sprintf(mac); 142 } 143 144 #ifdef AH_DEBUG 145 146 /* 147 * XXX This is highly relevant only for the AR5416 and later 148 * PCI/PCIe NICs. It'll need adjustment for other hardware 149 * variations. 150 */ 151 static int 152 ath_hal_reg_whilst_asleep(struct ath_hal *ah, uint32_t reg) 153 { 154 155 if (reg >= 0x4000 && reg < 0x5000) 156 return (1); 157 if (reg >= 0x6000 && reg < 0x7000) 158 return (1); 159 if (reg >= 0x7000 && reg < 0x8000) 160 return (1); 161 return (0); 162 } 163 164 void 165 DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...) 166 { 167 if ((mask == HAL_DEBUG_UNMASKABLE) || 168 (ah != NULL && ah->ah_config.ah_debug & mask) || 169 (ath_hal_debug & mask)) { 170 __va_list ap; 171 __va_start(ap, fmt); 172 ath_hal_vprintf(ah, fmt, ap); 173 __va_end(ap); 174 } 175 } 176 #undef HAL_DEBUG_UNMASKABLE 177 #endif /* AH_DEBUG */ 178 179 #ifdef AH_DEBUG_ALQ 180 /* 181 * ALQ register tracing support. 182 * 183 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and 184 * writes to the file /tmp/ath_hal.log. The file format is a simple 185 * fixed-size array of records. When done logging set hw.ath.hal.alq=0 186 * and then decode the file with the arcode program (that is part of the 187 * HAL). If you start+stop tracing the data will be appended to an 188 * existing file. 189 * 190 * NB: doesn't handle multiple devices properly; only one DEVICE record 191 * is emitted and the different devices are not identified. 192 */ 193 /*#include <sys/alq.h> FreeBSD */ 194 /*#include <sys/pcpu.h> FreeBSD */ 195 #include <dev/netif/ath/ath_hal/ah_decode.h> 196 197 static struct alq *ath_hal_alq; 198 static int ath_hal_alq_emitdev; /* need to emit DEVICE record */ 199 static u_int ath_hal_alq_lost; /* count of lost records */ 200 static char ath_hal_logfile[MAXPATHLEN] = "/tmp/ath_hal.log"; 201 202 SYSCTL_STRING(_hw_ath_hal, OID_AUTO, alq_logfile, CTLFLAG_RW, 203 &ath_hal_logfile, sizeof(kernelname), "Name of ALQ logfile"); 204 205 static u_int ath_hal_alq_qsize = 64*1024; 206 207 static int 208 ath_hal_setlogging(int enable) 209 { 210 int error; 211 212 if (enable) { 213 error = alq_open(&ath_hal_alq, ath_hal_logfile, 214 curthread->td_ucred, ALQ_DEFAULT_CMODE, 215 sizeof (struct athregrec), ath_hal_alq_qsize); 216 ath_hal_alq_lost = 0; 217 ath_hal_alq_emitdev = 1; 218 kprintf("ath_hal: logging to %s enabled\n", 219 ath_hal_logfile); 220 } else { 221 if (ath_hal_alq) 222 alq_close(ath_hal_alq); 223 ath_hal_alq = NULL; 224 kprintf("ath_hal: logging disabled\n"); 225 error = 0; 226 } 227 return (error); 228 } 229 230 static int 231 sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS) 232 { 233 int error, enable; 234 235 enable = (ath_hal_alq != NULL); 236 error = sysctl_handle_int(oidp, &enable, 0, req); 237 if (error || !req->newptr) 238 return (error); 239 else 240 return (ath_hal_setlogging(enable)); 241 } 242 SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW, 243 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging"); 244 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW, 245 &ath_hal_alq_qsize, 0, "In-memory log size (#records)"); 246 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW, 247 &ath_hal_alq_lost, 0, "Register operations not logged"); 248 249 static struct ale * 250 ath_hal_alq_get(struct ath_hal *ah) 251 { 252 struct ale *ale; 253 254 if (ath_hal_alq_emitdev) { 255 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 256 if (ale) { 257 struct athregrec *r = 258 (struct athregrec *) ale->ae_data; 259 r->op = OP_DEVICE; 260 r->reg = 0; 261 r->val = ah->ah_devid; 262 alq_post(ath_hal_alq, ale); 263 ath_hal_alq_emitdev = 0; 264 } else 265 ath_hal_alq_lost++; 266 } 267 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 268 if (!ale) 269 ath_hal_alq_lost++; 270 return ale; 271 } 272 273 void 274 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 275 { 276 bus_space_tag_t tag = BUSTAG(ah); 277 bus_space_handle_t h = ah->ah_sh; 278 279 /* Debug - complain if we haven't fully waken things up */ 280 if (! ath_hal_reg_whilst_asleep(ah, reg) && 281 ah->ah_powerMode != HAL_PM_AWAKE) { 282 ath_hal_printf(ah, "%s: reg=0x%08x, val=0x%08x, pm=%d\n", 283 __func__, reg, val, ah->ah_powerMode); 284 } 285 286 if (ath_hal_alq) { 287 struct ale *ale = ath_hal_alq_get(ah); 288 if (ale) { 289 struct athregrec *r = (struct athregrec *) ale->ae_data; 290 r->threadid = curthread->td_tid; 291 r->op = OP_WRITE; 292 r->reg = reg; 293 r->val = val; 294 alq_post(ath_hal_alq, ale); 295 } 296 } 297 if (ah->ah_config.ah_serialise_reg_war) 298 lockmgr(&ah_regser_mtx, LK_EXCLUSIVE); 299 bus_space_write_4(tag, h, reg, val); 300 if (ah->ah_config.ah_serialise_reg_war) 301 lockmgr(&ah_regser_mtx, LK_RELEASE); 302 } 303 304 u_int32_t 305 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 306 { 307 bus_space_tag_t tag = BUSTAG(ah); 308 bus_space_handle_t h = ah->ah_sh; 309 u_int32_t val; 310 311 /* Debug - complain if we haven't fully waken things up */ 312 if (! ath_hal_reg_whilst_asleep(ah, reg) && 313 ah->ah_powerMode != HAL_PM_AWAKE) { 314 ath_hal_printf(ah, "%s: reg=0x%08x, pm=%d\n", 315 __func__, reg, ah->ah_powerMode); 316 } 317 318 if (ah->ah_config.ah_serialise_reg_war) 319 lockmgr(&ah_regser_mtx, LK_EXCLUSIVE); 320 val = bus_space_read_4(tag, h, reg); 321 if (ah->ah_config.ah_serialise_reg_war) 322 lockmgr(&ah_regser_mtx, LK_RELEASE); 323 if (ath_hal_alq) { 324 struct ale *ale = ath_hal_alq_get(ah); 325 if (ale) { 326 struct athregrec *r = (struct athregrec *) ale->ae_data; 327 r->threadid = curthread->td_tid; 328 r->op = OP_READ; 329 r->reg = reg; 330 r->val = val; 331 alq_post(ath_hal_alq, ale); 332 } 333 } 334 return val; 335 } 336 337 void 338 OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v) 339 { 340 if (ath_hal_alq) { 341 struct ale *ale = ath_hal_alq_get(ah); 342 if (ale) { 343 struct athregrec *r = (struct athregrec *) ale->ae_data; 344 r->threadid = curthread->td_tid; 345 r->op = OP_MARK; 346 r->reg = id; 347 r->val = v; 348 alq_post(ath_hal_alq, ale); 349 } 350 } 351 } 352 #elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) 353 /* 354 * Memory-mapped device register read/write. These are here 355 * as routines when debugging support is enabled and/or when 356 * explicitly configured to use function calls. The latter is 357 * for architectures that might need to do something before 358 * referencing memory (e.g. remap an i/o window). 359 * 360 * NB: see the comments in ah_osdep.h about byte-swapping register 361 * reads and writes to understand what's going on below. 362 */ 363 364 void 365 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 366 { 367 bus_space_tag_t tag = BUSTAG(ah); 368 bus_space_handle_t h = ah->ah_sh; 369 370 /* Debug - complain if we haven't fully waken things up */ 371 if (! ath_hal_reg_whilst_asleep(ah, reg) && 372 ah->ah_powerMode != HAL_PM_AWAKE) { 373 ath_hal_printf(ah, "%s: reg=0x%08x, val=0x%08x, pm=%d\n", 374 __func__, reg, val, ah->ah_powerMode); 375 } 376 377 if (ah->ah_config.ah_serialise_reg_war) 378 lockmgr(&ah_regser_mtx, LK_EXCLUSIVE); 379 bus_space_write_4(tag, h, reg, val); 380 if (ah->ah_config.ah_serialise_reg_war) 381 lockmgr(&ah_regser_mtx, LK_RELEASE); 382 } 383 384 u_int32_t 385 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 386 { 387 bus_space_tag_t tag = BUSTAG(ah); 388 bus_space_handle_t h = ah->ah_sh; 389 u_int32_t val; 390 391 /* Debug - complain if we haven't fully waken things up */ 392 if (! ath_hal_reg_whilst_asleep(ah, reg) && 393 ah->ah_powerMode != HAL_PM_AWAKE) { 394 ath_hal_printf(ah, "%s: reg=0x%08x, pm=%d\n", 395 __func__, reg, ah->ah_powerMode); 396 } 397 398 if (ah->ah_config.ah_serialise_reg_war) 399 lockmgr(&ah_regser_mtx, LK_EXCLUSIVE); 400 val = bus_space_read_4(tag, h, reg); 401 if (ah->ah_config.ah_serialise_reg_war) 402 lockmgr(&ah_regser_mtx, LK_RELEASE); 403 return val; 404 } 405 #endif /* AH_DEBUG || AH_REGOPS_FUNC */ 406 407 #ifdef AH_ASSERT 408 void 409 ath_hal_assert_failed(const char* filename, int lineno, const char *msg) 410 { 411 kprintf("Atheros HAL assertion failure: %s: line %u: %s\n", 412 filename, lineno, msg); 413 panic("ath_hal_assert"); 414 } 415 #endif /* AH_ASSERT */ 416 417 /* 418 * Module glue. 419 */ 420 static int 421 ath_hal_modevent(module_t mod, int type, void *unused) 422 { 423 int error; 424 425 wlan_serialize_enter(); 426 427 switch (type) { 428 case MOD_LOAD: 429 error = 0; 430 break; 431 case MOD_UNLOAD: 432 error = 0; 433 break; 434 default: 435 error = EINVAL; 436 break; 437 } 438 wlan_serialize_exit(); 439 440 return error; 441 } 442 443 static moduledata_t ath_hal_mod = { 444 "ath_hal", 445 ath_hal_modevent, 446 0 447 }; 448 449 DECLARE_MODULE(ath_hal, ath_hal_mod, SI_SUB_DRIVERS, SI_ORDER_ANY); 450 MODULE_VERSION(ath_hal, 1); 451