xref: /dragonfly/sys/dev/netif/ath/ath_hal/ah_osdep.c (revision cfd1aba3)
1 /*-
2  * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer,
10  *    without modification.
11  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13  *    redistribution must be conditioned upon including a substantially
14  *    similar Disclaimer requirement for further binary redistribution.
15  *
16  * NO WARRANTY
17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27  * THE POSSIBILITY OF SUCH DAMAGES.
28  *
29  * $FreeBSD$
30  */
31 #include "opt_ath.h"
32 #include "opt_inet.h"
33 #include "opt_wlan.h"
34 #include "opt_ah.h"
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/kernel.h>
39 #include <sys/module.h>
40 #include <sys/sysctl.h>
41 #include <sys/bus.h>
42 #include <sys/malloc.h>
43 #include <sys/proc.h>
44 #include <sys/lock.h>
45 #include <sys/mutex.h>
46 
47 #include <machine/stdarg.h>
48 
49 #include <net/if.h>
50 #include <net/if_var.h>
51 #include <net/if_media.h>
52 #include <net/if_arp.h>
53 #include <net/ethernet.h>		/* XXX for ether_sprintf */
54 
55 #include <netproto/802_11/ieee80211_var.h>
56 
57 #include <dev/netif/ath/ath_hal/ah.h>
58 #include <dev/netif/ath/ath_hal/ah_debug.h>
59 
60 /*
61  * WiSoC boards overload the bus tag with information about the
62  * board layout.  We must extract the bus space tag from that
63  * indirect structure.  For everyone else the tag is passed in
64  * directly.
65  * XXX cache indirect ref privately
66  */
67 #ifdef AH_SUPPORT_AR5312
68 #define	BUSTAG(ah) \
69 	((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag)
70 #else
71 #define	BUSTAG(ah)	((ah)->ah_st)
72 #endif
73 
74 /*
75  * This lock is used to seralise register access for chips which have
76  * problems w/ SMP CPUs issuing concurrent PCI transactions.
77  *
78  * XXX This is a global lock for now; it should be pushed to
79  * a per-device lock in some platform-independent fashion.
80  */
81 struct spinlock ah_regser_spin = SPINLOCK_INITIALIZER(ah_regser_spin);
82 
83 extern	void ath_hal_printf(struct ath_hal *, const char*, ...)
84 		__printflike(2,3);
85 extern	void ath_hal_vprintf(struct ath_hal *, const char*, __va_list)
86 		__printflike(2, 0);
87 extern	const char* ath_hal_ether_sprintf(const u_int8_t *mac);
88 extern	void *ath_hal_malloc(size_t);
89 extern	void ath_hal_free(void *);
90 #ifdef AH_ASSERT
91 extern	void ath_hal_assert_failed(const char* filename,
92 		int lineno, const char* msg);
93 #endif
94 #ifdef AH_DEBUG
95 extern	void DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...)
96 		 __printflike(3, 4);
97 #endif /* AH_DEBUG */
98 
99 /* NB: put this here instead of the driver to avoid circular references */
100 SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters");
101 static SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0,
102     "Atheros HAL parameters");
103 
104 #ifdef AH_DEBUG
105 int ath_hal_debug = 0;
106 SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug,
107     0, "Atheros HAL debugging printfs");
108 TUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug);
109 #endif /* AH_DEBUG */
110 
111 static MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data");
112 
113 void*
114 ath_hal_malloc(size_t size)
115 {
116 	return kmalloc(size, M_ATH_HAL, M_INTWAIT | M_ZERO);
117 }
118 
119 void
120 ath_hal_free(void* p)
121 {
122 	kfree(p, M_ATH_HAL);
123 }
124 
125 void
126 ath_hal_vprintf(struct ath_hal *ah, const char* fmt, __va_list ap)
127 {
128 	kvprintf(fmt, ap);
129 }
130 
131 void
132 ath_hal_printf(struct ath_hal *ah, const char* fmt, ...)
133 {
134 	__va_list ap;
135 	__va_start(ap, fmt);
136 	ath_hal_vprintf(ah, fmt, ap);
137 	__va_end(ap);
138 }
139 
140 const char*
141 ath_hal_ether_sprintf(const u_int8_t *mac)
142 {
143 	static char etherbuf[ETHER_ADDRSTRLEN + 1];
144 
145 	kether_ntoa(mac, etherbuf);
146 
147 	return etherbuf;
148 }
149 
150 #ifdef AH_DEBUG
151 
152 void
153 DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...)
154 {
155 	if ((mask == HAL_DEBUG_UNMASKABLE) ||
156 	    (ah != NULL && ah->ah_config.ah_debug & mask) ||
157 	    (ath_hal_debug & mask)) {
158 		__va_list ap;
159 		__va_start(ap, fmt);
160 		ath_hal_vprintf(ah, fmt, ap);
161 		__va_end(ap);
162 	}
163 }
164 #undef	HAL_DEBUG_UNMASKABLE
165 #endif /* AH_DEBUG */
166 
167 #ifdef AH_DEBUG_ALQ
168 /*
169  * ALQ register tracing support.
170  *
171  * Setting hw.ath.hal.alq=1 enables tracing of all register reads and
172  * writes to the file /tmp/ath_hal.log.  The file format is a simple
173  * fixed-size array of records.  When done logging set hw.ath.hal.alq=0
174  * and then decode the file with the arcode program (that is part of the
175  * HAL).  If you start+stop tracing the data will be appended to an
176  * existing file.
177  *
178  * NB: doesn't handle multiple devices properly; only one DEVICE record
179  *     is emitted and the different devices are not identified.
180  */
181 #include <sys/alq.h>
182 #include <dev/netif/ath/ath_hal/ah_decode.h>
183 
184 static	struct alq *ath_hal_alq;
185 static	int ath_hal_alq_emitdev;	/* need to emit DEVICE record */
186 static	u_int ath_hal_alq_lost;		/* count of lost records */
187 static	char ath_hal_logfile[MAXPATHLEN] = "/tmp/ath_hal.log";
188 
189 SYSCTL_STRING(_hw_ath_hal, OID_AUTO, alq_logfile, CTLFLAG_RW,
190     &ath_hal_logfile, sizeof(kernelname), "Name of ALQ logfile");
191 
192 static	u_int ath_hal_alq_qsize = 64*1024;
193 
194 static int
195 ath_hal_setlogging(int enable)
196 {
197 	int error;
198 
199 	if (enable) {
200 		error = alq_open(&ath_hal_alq, ath_hal_logfile,
201 			curthread->td_ucred, ALQ_DEFAULT_CMODE,
202 			sizeof (struct athregrec), ath_hal_alq_qsize);
203 		ath_hal_alq_lost = 0;
204 		ath_hal_alq_emitdev = 1;
205 		kprintf("ath_hal: logging to %s enabled\n",
206 			ath_hal_logfile);
207 	} else {
208 		if (ath_hal_alq)
209 			alq_close(ath_hal_alq);
210 		ath_hal_alq = NULL;
211 		kprintf("ath_hal: logging disabled\n");
212 		error = 0;
213 	}
214 	return (error);
215 }
216 
217 static int
218 sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS)
219 {
220 	int error, enable;
221 
222 	enable = (ath_hal_alq != NULL);
223         error = sysctl_handle_int(oidp, &enable, 0, req);
224         if (error || !req->newptr)
225                 return (error);
226 	else
227 		return (ath_hal_setlogging(enable));
228 }
229 SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW,
230 	0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging");
231 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW,
232 	&ath_hal_alq_qsize, 0, "In-memory log size (#records)");
233 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW,
234 	&ath_hal_alq_lost, 0, "Register operations not logged");
235 
236 static struct ale *
237 ath_hal_alq_get(struct ath_hal *ah)
238 {
239 	struct ale *ale;
240 
241 	if (ath_hal_alq_emitdev) {
242 		ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
243 		if (ale) {
244 			struct athregrec *r =
245 				(struct athregrec *) ale->ae_data;
246 			r->op = OP_DEVICE;
247 			r->reg = 0;
248 			r->val = ah->ah_devid;
249 			alq_post(ath_hal_alq, ale);
250 			ath_hal_alq_emitdev = 0;
251 		} else
252 			ath_hal_alq_lost++;
253 	}
254 	ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
255 	if (!ale)
256 		ath_hal_alq_lost++;
257 	return ale;
258 }
259 
260 void
261 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
262 {
263 	bus_space_tag_t tag = BUSTAG(ah);
264 	bus_space_handle_t h = ah->ah_sh;
265 
266 	if (ath_hal_alq) {
267 		struct ale *ale = ath_hal_alq_get(ah);
268 		if (ale) {
269 			struct athregrec *r = (struct athregrec *) ale->ae_data;
270 			r->threadid = curthread->td_tid;
271 			r->op = OP_WRITE;
272 			r->reg = reg;
273 			r->val = val;
274 			alq_post(ath_hal_alq, ale);
275 		}
276 	}
277 	if (ah->ah_config.ah_serialise_reg_war)
278 		spin_lock(&ah_regser_spin);
279 	bus_space_write_4(tag, h, reg, val);
280 	if (ah->ah_config.ah_serialise_reg_war)
281 		spin_unlock(&ah_regser_spin);
282 }
283 
284 u_int32_t
285 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
286 {
287 	bus_space_tag_t tag = BUSTAG(ah);
288 	bus_space_handle_t h = ah->ah_sh;
289 	u_int32_t val;
290 
291 	if (ah->ah_config.ah_serialise_reg_war)
292 		spin_lock(&ah_regser_spin);
293 	val = bus_space_read_4(tag, h, reg);
294 	if (ah->ah_config.ah_serialise_reg_war)
295 		spin_unlock(&ah_regser_spin);
296 	if (ath_hal_alq) {
297 		struct ale *ale = ath_hal_alq_get(ah);
298 		if (ale) {
299 			struct athregrec *r = (struct athregrec *) ale->ae_data;
300 			r->threadid = curthread->td_tid;
301 			r->op = OP_READ;
302 			r->reg = reg;
303 			r->val = val;
304 			alq_post(ath_hal_alq, ale);
305 		}
306 	}
307 	return val;
308 }
309 
310 void
311 OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v)
312 {
313 	if (ath_hal_alq) {
314 		struct ale *ale = ath_hal_alq_get(ah);
315 		if (ale) {
316 			struct athregrec *r = (struct athregrec *) ale->ae_data;
317 			r->threadid = curthread->td_tid;
318 			r->op = OP_MARK;
319 			r->reg = id;
320 			r->val = v;
321 			alq_post(ath_hal_alq, ale);
322 		}
323 	}
324 }
325 #elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC)
326 /*
327  * Memory-mapped device register read/write.  These are here
328  * as routines when debugging support is enabled and/or when
329  * explicitly configured to use function calls.  The latter is
330  * for architectures that might need to do something before
331  * referencing memory (e.g. remap an i/o window).
332  *
333  * NB: see the comments in ah_osdep.h about byte-swapping register
334  *     reads and writes to understand what's going on below.
335  */
336 
337 void
338 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
339 {
340 	bus_space_tag_t tag = BUSTAG(ah);
341 	bus_space_handle_t h = ah->ah_sh;
342 
343 	if (ah->ah_config.ah_serialise_reg_war)
344 		spin_lock(&ah_regser_spin);
345 	bus_space_write_4(tag, h, reg, val);
346 	if (ah->ah_config.ah_serialise_reg_war)
347 		spin_unlock(&ah_regser_spin);
348 }
349 
350 u_int32_t
351 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
352 {
353 	bus_space_tag_t tag = BUSTAG(ah);
354 	bus_space_handle_t h = ah->ah_sh;
355 	u_int32_t val;
356 
357 	if (ah->ah_config.ah_serialise_reg_war)
358 		spin_lock(&ah_regser_spin);
359 	val = bus_space_read_4(tag, h, reg);
360 	if (ah->ah_config.ah_serialise_reg_war)
361 		spin_unlock(&ah_regser_spin);
362 	return val;
363 }
364 #endif /* AH_DEBUG || AH_REGOPS_FUNC */
365 
366 #ifdef AH_ASSERT
367 void
368 ath_hal_assert_failed(const char* filename, int lineno, const char *msg)
369 {
370 	kprintf("Atheros HAL assertion failure: %s: line %u: %s\n",
371 		filename, lineno, msg);
372 	panic("ath_hal_assert");
373 }
374 #endif /* AH_ASSERT */
375 
376 /*
377  * Module glue.
378  */
379 static int
380 ath_hal_modevent(module_t mod, int type, void *unused)
381 {
382 	int error;
383 
384 	wlan_serialize_enter();
385 
386 	switch (type) {
387 	case MOD_LOAD:
388 		error = 0;
389 		break;
390 	case MOD_UNLOAD:
391 		error = 0;
392 		break;
393 	default:
394 		error = EINVAL;
395 		break;
396 	}
397 	wlan_serialize_exit();
398 
399 	return error;
400 }
401 
402 static moduledata_t ath_hal_mod = {
403 	"ath_hal",
404 	ath_hal_modevent,
405 	0
406 };
407 
408 DECLARE_MODULE(ath_hal, ath_hal_mod, SI_SUB_DRIVERS, SI_ORDER_ANY);
409 MODULE_VERSION(ath_hal, 1);
410