1 /* 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $FreeBSD$ 18 */ 19 #include "opt_ah.h" 20 21 #include "ah.h" 22 #include "ah_internal.h" 23 24 #include "ar5212/ar5212.h" 25 #include "ar5212/ar5212reg.h" 26 #include "ar5212/ar5212phy.h" 27 28 #include "ah_eeprom_v3.h" 29 30 #define AH_5212_2425 31 #define AH_5212_2417 32 #include "ar5212/ar5212.ini" 33 34 #define N(a) (sizeof(a)/sizeof(a[0])) 35 36 struct ar2425State { 37 RF_HAL_FUNCS base; /* public state, must be first */ 38 uint16_t pcdacTable[PWR_TABLE_SIZE_2413]; 39 40 uint32_t Bank1Data[N(ar5212Bank1_2425)]; 41 uint32_t Bank2Data[N(ar5212Bank2_2425)]; 42 uint32_t Bank3Data[N(ar5212Bank3_2425)]; 43 uint32_t Bank6Data[N(ar5212Bank6_2425)]; /* 2417 is same size */ 44 uint32_t Bank7Data[N(ar5212Bank7_2425)]; 45 }; 46 #define AR2425(ah) ((struct ar2425State *) AH5212(ah)->ah_rfHal) 47 48 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 49 uint32_t numBits, uint32_t firstBit, uint32_t column); 50 51 static void 52 ar2425WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, 53 int writes) 54 { 55 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2425, modesIndex, writes); 56 HAL_INI_WRITE_ARRAY(ah, ar5212Common_2425, 1, writes); 57 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2425, freqIndex, writes); 58 #if 0 59 /* 60 * for SWAN similar to Condor 61 * Bit 0 enables link to go to L1 when MAC goes to sleep. 62 * Bit 3 enables the loop back the link down to reset. 63 */ 64 if (AH_PRIVATE(ah)->ah_ispcie && && ath_hal_pcieL1SKPEnable) { 65 OS_REG_WRITE(ah, AR_PCIE_PMC, 66 AR_PCIE_PMC_ENA_L1 | AR_PCIE_PMC_ENA_RESET); 67 } 68 /* 69 * for Standby issue in Swan/Condor. 70 * Bit 9 (MAC_WOW_PWR_STATE_MASK_D2)to be set to avoid skips 71 * before last Training Sequence 2 (TS2) 72 * Bit 8 (MAC_WOW_PWR_STATE_MASK_D1)to be unset to assert 73 * Power Reset along with PCI Reset 74 */ 75 OS_REG_SET_BIT(ah, AR_PCIE_PMC, MAC_WOW_PWR_STATE_MASK_D2); 76 #endif 77 } 78 79 /* 80 * Take the MHz channel value and set the Channel value 81 * 82 * ASSUMES: Writes enabled to analog bus 83 */ 84 static HAL_BOOL 85 ar2425SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) 86 { 87 uint16_t freq = ath_hal_gethwchannel(ah, chan); 88 uint32_t channelSel = 0; 89 uint32_t bModeSynth = 0; 90 uint32_t aModeRefSel = 0; 91 uint32_t reg32 = 0; 92 93 OS_MARK(ah, AH_MARK_SETCHANNEL, freq); 94 95 if (freq < 4800) { 96 uint32_t txctl; 97 98 channelSel = freq - 2272; 99 channelSel = ath_hal_reverseBits(channelSel, 8); 100 101 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); 102 if (freq == 2484) { 103 // Enable channel spreading for channel 14 104 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 105 txctl | AR_PHY_CCK_TX_CTRL_JAPAN); 106 } else { 107 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 108 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); 109 } 110 111 } else if (((freq % 5) == 2) && (freq <= 5435)) { 112 freq = freq - 2; /* Align to even 5MHz raster */ 113 channelSel = ath_hal_reverseBits( 114 (uint32_t)(((freq - 4800)*10)/25 + 1), 8); 115 aModeRefSel = ath_hal_reverseBits(0, 2); 116 } else if ((freq % 20) == 0 && freq >= 5120) { 117 channelSel = ath_hal_reverseBits( 118 ((freq - 4800) / 20 << 2), 8); 119 aModeRefSel = ath_hal_reverseBits(1, 2); 120 } else if ((freq % 10) == 0) { 121 channelSel = ath_hal_reverseBits( 122 ((freq - 4800) / 10 << 1), 8); 123 aModeRefSel = ath_hal_reverseBits(1, 2); 124 } else if ((freq % 5) == 0) { 125 channelSel = ath_hal_reverseBits( 126 (freq - 4800) / 5, 8); 127 aModeRefSel = ath_hal_reverseBits(1, 2); 128 } else { 129 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", 130 __func__, freq); 131 return AH_FALSE; 132 } 133 134 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) | 135 (1 << 12) | 0x1; 136 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); 137 138 reg32 >>= 8; 139 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); 140 141 AH_PRIVATE(ah)->ah_curchan = chan; 142 return AH_TRUE; 143 } 144 145 /* 146 * Reads EEPROM header info from device structure and programs 147 * all rf registers 148 * 149 * REQUIRES: Access to the analog rf device 150 */ 151 static HAL_BOOL 152 ar2425SetRfRegs(struct ath_hal *ah, 153 const struct ieee80211_channel *chan, 154 uint16_t modesIndex, uint16_t *rfXpdGain) 155 { 156 #define RF_BANK_SETUP(_priv, _ix, _col) do { \ 157 int i; \ 158 for (i = 0; i < N(ar5212Bank##_ix##_2425); i++) \ 159 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2425[i][_col];\ 160 } while (0) 161 struct ath_hal_5212 *ahp = AH5212(ah); 162 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 163 struct ar2425State *priv = AR2425(ah); 164 uint16_t ob2GHz = 0, db2GHz = 0; 165 int regWrites = 0; 166 167 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n", 168 __func__, chan->ic_freq, chan->ic_flags, modesIndex); 169 170 HALASSERT(priv); 171 172 /* Setup rf parameters */ 173 if (IEEE80211_IS_CHAN_B(chan)) { 174 ob2GHz = ee->ee_obFor24; 175 db2GHz = ee->ee_dbFor24; 176 } else { 177 ob2GHz = ee->ee_obFor24g; 178 db2GHz = ee->ee_dbFor24g; 179 } 180 181 /* Bank 1 Write */ 182 RF_BANK_SETUP(priv, 1, 1); 183 184 /* Bank 2 Write */ 185 RF_BANK_SETUP(priv, 2, modesIndex); 186 187 /* Bank 3 Write */ 188 RF_BANK_SETUP(priv, 3, modesIndex); 189 190 /* Bank 6 Write */ 191 RF_BANK_SETUP(priv, 6, modesIndex); 192 193 ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 193, 0); 194 ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 190, 0); 195 196 /* Bank 7 Setup */ 197 RF_BANK_SETUP(priv, 7, modesIndex); 198 199 /* Write Analog registers */ 200 HAL_INI_WRITE_BANK(ah, ar5212Bank1_2425, priv->Bank1Data, regWrites); 201 HAL_INI_WRITE_BANK(ah, ar5212Bank2_2425, priv->Bank2Data, regWrites); 202 HAL_INI_WRITE_BANK(ah, ar5212Bank3_2425, priv->Bank3Data, regWrites); 203 if (IS_2417(ah)) { 204 HALASSERT(N(ar5212Bank6_2425) == N(ar5212Bank6_2417)); 205 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2417, priv->Bank6Data, 206 regWrites); 207 } else 208 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2425, priv->Bank6Data, 209 regWrites); 210 HAL_INI_WRITE_BANK(ah, ar5212Bank7_2425, priv->Bank7Data, regWrites); 211 212 /* Now that we have reprogrammed rfgain value, clear the flag. */ 213 ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE; 214 215 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "<==%s\n", __func__); 216 return AH_TRUE; 217 #undef RF_BANK_SETUP 218 } 219 220 /* 221 * Return a reference to the requested RF Bank. 222 */ 223 static uint32_t * 224 ar2425GetRfBank(struct ath_hal *ah, int bank) 225 { 226 struct ar2425State *priv = AR2425(ah); 227 228 HALASSERT(priv != AH_NULL); 229 switch (bank) { 230 case 1: return priv->Bank1Data; 231 case 2: return priv->Bank2Data; 232 case 3: return priv->Bank3Data; 233 case 6: return priv->Bank6Data; 234 case 7: return priv->Bank7Data; 235 } 236 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n", 237 __func__, bank); 238 return AH_NULL; 239 } 240 241 /* 242 * Return indices surrounding the value in sorted integer lists. 243 * 244 * NB: the input list is assumed to be sorted in ascending order 245 */ 246 static void 247 GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize, 248 uint32_t *vlo, uint32_t *vhi) 249 { 250 int16_t target = v; 251 const uint16_t *ep = lp+listSize; 252 const uint16_t *tp; 253 254 *vlo = 0; /* avoid gcc warnings */ 255 *vhi = 0; /* avoid gcc warnings */ 256 257 /* 258 * Check first and last elements for out-of-bounds conditions. 259 */ 260 if (target < lp[0]) { 261 *vlo = *vhi = 0; 262 return; 263 } 264 if (target >= ep[-1]) { 265 *vlo = *vhi = listSize - 1; 266 return; 267 } 268 269 /* look for value being near or between 2 values in list */ 270 for (tp = lp; tp < ep; tp++) { 271 /* 272 * If value is close to the current value of the list 273 * then target is not between values, it is one of the values 274 */ 275 if (*tp == target) { 276 *vlo = *vhi = tp - (const uint16_t *) lp; 277 return; 278 } 279 /* 280 * Look for value being between current value and next value 281 * if so return these 2 values 282 */ 283 if (target < tp[1]) { 284 *vlo = tp - (const uint16_t *) lp; 285 *vhi = *vlo + 1; 286 return; 287 } 288 } 289 } 290 291 /* 292 * Fill the Vpdlist for indices Pmax-Pmin 293 */ 294 static HAL_BOOL 295 ar2425FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax, 296 const int16_t *pwrList, const uint16_t *VpdList, 297 uint16_t numIntercepts, 298 uint16_t retVpdList[][64]) 299 { 300 uint16_t ii, jj, kk; 301 int16_t currPwr = (int16_t)(2*Pmin); 302 /* since Pmin is pwr*2 and pwrList is 4*pwr */ 303 uint32_t idxL, idxR; 304 305 ii = 0; 306 jj = 0; 307 308 if (numIntercepts < 2) 309 return AH_FALSE; 310 311 while (ii <= (uint16_t)(Pmax - Pmin)) { 312 GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList, 313 numIntercepts, &(idxL), &(idxR)); 314 if (idxR < 1) 315 idxR = 1; /* extrapolate below */ 316 if (idxL == (uint32_t)(numIntercepts - 1)) 317 idxL = numIntercepts - 2; /* extrapolate above */ 318 if (pwrList[idxL] == pwrList[idxR]) 319 kk = VpdList[idxL]; 320 else 321 kk = (uint16_t) 322 (((currPwr - pwrList[idxL])*VpdList[idxR]+ 323 (pwrList[idxR] - currPwr)*VpdList[idxL])/ 324 (pwrList[idxR] - pwrList[idxL])); 325 retVpdList[pdGainIdx][ii] = kk; 326 ii++; 327 currPwr += 2; /* half dB steps */ 328 } 329 330 return AH_TRUE; 331 } 332 333 /* 334 * Returns interpolated or the scaled up interpolated value 335 */ 336 static int16_t 337 interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight, 338 int16_t targetLeft, int16_t targetRight) 339 { 340 int16_t rv; 341 342 if (srcRight != srcLeft) { 343 rv = ((target - srcLeft)*targetRight + 344 (srcRight - target)*targetLeft) / (srcRight - srcLeft); 345 } else { 346 rv = targetLeft; 347 } 348 return rv; 349 } 350 351 /* 352 * Uses the data points read from EEPROM to reconstruct the pdadc power table 353 * Called by ar2425SetPowerTable() 354 */ 355 static void 356 ar2425getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, 357 const RAW_DATA_STRUCT_2413 *pRawDataset, 358 uint16_t pdGainOverlap_t2, 359 int16_t *pMinCalPower, uint16_t pPdGainBoundaries[], 360 uint16_t pPdGainValues[], uint16_t pPDADCValues[]) 361 { 362 /* Note the items statically allocated below are to reduce stack usage */ 363 uint32_t ii, jj, kk; 364 int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */ 365 uint32_t idxL, idxR; 366 uint32_t numPdGainsUsed = 0; 367 static uint16_t VpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB]; 368 /* filled out Vpd table for all pdGains (chanL) */ 369 static uint16_t VpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB]; 370 /* filled out Vpd table for all pdGains (chanR) */ 371 static uint16_t VpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB]; 372 /* filled out Vpd table for all pdGains (interpolated) */ 373 /* 374 * If desired to support -ve power levels in future, just 375 * change pwr_I_0 to signed 5-bits. 376 */ 377 static int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 378 /* to accommodate -ve power levels later on. */ 379 static int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 380 /* to accommodate -ve power levels later on */ 381 uint16_t numVpd = 0; 382 uint16_t Vpd_step; 383 int16_t tmpVal ; 384 uint32_t sizeCurrVpdTable, maxIndex, tgtIndex; 385 386 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "==>%s:\n", __func__); 387 388 /* Get upper lower index */ 389 GetLowerUpperIndex(channel, pRawDataset->pChannels, 390 pRawDataset->numChannels, &(idxL), &(idxR)); 391 392 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 393 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 394 /* work backwards 'cause highest pdGain for lowest power */ 395 numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd; 396 if (numVpd > 0) { 397 pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain; 398 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]; 399 if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) { 400 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]; 401 } 402 Pmin_t2[numPdGainsUsed] = (int16_t) 403 (Pmin_t2[numPdGainsUsed] / 2); 404 Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 405 if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]) 406 Pmax_t2[numPdGainsUsed] = 407 pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 408 Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2); 409 ar2425FillVpdTable( 410 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 411 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]), 412 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L 413 ); 414 ar2425FillVpdTable( 415 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 416 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]), 417 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R 418 ); 419 for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) { 420 VpdTable_I[numPdGainsUsed][kk] = 421 interpolate_signed( 422 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR], 423 (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]); 424 } 425 /* fill VpdTable_I for this pdGain */ 426 numPdGainsUsed++; 427 } 428 /* if this pdGain is used */ 429 } 430 431 *pMinCalPower = Pmin_t2[0]; 432 kk = 0; /* index for the final table */ 433 for (ii = 0; ii < numPdGainsUsed; ii++) { 434 if (ii == (numPdGainsUsed - 1)) 435 pPdGainBoundaries[ii] = Pmax_t2[ii] + 436 PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB; 437 else 438 pPdGainBoundaries[ii] = (uint16_t) 439 ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 ); 440 441 /* Find starting index for this pdGain */ 442 if (ii == 0) 443 ss = 0; /* for the first pdGain, start from index 0 */ 444 else 445 ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) - 446 pdGainOverlap_t2; 447 Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]); 448 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 449 /* 450 *-ve ss indicates need to extrapolate data below for this pdGain 451 */ 452 while (ss < 0) { 453 tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step); 454 pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal); 455 ss++; 456 } 457 458 sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii]; 459 tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii]; 460 maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable; 461 462 while (ss < (int16_t)maxIndex) 463 pPDADCValues[kk++] = VpdTable_I[ii][ss++]; 464 465 Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] - 466 VpdTable_I[ii][sizeCurrVpdTable-2]); 467 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 468 /* 469 * for last gain, pdGainBoundary == Pmax_t2, so will 470 * have to extrapolate 471 */ 472 if (tgtIndex > maxIndex) { /* need to extrapolate above */ 473 while(ss < (int16_t)tgtIndex) { 474 tmpVal = (uint16_t) 475 (VpdTable_I[ii][sizeCurrVpdTable-1] + 476 (ss-maxIndex)*Vpd_step); 477 pPDADCValues[kk++] = (tmpVal > 127) ? 478 127 : tmpVal; 479 ss++; 480 } 481 } /* extrapolated above */ 482 } /* for all pdGainUsed */ 483 484 while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) { 485 pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1]; 486 ii++; 487 } 488 while (kk < 128) { 489 pPDADCValues[kk] = pPDADCValues[kk-1]; 490 kk++; 491 } 492 493 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "<==%s\n", __func__); 494 } 495 496 497 /* Same as 2413 set power table */ 498 static HAL_BOOL 499 ar2425SetPowerTable(struct ath_hal *ah, 500 int16_t *minPower, int16_t *maxPower, 501 const struct ieee80211_channel *chan, 502 uint16_t *rfXpdGain) 503 { 504 uint16_t freq = ath_hal_gethwchannel(ah, chan); 505 struct ath_hal_5212 *ahp = AH5212(ah); 506 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 507 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; 508 uint16_t pdGainOverlap_t2; 509 int16_t minCalPower2413_t2; 510 uint16_t *pdadcValues = ahp->ah_pcdacTable; 511 uint16_t gainBoundaries[4]; 512 uint32_t i, reg32, regoffset; 513 514 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s:chan 0x%x flag 0x%x\n", 515 __func__, freq, chan->ic_flags); 516 517 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) 518 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 519 else if (IEEE80211_IS_CHAN_B(chan)) 520 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 521 else { 522 HALDEBUG(ah, HAL_DEBUG_ANY, "%s:illegal mode\n", __func__); 523 return AH_FALSE; 524 } 525 526 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5), 527 AR_PHY_TPCRG5_PD_GAIN_OVERLAP); 528 529 ar2425getGainBoundariesAndPdadcsForPowers(ah, freq, 530 pRawDataset, pdGainOverlap_t2,&minCalPower2413_t2,gainBoundaries, 531 rfXpdGain, pdadcValues); 532 533 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, 534 (pRawDataset->pDataPerChannel[0].numPdGains - 1)); 535 536 /* 537 * Note the pdadc table may not start at 0 dBm power, could be 538 * negative or greater than 0. Need to offset the power 539 * values by the amount of minPower for griffin 540 */ 541 if (minCalPower2413_t2 != 0) 542 ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2413_t2); 543 else 544 ahp->ah_txPowerIndexOffset = 0; 545 546 /* Finally, write the power values into the baseband power table */ 547 regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */ 548 for (i = 0; i < 32; i++) { 549 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) | 550 ((pdadcValues[4*i + 1] & 0xFF) << 8) | 551 ((pdadcValues[4*i + 2] & 0xFF) << 16) | 552 ((pdadcValues[4*i + 3] & 0xFF) << 24) ; 553 OS_REG_WRITE(ah, regoffset, reg32); 554 regoffset += 4; 555 } 556 557 OS_REG_WRITE(ah, AR_PHY_TPCRG5, 558 SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) | 559 SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) | 560 SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) | 561 SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) | 562 SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4)); 563 564 return AH_TRUE; 565 } 566 567 static int16_t 568 ar2425GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data) 569 { 570 uint32_t ii,jj; 571 uint16_t Pmin=0,numVpd; 572 573 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 574 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 575 /* work backwards 'cause highest pdGain for lowest power */ 576 numVpd = data->pDataPerPDGain[jj].numVpd; 577 if (numVpd > 0) { 578 Pmin = data->pDataPerPDGain[jj].pwr_t4[0]; 579 return(Pmin); 580 } 581 } 582 return(Pmin); 583 } 584 585 static int16_t 586 ar2425GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data) 587 { 588 uint32_t ii; 589 uint16_t Pmax=0,numVpd; 590 591 for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 592 /* work forwards cuase lowest pdGain for highest power */ 593 numVpd = data->pDataPerPDGain[ii].numVpd; 594 if (numVpd > 0) { 595 Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1]; 596 return(Pmax); 597 } 598 } 599 return(Pmax); 600 } 601 602 static 603 HAL_BOOL 604 ar2425GetChannelMaxMinPower(struct ath_hal *ah, 605 const struct ieee80211_channel *chan, 606 int16_t *maxPow, int16_t *minPow) 607 { 608 uint16_t freq = chan->ic_freq; /* NB: never mapped */ 609 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 610 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; 611 const RAW_DATA_PER_CHANNEL_2413 *data = AH_NULL; 612 uint16_t numChannels; 613 int totalD,totalF, totalMin,last, i; 614 615 *maxPow = 0; 616 617 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) 618 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 619 else if (IEEE80211_IS_CHAN_B(chan)) 620 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 621 else 622 return(AH_FALSE); 623 624 numChannels = pRawDataset->numChannels; 625 data = pRawDataset->pDataPerChannel; 626 627 /* Make sure the channel is in the range of the TP values 628 * (freq piers) 629 */ 630 if (numChannels < 1) 631 return(AH_FALSE); 632 633 if ((freq < data[0].channelValue) || 634 (freq > data[numChannels-1].channelValue)) { 635 if (freq < data[0].channelValue) { 636 *maxPow = ar2425GetMaxPower(ah, &data[0]); 637 *minPow = ar2425GetMinPower(ah, &data[0]); 638 return(AH_TRUE); 639 } else { 640 *maxPow = ar2425GetMaxPower(ah, &data[numChannels - 1]); 641 *minPow = ar2425GetMinPower(ah, &data[numChannels - 1]); 642 return(AH_TRUE); 643 } 644 } 645 646 /* Linearly interpolate the power value now */ 647 for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue); 648 last = i++); 649 totalD = data[i].channelValue - data[last].channelValue; 650 if (totalD > 0) { 651 totalF = ar2425GetMaxPower(ah, &data[i]) - ar2425GetMaxPower(ah, &data[last]); 652 *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) + 653 ar2425GetMaxPower(ah, &data[last])*totalD)/totalD); 654 totalMin = ar2425GetMinPower(ah, &data[i]) - ar2425GetMinPower(ah, &data[last]); 655 *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) + 656 ar2425GetMinPower(ah, &data[last])*totalD)/totalD); 657 return(AH_TRUE); 658 } else { 659 if (freq == data[i].channelValue) { 660 *maxPow = ar2425GetMaxPower(ah, &data[i]); 661 *minPow = ar2425GetMinPower(ah, &data[i]); 662 return(AH_TRUE); 663 } else 664 return(AH_FALSE); 665 } 666 } 667 668 /* 669 * Free memory for analog bank scratch buffers 670 */ 671 static void 672 ar2425RfDetach(struct ath_hal *ah) 673 { 674 struct ath_hal_5212 *ahp = AH5212(ah); 675 676 HALASSERT(ahp->ah_rfHal != AH_NULL); 677 ath_hal_free(ahp->ah_rfHal); 678 ahp->ah_rfHal = AH_NULL; 679 } 680 681 /* 682 * Allocate memory for analog bank scratch buffers 683 * Scratch Buffer will be reinitialized every reset so no need to zero now 684 */ 685 static HAL_BOOL 686 ar2425RfAttach(struct ath_hal *ah, HAL_STATUS *status) 687 { 688 struct ath_hal_5212 *ahp = AH5212(ah); 689 struct ar2425State *priv; 690 691 HALASSERT(ah->ah_magic == AR5212_MAGIC); 692 693 HALASSERT(ahp->ah_rfHal == AH_NULL); 694 priv = ath_hal_malloc(sizeof(struct ar2425State)); 695 if (priv == AH_NULL) { 696 HALDEBUG(ah, HAL_DEBUG_ANY, 697 "%s: cannot allocate private state\n", __func__); 698 *status = HAL_ENOMEM; /* XXX */ 699 return AH_FALSE; 700 } 701 priv->base.rfDetach = ar2425RfDetach; 702 priv->base.writeRegs = ar2425WriteRegs; 703 priv->base.getRfBank = ar2425GetRfBank; 704 priv->base.setChannel = ar2425SetChannel; 705 priv->base.setRfRegs = ar2425SetRfRegs; 706 priv->base.setPowerTable = ar2425SetPowerTable; 707 priv->base.getChannelMaxMinPower = ar2425GetChannelMaxMinPower; 708 priv->base.getNfAdjust = ar5212GetNfAdjust; 709 710 ahp->ah_pcdacTable = priv->pcdacTable; 711 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable); 712 ahp->ah_rfHal = &priv->base; 713 714 return AH_TRUE; 715 } 716 717 static HAL_BOOL 718 ar2425Probe(struct ath_hal *ah) 719 { 720 return IS_2425(ah) || IS_2417(ah); 721 } 722 AH_RF(RF2425, ar2425Probe, ar2425RfAttach); 723