1 /* 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $FreeBSD$ 18 */ 19 #include "opt_ah.h" 20 21 #include "ah.h" 22 #include "ah_internal.h" 23 24 #include "ah_eeprom_v3.h" 25 26 #include "ar5212/ar5212.h" 27 #include "ar5212/ar5212reg.h" 28 #include "ar5212/ar5212phy.h" 29 30 #define AH_5212_5111 31 #include "ar5212/ar5212.ini" 32 33 #define N(a) (sizeof(a)/sizeof(a[0])) 34 35 struct ar5111State { 36 RF_HAL_FUNCS base; /* public state, must be first */ 37 uint16_t pcdacTable[PWR_TABLE_SIZE]; 38 39 uint32_t Bank0Data[N(ar5212Bank0_5111)]; 40 uint32_t Bank1Data[N(ar5212Bank1_5111)]; 41 uint32_t Bank2Data[N(ar5212Bank2_5111)]; 42 uint32_t Bank3Data[N(ar5212Bank3_5111)]; 43 uint32_t Bank6Data[N(ar5212Bank6_5111)]; 44 uint32_t Bank7Data[N(ar5212Bank7_5111)]; 45 }; 46 #define AR5111(ah) ((struct ar5111State *) AH5212(ah)->ah_rfHal) 47 48 static uint16_t ar5212GetScaledPower(uint16_t channel, uint16_t pcdacValue, 49 const PCDACS_EEPROM *pSrcStruct); 50 static HAL_BOOL ar5212FindValueInList(uint16_t channel, uint16_t pcdacValue, 51 const PCDACS_EEPROM *pSrcStruct, uint16_t *powerValue); 52 static void ar5212GetLowerUpperPcdacs(uint16_t pcdac, uint16_t channel, 53 const PCDACS_EEPROM *pSrcStruct, 54 uint16_t *pLowerPcdac, uint16_t *pUpperPcdac); 55 56 extern void ar5212GetLowerUpperValues(uint16_t value, 57 const uint16_t *pList, uint16_t listSize, 58 uint16_t *pLowerValue, uint16_t *pUpperValue); 59 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 60 uint32_t numBits, uint32_t firstBit, uint32_t column); 61 62 static void 63 ar5111WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, 64 int writes) 65 { 66 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5111, modesIndex, writes); 67 HAL_INI_WRITE_ARRAY(ah, ar5212Common_5111, 1, writes); 68 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_5111, freqIndex, writes); 69 } 70 71 /* 72 * Take the MHz channel value and set the Channel value 73 * 74 * ASSUMES: Writes enabled to analog bus 75 */ 76 static HAL_BOOL 77 ar5111SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) 78 { 79 #define CI_2GHZ_INDEX_CORRECTION 19 80 uint16_t freq = ath_hal_gethwchannel(ah, chan); 81 uint32_t refClk, reg32, data2111; 82 int16_t chan5111, chanIEEE; 83 84 /* 85 * Structure to hold 11b tuning information for 5111/2111 86 * 16 MHz mode, divider ratio = 198 = NP+S. N=16, S=4 or 6, P=12 87 */ 88 typedef struct { 89 uint32_t refClkSel; /* reference clock, 1 for 16 MHz */ 90 uint32_t channelSelect; /* P[7:4]S[3:0] bits */ 91 uint16_t channel5111; /* 11a channel for 5111 */ 92 } CHAN_INFO_2GHZ; 93 94 static const CHAN_INFO_2GHZ chan2GHzData[] = { 95 { 1, 0x46, 96 }, /* 2312 -19 */ 96 { 1, 0x46, 97 }, /* 2317 -18 */ 97 { 1, 0x46, 98 }, /* 2322 -17 */ 98 { 1, 0x46, 99 }, /* 2327 -16 */ 99 { 1, 0x46, 100 }, /* 2332 -15 */ 100 { 1, 0x46, 101 }, /* 2337 -14 */ 101 { 1, 0x46, 102 }, /* 2342 -13 */ 102 { 1, 0x46, 103 }, /* 2347 -12 */ 103 { 1, 0x46, 104 }, /* 2352 -11 */ 104 { 1, 0x46, 105 }, /* 2357 -10 */ 105 { 1, 0x46, 106 }, /* 2362 -9 */ 106 { 1, 0x46, 107 }, /* 2367 -8 */ 107 { 1, 0x46, 108 }, /* 2372 -7 */ 108 /* index -6 to 0 are pad to make this a nolookup table */ 109 { 1, 0x46, 116 }, /* -6 */ 110 { 1, 0x46, 116 }, /* -5 */ 111 { 1, 0x46, 116 }, /* -4 */ 112 { 1, 0x46, 116 }, /* -3 */ 113 { 1, 0x46, 116 }, /* -2 */ 114 { 1, 0x46, 116 }, /* -1 */ 115 { 1, 0x46, 116 }, /* 0 */ 116 { 1, 0x46, 116 }, /* 2412 1 */ 117 { 1, 0x46, 117 }, /* 2417 2 */ 118 { 1, 0x46, 118 }, /* 2422 3 */ 119 { 1, 0x46, 119 }, /* 2427 4 */ 120 { 1, 0x46, 120 }, /* 2432 5 */ 121 { 1, 0x46, 121 }, /* 2437 6 */ 122 { 1, 0x46, 122 }, /* 2442 7 */ 123 { 1, 0x46, 123 }, /* 2447 8 */ 124 { 1, 0x46, 124 }, /* 2452 9 */ 125 { 1, 0x46, 125 }, /* 2457 10 */ 126 { 1, 0x46, 126 }, /* 2462 11 */ 127 { 1, 0x46, 127 }, /* 2467 12 */ 128 { 1, 0x46, 128 }, /* 2472 13 */ 129 { 1, 0x44, 124 }, /* 2484 14 */ 130 { 1, 0x46, 136 }, /* 2512 15 */ 131 { 1, 0x46, 140 }, /* 2532 16 */ 132 { 1, 0x46, 144 }, /* 2552 17 */ 133 { 1, 0x46, 148 }, /* 2572 18 */ 134 { 1, 0x46, 152 }, /* 2592 19 */ 135 { 1, 0x46, 156 }, /* 2612 20 */ 136 { 1, 0x46, 160 }, /* 2632 21 */ 137 { 1, 0x46, 164 }, /* 2652 22 */ 138 { 1, 0x46, 168 }, /* 2672 23 */ 139 { 1, 0x46, 172 }, /* 2692 24 */ 140 { 1, 0x46, 176 }, /* 2712 25 */ 141 { 1, 0x46, 180 } /* 2732 26 */ 142 }; 143 144 OS_MARK(ah, AH_MARK_SETCHANNEL, freq); 145 146 chanIEEE = chan->ic_ieee; 147 if (IEEE80211_IS_CHAN_2GHZ(chan)) { 148 const CHAN_INFO_2GHZ* ci = 149 &chan2GHzData[chanIEEE + CI_2GHZ_INDEX_CORRECTION]; 150 uint32_t txctl; 151 152 data2111 = ((ath_hal_reverseBits(ci->channelSelect, 8) & 0xff) 153 << 5) 154 | (ci->refClkSel << 4); 155 chan5111 = ci->channel5111; 156 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); 157 if (freq == 2484) { 158 /* Enable channel spreading for channel 14 */ 159 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 160 txctl | AR_PHY_CCK_TX_CTRL_JAPAN); 161 } else { 162 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 163 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); 164 } 165 } else { 166 chan5111 = chanIEEE; /* no conversion needed */ 167 data2111 = 0; 168 } 169 170 /* Rest of the code is common for 5 GHz and 2.4 GHz. */ 171 if (chan5111 >= 145 || (chan5111 & 0x1)) { 172 reg32 = ath_hal_reverseBits(chan5111 - 24, 8) & 0xff; 173 refClk = 1; 174 } else { 175 reg32 = ath_hal_reverseBits(((chan5111 - 24)/2), 8) & 0xff; 176 refClk = 0; 177 } 178 179 reg32 = (reg32 << 2) | (refClk << 1) | (1 << 10) | 0x1; 180 OS_REG_WRITE(ah, AR_PHY(0x27), ((data2111 & 0xff) << 8) | (reg32 & 0xff)); 181 reg32 >>= 8; 182 OS_REG_WRITE(ah, AR_PHY(0x34), (data2111 & 0xff00) | (reg32 & 0xff)); 183 184 AH_PRIVATE(ah)->ah_curchan = chan; 185 return AH_TRUE; 186 #undef CI_2GHZ_INDEX_CORRECTION 187 } 188 189 /* 190 * Return a reference to the requested RF Bank. 191 */ 192 static uint32_t * 193 ar5111GetRfBank(struct ath_hal *ah, int bank) 194 { 195 struct ar5111State *priv = AR5111(ah); 196 197 HALASSERT(priv != AH_NULL); 198 switch (bank) { 199 case 0: return priv->Bank0Data; 200 case 1: return priv->Bank1Data; 201 case 2: return priv->Bank2Data; 202 case 3: return priv->Bank3Data; 203 case 6: return priv->Bank6Data; 204 case 7: return priv->Bank7Data; 205 } 206 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n", 207 __func__, bank); 208 return AH_NULL; 209 } 210 211 /* 212 * Reads EEPROM header info from device structure and programs 213 * all rf registers 214 * 215 * REQUIRES: Access to the analog rf device 216 */ 217 static HAL_BOOL 218 ar5111SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, 219 uint16_t modesIndex, uint16_t *rfXpdGain) 220 { 221 uint16_t freq = ath_hal_gethwchannel(ah, chan); 222 struct ath_hal_5212 *ahp = AH5212(ah); 223 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 224 uint16_t rfXpdGainFixed, rfPloSel, rfPwdXpd, gainI; 225 uint16_t tempOB, tempDB; 226 uint32_t ob2GHz, db2GHz, rfReg[N(ar5212Bank6_5111)]; 227 int i, regWrites = 0; 228 229 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n", 230 __func__, chan->ic_freq, chan->ic_flags, modesIndex); 231 232 /* Setup rf parameters */ 233 switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) { 234 case IEEE80211_CHAN_A: 235 if (4000 < freq && freq < 5260) { 236 tempOB = ee->ee_ob1; 237 tempDB = ee->ee_db1; 238 } else if (5260 <= freq && freq < 5500) { 239 tempOB = ee->ee_ob2; 240 tempDB = ee->ee_db2; 241 } else if (5500 <= freq && freq < 5725) { 242 tempOB = ee->ee_ob3; 243 tempDB = ee->ee_db3; 244 } else if (freq >= 5725) { 245 tempOB = ee->ee_ob4; 246 tempDB = ee->ee_db4; 247 } else { 248 /* XXX when does this happen??? */ 249 tempOB = tempDB = 0; 250 } 251 ob2GHz = db2GHz = 0; 252 253 rfXpdGainFixed = ee->ee_xgain[headerInfo11A]; 254 rfPloSel = ee->ee_xpd[headerInfo11A]; 255 rfPwdXpd = !ee->ee_xpd[headerInfo11A]; 256 gainI = ee->ee_gainI[headerInfo11A]; 257 break; 258 case IEEE80211_CHAN_B: 259 tempOB = ee->ee_obFor24; 260 tempDB = ee->ee_dbFor24; 261 ob2GHz = ee->ee_ob2GHz[0]; 262 db2GHz = ee->ee_db2GHz[0]; 263 264 rfXpdGainFixed = ee->ee_xgain[headerInfo11B]; 265 rfPloSel = ee->ee_xpd[headerInfo11B]; 266 rfPwdXpd = !ee->ee_xpd[headerInfo11B]; 267 gainI = ee->ee_gainI[headerInfo11B]; 268 break; 269 case IEEE80211_CHAN_G: 270 case IEEE80211_CHAN_PUREG: /* NB: really 108G */ 271 tempOB = ee->ee_obFor24g; 272 tempDB = ee->ee_dbFor24g; 273 ob2GHz = ee->ee_ob2GHz[1]; 274 db2GHz = ee->ee_db2GHz[1]; 275 276 rfXpdGainFixed = ee->ee_xgain[headerInfo11G]; 277 rfPloSel = ee->ee_xpd[headerInfo11G]; 278 rfPwdXpd = !ee->ee_xpd[headerInfo11G]; 279 gainI = ee->ee_gainI[headerInfo11G]; 280 break; 281 default: 282 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", 283 __func__, chan->ic_flags); 284 return AH_FALSE; 285 } 286 287 HALASSERT(1 <= tempOB && tempOB <= 5); 288 HALASSERT(1 <= tempDB && tempDB <= 5); 289 290 /* Bank 0 Write */ 291 for (i = 0; i < N(ar5212Bank0_5111); i++) 292 rfReg[i] = ar5212Bank0_5111[i][modesIndex]; 293 if (IEEE80211_IS_CHAN_2GHZ(chan)) { 294 ar5212ModifyRfBuffer(rfReg, ob2GHz, 3, 119, 0); 295 ar5212ModifyRfBuffer(rfReg, db2GHz, 3, 122, 0); 296 } 297 HAL_INI_WRITE_BANK(ah, ar5212Bank0_5111, rfReg, regWrites); 298 299 /* Bank 1 Write */ 300 HAL_INI_WRITE_ARRAY(ah, ar5212Bank1_5111, 1, regWrites); 301 302 /* Bank 2 Write */ 303 HAL_INI_WRITE_ARRAY(ah, ar5212Bank2_5111, modesIndex, regWrites); 304 305 /* Bank 3 Write */ 306 HAL_INI_WRITE_ARRAY(ah, ar5212Bank3_5111, modesIndex, regWrites); 307 308 /* Bank 6 Write */ 309 for (i = 0; i < N(ar5212Bank6_5111); i++) 310 rfReg[i] = ar5212Bank6_5111[i][modesIndex]; 311 if (IEEE80211_IS_CHAN_A(chan)) { /* NB: CHANNEL_A | CHANNEL_T */ 312 ar5212ModifyRfBuffer(rfReg, ee->ee_cornerCal.pd84, 1, 51, 3); 313 ar5212ModifyRfBuffer(rfReg, ee->ee_cornerCal.pd90, 1, 45, 3); 314 } 315 ar5212ModifyRfBuffer(rfReg, rfPwdXpd, 1, 95, 0); 316 ar5212ModifyRfBuffer(rfReg, rfXpdGainFixed, 4, 96, 0); 317 /* Set 5212 OB & DB */ 318 ar5212ModifyRfBuffer(rfReg, tempOB, 3, 104, 0); 319 ar5212ModifyRfBuffer(rfReg, tempDB, 3, 107, 0); 320 HAL_INI_WRITE_BANK(ah, ar5212Bank6_5111, rfReg, regWrites); 321 322 /* Bank 7 Write */ 323 for (i = 0; i < N(ar5212Bank7_5111); i++) 324 rfReg[i] = ar5212Bank7_5111[i][modesIndex]; 325 ar5212ModifyRfBuffer(rfReg, gainI, 6, 29, 0); 326 ar5212ModifyRfBuffer(rfReg, rfPloSel, 1, 4, 0); 327 328 if (IEEE80211_IS_CHAN_QUARTER(chan) || IEEE80211_IS_CHAN_HALF(chan)) { 329 uint32_t rfWaitI, rfWaitS, rfMaxTime; 330 331 rfWaitS = 0x1f; 332 rfWaitI = (IEEE80211_IS_CHAN_HALF(chan)) ? 0x10 : 0x1f; 333 rfMaxTime = 3; 334 ar5212ModifyRfBuffer(rfReg, rfWaitS, 5, 19, 0); 335 ar5212ModifyRfBuffer(rfReg, rfWaitI, 5, 24, 0); 336 ar5212ModifyRfBuffer(rfReg, rfMaxTime, 2, 49, 0); 337 338 } 339 340 HAL_INI_WRITE_BANK(ah, ar5212Bank7_5111, rfReg, regWrites); 341 342 /* Now that we have reprogrammed rfgain value, clear the flag. */ 343 ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE; 344 345 return AH_TRUE; 346 } 347 348 /* 349 * Returns interpolated or the scaled up interpolated value 350 */ 351 static uint16_t 352 interpolate(uint16_t target, uint16_t srcLeft, uint16_t srcRight, 353 uint16_t targetLeft, uint16_t targetRight) 354 { 355 uint16_t rv; 356 int16_t lRatio; 357 358 /* to get an accurate ratio, always scale, if want to scale, then don't scale back down */ 359 if ((targetLeft * targetRight) == 0) 360 return 0; 361 362 if (srcRight != srcLeft) { 363 /* 364 * Note the ratio always need to be scaled, 365 * since it will be a fraction. 366 */ 367 lRatio = (target - srcLeft) * EEP_SCALE / (srcRight - srcLeft); 368 if (lRatio < 0) { 369 /* Return as Left target if value would be negative */ 370 rv = targetLeft; 371 } else if (lRatio > EEP_SCALE) { 372 /* Return as Right target if Ratio is greater than 100% (SCALE) */ 373 rv = targetRight; 374 } else { 375 rv = (lRatio * targetRight + (EEP_SCALE - lRatio) * 376 targetLeft) / EEP_SCALE; 377 } 378 } else { 379 rv = targetLeft; 380 } 381 return rv; 382 } 383 384 /* 385 * Read the transmit power levels from the structures taken from EEPROM 386 * Interpolate read transmit power values for this channel 387 * Organize the transmit power values into a table for writing into the hardware 388 */ 389 static HAL_BOOL 390 ar5111SetPowerTable(struct ath_hal *ah, 391 int16_t *pMinPower, int16_t *pMaxPower, 392 const struct ieee80211_channel *chan, 393 uint16_t *rfXpdGain) 394 { 395 uint16_t freq = ath_hal_gethwchannel(ah, chan); 396 struct ath_hal_5212 *ahp = AH5212(ah); 397 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 398 FULL_PCDAC_STRUCT pcdacStruct; 399 int i, j; 400 401 uint16_t *pPcdacValues; 402 int16_t *pScaledUpDbm; 403 int16_t minScaledPwr; 404 int16_t maxScaledPwr; 405 int16_t pwr; 406 uint16_t pcdacMin = 0; 407 uint16_t pcdacMax = PCDAC_STOP; 408 uint16_t pcdacTableIndex; 409 uint16_t scaledPcdac; 410 PCDACS_EEPROM *pSrcStruct; 411 PCDACS_EEPROM eepromPcdacs; 412 413 /* setup the pcdac struct to point to the correct info, based on mode */ 414 switch (chan->ic_flags & IEEE80211_CHAN_ALLTURBOFULL) { 415 case IEEE80211_CHAN_A: 416 case IEEE80211_CHAN_ST: 417 eepromPcdacs.numChannels = ee->ee_numChannels11a; 418 eepromPcdacs.pChannelList = ee->ee_channels11a; 419 eepromPcdacs.pDataPerChannel = ee->ee_dataPerChannel11a; 420 break; 421 case IEEE80211_CHAN_B: 422 eepromPcdacs.numChannels = ee->ee_numChannels2_4; 423 eepromPcdacs.pChannelList = ee->ee_channels11b; 424 eepromPcdacs.pDataPerChannel = ee->ee_dataPerChannel11b; 425 break; 426 case IEEE80211_CHAN_G: 427 case IEEE80211_CHAN_108G: 428 eepromPcdacs.numChannels = ee->ee_numChannels2_4; 429 eepromPcdacs.pChannelList = ee->ee_channels11g; 430 eepromPcdacs.pDataPerChannel = ee->ee_dataPerChannel11g; 431 break; 432 default: 433 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", 434 __func__, chan->ic_flags); 435 return AH_FALSE; 436 } 437 438 pSrcStruct = &eepromPcdacs; 439 440 OS_MEMZERO(&pcdacStruct, sizeof(pcdacStruct)); 441 pPcdacValues = pcdacStruct.PcdacValues; 442 pScaledUpDbm = pcdacStruct.PwrValues; 443 444 /* Initialize the pcdacs to dBM structs pcdacs to be 1 to 63 */ 445 for (i = PCDAC_START, j = 0; i <= PCDAC_STOP; i+= PCDAC_STEP, j++) 446 pPcdacValues[j] = i; 447 448 pcdacStruct.numPcdacValues = j; 449 pcdacStruct.pcdacMin = PCDAC_START; 450 pcdacStruct.pcdacMax = PCDAC_STOP; 451 452 /* Fill out the power values for this channel */ 453 for (j = 0; j < pcdacStruct.numPcdacValues; j++ ) 454 pScaledUpDbm[j] = ar5212GetScaledPower(freq, 455 pPcdacValues[j], pSrcStruct); 456 457 /* Now scale the pcdac values to fit in the 64 entry power table */ 458 minScaledPwr = pScaledUpDbm[0]; 459 maxScaledPwr = pScaledUpDbm[pcdacStruct.numPcdacValues - 1]; 460 461 /* find minimum and make monotonic */ 462 for (j = 0; j < pcdacStruct.numPcdacValues; j++) { 463 if (minScaledPwr >= pScaledUpDbm[j]) { 464 minScaledPwr = pScaledUpDbm[j]; 465 pcdacMin = j; 466 } 467 /* 468 * Make the full_hsh monotonically increasing otherwise 469 * interpolation algorithm will get fooled gotta start 470 * working from the top, hence i = 63 - j. 471 */ 472 i = (uint16_t)(pcdacStruct.numPcdacValues - 1 - j); 473 if (i == 0) 474 break; 475 if (pScaledUpDbm[i-1] > pScaledUpDbm[i]) { 476 /* 477 * It could be a glitch, so make the power for 478 * this pcdac the same as the power from the 479 * next highest pcdac. 480 */ 481 pScaledUpDbm[i - 1] = pScaledUpDbm[i]; 482 } 483 } 484 485 for (j = 0; j < pcdacStruct.numPcdacValues; j++) 486 if (maxScaledPwr < pScaledUpDbm[j]) { 487 maxScaledPwr = pScaledUpDbm[j]; 488 pcdacMax = j; 489 } 490 491 /* Find the first power level with a pcdac */ 492 pwr = (uint16_t)(PWR_STEP * 493 ((minScaledPwr - PWR_MIN + PWR_STEP / 2) / PWR_STEP) + PWR_MIN); 494 495 /* Write all the first pcdac entries based off the pcdacMin */ 496 pcdacTableIndex = 0; 497 for (i = 0; i < (2 * (pwr - PWR_MIN) / EEP_SCALE + 1); i++) { 498 HALASSERT(pcdacTableIndex < PWR_TABLE_SIZE); 499 ahp->ah_pcdacTable[pcdacTableIndex++] = pcdacMin; 500 } 501 502 i = 0; 503 while (pwr < pScaledUpDbm[pcdacStruct.numPcdacValues - 1] && 504 pcdacTableIndex < PWR_TABLE_SIZE) { 505 pwr += PWR_STEP; 506 /* stop if dbM > max_power_possible */ 507 while (pwr < pScaledUpDbm[pcdacStruct.numPcdacValues - 1] && 508 (pwr - pScaledUpDbm[i])*(pwr - pScaledUpDbm[i+1]) > 0) 509 i++; 510 /* scale by 2 and add 1 to enable round up or down as needed */ 511 scaledPcdac = (uint16_t)(interpolate(pwr, 512 pScaledUpDbm[i], pScaledUpDbm[i + 1], 513 (uint16_t)(pPcdacValues[i] * 2), 514 (uint16_t)(pPcdacValues[i + 1] * 2)) + 1); 515 516 HALASSERT(pcdacTableIndex < PWR_TABLE_SIZE); 517 ahp->ah_pcdacTable[pcdacTableIndex] = scaledPcdac / 2; 518 if (ahp->ah_pcdacTable[pcdacTableIndex] > pcdacMax) 519 ahp->ah_pcdacTable[pcdacTableIndex] = pcdacMax; 520 pcdacTableIndex++; 521 } 522 523 /* Write all the last pcdac entries based off the last valid pcdac */ 524 while (pcdacTableIndex < PWR_TABLE_SIZE) { 525 ahp->ah_pcdacTable[pcdacTableIndex] = 526 ahp->ah_pcdacTable[pcdacTableIndex - 1]; 527 pcdacTableIndex++; 528 } 529 530 /* No power table adjustment for 5111 */ 531 ahp->ah_txPowerIndexOffset = 0; 532 533 return AH_TRUE; 534 } 535 536 /* 537 * Get or interpolate the pcdac value from the calibrated data. 538 */ 539 static uint16_t 540 ar5212GetScaledPower(uint16_t channel, uint16_t pcdacValue, 541 const PCDACS_EEPROM *pSrcStruct) 542 { 543 uint16_t powerValue; 544 uint16_t lFreq, rFreq; /* left and right frequency values */ 545 uint16_t llPcdac, ulPcdac; /* lower and upper left pcdac values */ 546 uint16_t lrPcdac, urPcdac; /* lower and upper right pcdac values */ 547 uint16_t lPwr, uPwr; /* lower and upper temp pwr values */ 548 uint16_t lScaledPwr, rScaledPwr; /* left and right scaled power */ 549 550 if (ar5212FindValueInList(channel, pcdacValue, pSrcStruct, &powerValue)) { 551 /* value was copied from srcStruct */ 552 return powerValue; 553 } 554 555 ar5212GetLowerUpperValues(channel, 556 pSrcStruct->pChannelList, pSrcStruct->numChannels, 557 &lFreq, &rFreq); 558 ar5212GetLowerUpperPcdacs(pcdacValue, 559 lFreq, pSrcStruct, &llPcdac, &ulPcdac); 560 ar5212GetLowerUpperPcdacs(pcdacValue, 561 rFreq, pSrcStruct, &lrPcdac, &urPcdac); 562 563 lPwr = 0; /* avoid gcc warnings */ 564 uPwr = 0; /* avoid gcc warnings */ 565 /* get the power index for the pcdac value */ 566 ar5212FindValueInList(lFreq, llPcdac, pSrcStruct, &lPwr); 567 ar5212FindValueInList(lFreq, ulPcdac, pSrcStruct, &uPwr); 568 lScaledPwr = interpolate(pcdacValue, llPcdac, ulPcdac, lPwr, uPwr); 569 570 ar5212FindValueInList(rFreq, lrPcdac, pSrcStruct, &lPwr); 571 ar5212FindValueInList(rFreq, urPcdac, pSrcStruct, &uPwr); 572 rScaledPwr = interpolate(pcdacValue, lrPcdac, urPcdac, lPwr, uPwr); 573 574 return interpolate(channel, lFreq, rFreq, lScaledPwr, rScaledPwr); 575 } 576 577 /* 578 * Find the value from the calibrated source data struct 579 */ 580 static HAL_BOOL 581 ar5212FindValueInList(uint16_t channel, uint16_t pcdacValue, 582 const PCDACS_EEPROM *pSrcStruct, uint16_t *powerValue) 583 { 584 const DATA_PER_CHANNEL *pChannelData = pSrcStruct->pDataPerChannel; 585 int i; 586 587 for (i = 0; i < pSrcStruct->numChannels; i++ ) { 588 if (pChannelData->channelValue == channel) { 589 const uint16_t* pPcdac = pChannelData->PcdacValues; 590 int j; 591 592 for (j = 0; j < pChannelData->numPcdacValues; j++ ) { 593 if (*pPcdac == pcdacValue) { 594 *powerValue = pChannelData->PwrValues[j]; 595 return AH_TRUE; 596 } 597 pPcdac++; 598 } 599 } 600 pChannelData++; 601 } 602 return AH_FALSE; 603 } 604 605 /* 606 * Get the upper and lower pcdac given the channel and the pcdac 607 * used in the search 608 */ 609 static void 610 ar5212GetLowerUpperPcdacs(uint16_t pcdac, uint16_t channel, 611 const PCDACS_EEPROM *pSrcStruct, 612 uint16_t *pLowerPcdac, uint16_t *pUpperPcdac) 613 { 614 const DATA_PER_CHANNEL *pChannelData = pSrcStruct->pDataPerChannel; 615 int i; 616 617 /* Find the channel information */ 618 for (i = 0; i < pSrcStruct->numChannels; i++) { 619 if (pChannelData->channelValue == channel) 620 break; 621 pChannelData++; 622 } 623 ar5212GetLowerUpperValues(pcdac, pChannelData->PcdacValues, 624 pChannelData->numPcdacValues, 625 pLowerPcdac, pUpperPcdac); 626 } 627 628 static HAL_BOOL 629 ar5111GetChannelMaxMinPower(struct ath_hal *ah, 630 const struct ieee80211_channel *chan, 631 int16_t *maxPow, int16_t *minPow) 632 { 633 /* XXX - Get 5111 power limits! */ 634 /* NB: caller will cope */ 635 return AH_FALSE; 636 } 637 638 /* 639 * Adjust NF based on statistical values for 5GHz frequencies. 640 */ 641 static int16_t 642 ar5111GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c) 643 { 644 static const struct { 645 uint16_t freqLow; 646 int16_t adjust; 647 } adjust5111[] = { 648 { 5790, 6 }, /* NB: ordered high -> low */ 649 { 5730, 4 }, 650 { 5690, 3 }, 651 { 5660, 2 }, 652 { 5610, 1 }, 653 { 5530, 0 }, 654 { 5450, 0 }, 655 { 5379, 1 }, 656 { 5209, 3 }, 657 { 3000, 5 }, 658 { 0, 0 }, 659 }; 660 int i; 661 662 for (i = 0; c->channel <= adjust5111[i].freqLow; i++) 663 ; 664 return adjust5111[i].adjust; 665 } 666 667 /* 668 * Free memory for analog bank scratch buffers 669 */ 670 static void 671 ar5111RfDetach(struct ath_hal *ah) 672 { 673 struct ath_hal_5212 *ahp = AH5212(ah); 674 675 HALASSERT(ahp->ah_rfHal != AH_NULL); 676 ath_hal_free(ahp->ah_rfHal); 677 ahp->ah_rfHal = AH_NULL; 678 } 679 680 /* 681 * Allocate memory for analog bank scratch buffers 682 * Scratch Buffer will be reinitialized every reset so no need to zero now 683 */ 684 static HAL_BOOL 685 ar5111RfAttach(struct ath_hal *ah, HAL_STATUS *status) 686 { 687 struct ath_hal_5212 *ahp = AH5212(ah); 688 struct ar5111State *priv; 689 690 HALASSERT(ah->ah_magic == AR5212_MAGIC); 691 692 HALASSERT(ahp->ah_rfHal == AH_NULL); 693 priv = ath_hal_malloc(sizeof(struct ar5111State)); 694 if (priv == AH_NULL) { 695 HALDEBUG(ah, HAL_DEBUG_ANY, 696 "%s: cannot allocate private state\n", __func__); 697 *status = HAL_ENOMEM; /* XXX */ 698 return AH_FALSE; 699 } 700 priv->base.rfDetach = ar5111RfDetach; 701 priv->base.writeRegs = ar5111WriteRegs; 702 priv->base.getRfBank = ar5111GetRfBank; 703 priv->base.setChannel = ar5111SetChannel; 704 priv->base.setRfRegs = ar5111SetRfRegs; 705 priv->base.setPowerTable = ar5111SetPowerTable; 706 priv->base.getChannelMaxMinPower = ar5111GetChannelMaxMinPower; 707 priv->base.getNfAdjust = ar5111GetNfAdjust; 708 709 ahp->ah_pcdacTable = priv->pcdacTable; 710 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable); 711 ahp->ah_rfHal = &priv->base; 712 713 return AH_TRUE; 714 } 715 716 static HAL_BOOL 717 ar5111Probe(struct ath_hal *ah) 718 { 719 return IS_RAD5111(ah); 720 } 721 AH_RF(RF5111, ar5111Probe, ar5111RfAttach); 722