1572ff6f6SMatthew Dillon /*
2572ff6f6SMatthew Dillon * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3572ff6f6SMatthew Dillon * Copyright (c) 2002-2008 Atheros Communications, Inc.
4572ff6f6SMatthew Dillon *
5572ff6f6SMatthew Dillon * Permission to use, copy, modify, and/or distribute this software for any
6572ff6f6SMatthew Dillon * purpose with or without fee is hereby granted, provided that the above
7572ff6f6SMatthew Dillon * copyright notice and this permission notice appear in all copies.
8572ff6f6SMatthew Dillon *
9572ff6f6SMatthew Dillon * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10572ff6f6SMatthew Dillon * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11572ff6f6SMatthew Dillon * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12572ff6f6SMatthew Dillon * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13572ff6f6SMatthew Dillon * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14572ff6f6SMatthew Dillon * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15572ff6f6SMatthew Dillon * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16572ff6f6SMatthew Dillon *
17572ff6f6SMatthew Dillon * $FreeBSD$
18572ff6f6SMatthew Dillon */
19572ff6f6SMatthew Dillon #include "opt_ah.h"
20572ff6f6SMatthew Dillon
21572ff6f6SMatthew Dillon #include "ah.h"
22572ff6f6SMatthew Dillon #include "ah_internal.h"
23572ff6f6SMatthew Dillon #include "ah_desc.h"
24572ff6f6SMatthew Dillon
25572ff6f6SMatthew Dillon #include "ar5212/ar5212.h"
26572ff6f6SMatthew Dillon #include "ar5212/ar5212reg.h"
27572ff6f6SMatthew Dillon #include "ar5212/ar5212phy.h"
28572ff6f6SMatthew Dillon
29572ff6f6SMatthew Dillon /*
30572ff6f6SMatthew Dillon * Anti noise immunity support. We track phy errors and react
31572ff6f6SMatthew Dillon * to excessive errors by adjusting the noise immunity parameters.
32572ff6f6SMatthew Dillon */
33572ff6f6SMatthew Dillon
34572ff6f6SMatthew Dillon #define HAL_EP_RND(x, mul) \
35572ff6f6SMatthew Dillon ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
36572ff6f6SMatthew Dillon #define BEACON_RSSI(ahp) \
37572ff6f6SMatthew Dillon HAL_EP_RND(ahp->ah_stats.ast_nodestats.ns_avgbrssi, \
38572ff6f6SMatthew Dillon HAL_RSSI_EP_MULTIPLIER)
39572ff6f6SMatthew Dillon
40572ff6f6SMatthew Dillon /*
41572ff6f6SMatthew Dillon * ANI processing tunes radio parameters according to PHY errors
42572ff6f6SMatthew Dillon * and related information. This is done for for noise and spur
43572ff6f6SMatthew Dillon * immunity in all operating modes if the device indicates it's
44572ff6f6SMatthew Dillon * capable at attach time. In addition, when there is a reference
45572ff6f6SMatthew Dillon * rssi value (e.g. beacon frames from an ap in station mode)
46572ff6f6SMatthew Dillon * further tuning is done.
47572ff6f6SMatthew Dillon *
48572ff6f6SMatthew Dillon * ANI_ENA indicates whether any ANI processing should be done;
49572ff6f6SMatthew Dillon * this is specified at attach time.
50572ff6f6SMatthew Dillon *
51572ff6f6SMatthew Dillon * ANI_ENA_RSSI indicates whether rssi-based processing should
52572ff6f6SMatthew Dillon * done, this is enabled based on operating mode and is meaningful
53572ff6f6SMatthew Dillon * only if ANI_ENA is true.
54572ff6f6SMatthew Dillon *
55572ff6f6SMatthew Dillon * ANI parameters are typically controlled only by the hal. The
56572ff6f6SMatthew Dillon * AniControl interface however permits manual tuning through the
57572ff6f6SMatthew Dillon * diagnostic api.
58572ff6f6SMatthew Dillon */
59572ff6f6SMatthew Dillon #define ANI_ENA(ah) \
60572ff6f6SMatthew Dillon (AH5212(ah)->ah_procPhyErr & HAL_ANI_ENA)
61572ff6f6SMatthew Dillon #define ANI_ENA_RSSI(ah) \
62572ff6f6SMatthew Dillon (AH5212(ah)->ah_procPhyErr & HAL_RSSI_ANI_ENA)
63572ff6f6SMatthew Dillon
64572ff6f6SMatthew Dillon #define ah_mibStats ah_stats.ast_mibstats
65572ff6f6SMatthew Dillon
66572ff6f6SMatthew Dillon static void
enableAniMIBCounters(struct ath_hal * ah,const struct ar5212AniParams * params)67572ff6f6SMatthew Dillon enableAniMIBCounters(struct ath_hal *ah, const struct ar5212AniParams *params)
68572ff6f6SMatthew Dillon {
69572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
70572ff6f6SMatthew Dillon
71572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: Enable mib counters: "
72572ff6f6SMatthew Dillon "OfdmPhyErrBase 0x%x cckPhyErrBase 0x%x\n",
73572ff6f6SMatthew Dillon __func__, params->ofdmPhyErrBase, params->cckPhyErrBase);
74572ff6f6SMatthew Dillon
75572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_FILTOFDM, 0);
76572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_FILTCCK, 0);
77572ff6f6SMatthew Dillon
78572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHYCNT1, params->ofdmPhyErrBase);
79572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHYCNT2, params->cckPhyErrBase);
80572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHYCNTMASK1, AR_PHY_ERR_OFDM_TIMING);
81572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHYCNTMASK2, AR_PHY_ERR_CCK_TIMING);
82572ff6f6SMatthew Dillon
83572ff6f6SMatthew Dillon ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); /* save+clear counters*/
84572ff6f6SMatthew Dillon ar5212EnableMibCounters(ah); /* enable everything */
85572ff6f6SMatthew Dillon }
86572ff6f6SMatthew Dillon
87572ff6f6SMatthew Dillon static void
disableAniMIBCounters(struct ath_hal * ah)88572ff6f6SMatthew Dillon disableAniMIBCounters(struct ath_hal *ah)
89572ff6f6SMatthew Dillon {
90572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
91572ff6f6SMatthew Dillon
92572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "Disable MIB counters\n");
93572ff6f6SMatthew Dillon
94572ff6f6SMatthew Dillon ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); /* save stats */
95572ff6f6SMatthew Dillon ar5212DisableMibCounters(ah); /* disable everything */
96572ff6f6SMatthew Dillon
97572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHYCNTMASK1, 0);
98572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHYCNTMASK2, 0);
99572ff6f6SMatthew Dillon }
100572ff6f6SMatthew Dillon
101572ff6f6SMatthew Dillon /*
102572ff6f6SMatthew Dillon * Return the current ANI state of the channel we're on
103572ff6f6SMatthew Dillon */
104572ff6f6SMatthew Dillon struct ar5212AniState *
ar5212AniGetCurrentState(struct ath_hal * ah)105572ff6f6SMatthew Dillon ar5212AniGetCurrentState(struct ath_hal *ah)
106572ff6f6SMatthew Dillon {
107572ff6f6SMatthew Dillon return AH5212(ah)->ah_curani;
108572ff6f6SMatthew Dillon }
109572ff6f6SMatthew Dillon
110572ff6f6SMatthew Dillon /*
111572ff6f6SMatthew Dillon * Return the current statistics.
112572ff6f6SMatthew Dillon */
113*b14ca477SMatthew Dillon HAL_ANI_STATS *
ar5212AniGetCurrentStats(struct ath_hal * ah)114572ff6f6SMatthew Dillon ar5212AniGetCurrentStats(struct ath_hal *ah)
115572ff6f6SMatthew Dillon {
116572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
117572ff6f6SMatthew Dillon
118572ff6f6SMatthew Dillon /* update mib stats so we return current data */
119572ff6f6SMatthew Dillon /* XXX? side-effects to doing this here? */
120572ff6f6SMatthew Dillon ar5212UpdateMibCounters(ah, &ahp->ah_mibStats);
121572ff6f6SMatthew Dillon return &ahp->ah_stats;
122572ff6f6SMatthew Dillon }
123572ff6f6SMatthew Dillon
124572ff6f6SMatthew Dillon static void
setPhyErrBase(struct ath_hal * ah,struct ar5212AniParams * params)125572ff6f6SMatthew Dillon setPhyErrBase(struct ath_hal *ah, struct ar5212AniParams *params)
126572ff6f6SMatthew Dillon {
127572ff6f6SMatthew Dillon if (params->ofdmTrigHigh >= AR_PHY_COUNTMAX) {
128572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANY,
129572ff6f6SMatthew Dillon "OFDM Trigger %d is too high for hw counters, using max\n",
130572ff6f6SMatthew Dillon params->ofdmTrigHigh);
131572ff6f6SMatthew Dillon params->ofdmPhyErrBase = 0;
132572ff6f6SMatthew Dillon } else
133572ff6f6SMatthew Dillon params->ofdmPhyErrBase = AR_PHY_COUNTMAX - params->ofdmTrigHigh;
134572ff6f6SMatthew Dillon if (params->cckTrigHigh >= AR_PHY_COUNTMAX) {
135572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANY,
136572ff6f6SMatthew Dillon "CCK Trigger %d is too high for hw counters, using max\n",
137572ff6f6SMatthew Dillon params->cckTrigHigh);
138572ff6f6SMatthew Dillon params->cckPhyErrBase = 0;
139572ff6f6SMatthew Dillon } else
140572ff6f6SMatthew Dillon params->cckPhyErrBase = AR_PHY_COUNTMAX - params->cckTrigHigh;
141572ff6f6SMatthew Dillon }
142572ff6f6SMatthew Dillon
143572ff6f6SMatthew Dillon /*
144572ff6f6SMatthew Dillon * Setup ANI handling. Sets all thresholds and reset the
145572ff6f6SMatthew Dillon * channel statistics. Note that ar5212AniReset should be
146572ff6f6SMatthew Dillon * called by ar5212Reset before anything else happens and
147572ff6f6SMatthew Dillon * that's where we force initial settings.
148572ff6f6SMatthew Dillon */
149572ff6f6SMatthew Dillon void
ar5212AniAttach(struct ath_hal * ah,const struct ar5212AniParams * params24,const struct ar5212AniParams * params5,HAL_BOOL enable)150572ff6f6SMatthew Dillon ar5212AniAttach(struct ath_hal *ah, const struct ar5212AniParams *params24,
151572ff6f6SMatthew Dillon const struct ar5212AniParams *params5, HAL_BOOL enable)
152572ff6f6SMatthew Dillon {
153572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
154572ff6f6SMatthew Dillon
155572ff6f6SMatthew Dillon ahp->ah_hasHwPhyCounters =
156572ff6f6SMatthew Dillon AH_PRIVATE(ah)->ah_caps.halHwPhyCounterSupport;
157572ff6f6SMatthew Dillon
158572ff6f6SMatthew Dillon if (params24 != AH_NULL) {
159572ff6f6SMatthew Dillon OS_MEMCPY(&ahp->ah_aniParams24, params24, sizeof(*params24));
160572ff6f6SMatthew Dillon setPhyErrBase(ah, &ahp->ah_aniParams24);
161572ff6f6SMatthew Dillon }
162572ff6f6SMatthew Dillon if (params5 != AH_NULL) {
163572ff6f6SMatthew Dillon OS_MEMCPY(&ahp->ah_aniParams5, params5, sizeof(*params5));
164572ff6f6SMatthew Dillon setPhyErrBase(ah, &ahp->ah_aniParams5);
165572ff6f6SMatthew Dillon }
166572ff6f6SMatthew Dillon
167572ff6f6SMatthew Dillon OS_MEMZERO(ahp->ah_ani, sizeof(ahp->ah_ani));
168572ff6f6SMatthew Dillon if (ahp->ah_hasHwPhyCounters) {
169572ff6f6SMatthew Dillon /* Enable MIB Counters */
170572ff6f6SMatthew Dillon enableAniMIBCounters(ah, &ahp->ah_aniParams24 /*XXX*/);
171572ff6f6SMatthew Dillon }
172572ff6f6SMatthew Dillon if (enable) { /* Enable ani now */
173572ff6f6SMatthew Dillon HALASSERT(params24 != AH_NULL && params5 != AH_NULL);
174572ff6f6SMatthew Dillon ahp->ah_procPhyErr |= HAL_ANI_ENA;
175572ff6f6SMatthew Dillon } else {
176572ff6f6SMatthew Dillon ahp->ah_procPhyErr &= ~HAL_ANI_ENA;
177572ff6f6SMatthew Dillon }
178572ff6f6SMatthew Dillon }
179572ff6f6SMatthew Dillon
180572ff6f6SMatthew Dillon HAL_BOOL
ar5212AniSetParams(struct ath_hal * ah,const struct ar5212AniParams * params24,const struct ar5212AniParams * params5)181572ff6f6SMatthew Dillon ar5212AniSetParams(struct ath_hal *ah, const struct ar5212AniParams *params24,
182572ff6f6SMatthew Dillon const struct ar5212AniParams *params5)
183572ff6f6SMatthew Dillon {
184572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
185572ff6f6SMatthew Dillon HAL_BOOL ena = (ahp->ah_procPhyErr & HAL_ANI_ENA) != 0;
186572ff6f6SMatthew Dillon
187572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_MODE, AH_FALSE);
188572ff6f6SMatthew Dillon
189572ff6f6SMatthew Dillon OS_MEMCPY(&ahp->ah_aniParams24, params24, sizeof(*params24));
190572ff6f6SMatthew Dillon setPhyErrBase(ah, &ahp->ah_aniParams24);
191572ff6f6SMatthew Dillon OS_MEMCPY(&ahp->ah_aniParams5, params5, sizeof(*params5));
192572ff6f6SMatthew Dillon setPhyErrBase(ah, &ahp->ah_aniParams5);
193572ff6f6SMatthew Dillon
194572ff6f6SMatthew Dillon OS_MEMZERO(ahp->ah_ani, sizeof(ahp->ah_ani));
195572ff6f6SMatthew Dillon ar5212AniReset(ah, AH_PRIVATE(ah)->ah_curchan,
196572ff6f6SMatthew Dillon AH_PRIVATE(ah)->ah_opmode, AH_FALSE);
197572ff6f6SMatthew Dillon
198572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_MODE, ena);
199572ff6f6SMatthew Dillon
200572ff6f6SMatthew Dillon return AH_TRUE;
201572ff6f6SMatthew Dillon }
202572ff6f6SMatthew Dillon
203572ff6f6SMatthew Dillon /*
204572ff6f6SMatthew Dillon * Cleanup any ANI state setup.
205572ff6f6SMatthew Dillon */
206572ff6f6SMatthew Dillon void
ar5212AniDetach(struct ath_hal * ah)207572ff6f6SMatthew Dillon ar5212AniDetach(struct ath_hal *ah)
208572ff6f6SMatthew Dillon {
209572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
210572ff6f6SMatthew Dillon
211572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "Detaching Ani\n");
212572ff6f6SMatthew Dillon if (ahp->ah_hasHwPhyCounters)
213572ff6f6SMatthew Dillon disableAniMIBCounters(ah);
214572ff6f6SMatthew Dillon }
215572ff6f6SMatthew Dillon
216572ff6f6SMatthew Dillon /*
217572ff6f6SMatthew Dillon * Control Adaptive Noise Immunity Parameters
218572ff6f6SMatthew Dillon */
219572ff6f6SMatthew Dillon HAL_BOOL
ar5212AniControl(struct ath_hal * ah,HAL_ANI_CMD cmd,int param)220572ff6f6SMatthew Dillon ar5212AniControl(struct ath_hal *ah, HAL_ANI_CMD cmd, int param)
221572ff6f6SMatthew Dillon {
222572ff6f6SMatthew Dillon typedef int TABLE[];
223572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
224572ff6f6SMatthew Dillon struct ar5212AniState *aniState = ahp->ah_curani;
225572ff6f6SMatthew Dillon const struct ar5212AniParams *params = AH_NULL;
226572ff6f6SMatthew Dillon
227572ff6f6SMatthew Dillon /*
228572ff6f6SMatthew Dillon * This function may be called before there's a current
229572ff6f6SMatthew Dillon * channel (eg to disable ANI.)
230572ff6f6SMatthew Dillon */
231572ff6f6SMatthew Dillon if (aniState != AH_NULL)
232572ff6f6SMatthew Dillon params = aniState->params;
233572ff6f6SMatthew Dillon
234572ff6f6SMatthew Dillon OS_MARK(ah, AH_MARK_ANI_CONTROL, cmd);
235572ff6f6SMatthew Dillon
236572ff6f6SMatthew Dillon switch (cmd) {
237572ff6f6SMatthew Dillon case HAL_ANI_NOISE_IMMUNITY_LEVEL: {
238572ff6f6SMatthew Dillon u_int level = param;
239572ff6f6SMatthew Dillon
240572ff6f6SMatthew Dillon if (level > params->maxNoiseImmunityLevel) {
241572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANY,
242572ff6f6SMatthew Dillon "%s: level out of range (%u > %u)\n",
243572ff6f6SMatthew Dillon __func__, level, params->maxNoiseImmunityLevel);
244572ff6f6SMatthew Dillon return AH_FALSE;
245572ff6f6SMatthew Dillon }
246572ff6f6SMatthew Dillon
247572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
248572ff6f6SMatthew Dillon AR_PHY_DESIRED_SZ_TOT_DES, params->totalSizeDesired[level]);
249572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
250572ff6f6SMatthew Dillon AR_PHY_AGC_CTL1_COARSE_LOW, params->coarseLow[level]);
251572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
252572ff6f6SMatthew Dillon AR_PHY_AGC_CTL1_COARSE_HIGH, params->coarseHigh[level]);
253572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
254572ff6f6SMatthew Dillon AR_PHY_FIND_SIG_FIRPWR, params->firpwr[level]);
255572ff6f6SMatthew Dillon
256572ff6f6SMatthew Dillon if (level > aniState->noiseImmunityLevel)
257572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_niup++;
258572ff6f6SMatthew Dillon else if (level < aniState->noiseImmunityLevel)
259572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_nidown++;
260572ff6f6SMatthew Dillon aniState->noiseImmunityLevel = level;
261572ff6f6SMatthew Dillon break;
262572ff6f6SMatthew Dillon }
263572ff6f6SMatthew Dillon case HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION: {
264572ff6f6SMatthew Dillon static const TABLE m1ThreshLow = { 127, 50 };
265572ff6f6SMatthew Dillon static const TABLE m2ThreshLow = { 127, 40 };
266572ff6f6SMatthew Dillon static const TABLE m1Thresh = { 127, 0x4d };
267572ff6f6SMatthew Dillon static const TABLE m2Thresh = { 127, 0x40 };
268572ff6f6SMatthew Dillon static const TABLE m2CountThr = { 31, 16 };
269572ff6f6SMatthew Dillon static const TABLE m2CountThrLow = { 63, 48 };
270572ff6f6SMatthew Dillon u_int on = param ? 1 : 0;
271572ff6f6SMatthew Dillon
272572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
273572ff6f6SMatthew Dillon AR_PHY_SFCORR_LOW_M1_THRESH_LOW, m1ThreshLow[on]);
274572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
275572ff6f6SMatthew Dillon AR_PHY_SFCORR_LOW_M2_THRESH_LOW, m2ThreshLow[on]);
276572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
277572ff6f6SMatthew Dillon AR_PHY_SFCORR_M1_THRESH, m1Thresh[on]);
278572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
279572ff6f6SMatthew Dillon AR_PHY_SFCORR_M2_THRESH, m2Thresh[on]);
280572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
281572ff6f6SMatthew Dillon AR_PHY_SFCORR_M2COUNT_THR, m2CountThr[on]);
282572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
283572ff6f6SMatthew Dillon AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW, m2CountThrLow[on]);
284572ff6f6SMatthew Dillon
285572ff6f6SMatthew Dillon if (on) {
286572ff6f6SMatthew Dillon OS_REG_SET_BIT(ah, AR_PHY_SFCORR_LOW,
287572ff6f6SMatthew Dillon AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
288572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_ofdmon++;
289572ff6f6SMatthew Dillon } else {
290572ff6f6SMatthew Dillon OS_REG_CLR_BIT(ah, AR_PHY_SFCORR_LOW,
291572ff6f6SMatthew Dillon AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
292572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_ofdmoff++;
293572ff6f6SMatthew Dillon }
294572ff6f6SMatthew Dillon aniState->ofdmWeakSigDetectOff = !on;
295572ff6f6SMatthew Dillon break;
296572ff6f6SMatthew Dillon }
297572ff6f6SMatthew Dillon case HAL_ANI_CCK_WEAK_SIGNAL_THR: {
298572ff6f6SMatthew Dillon static const TABLE weakSigThrCck = { 8, 6 };
299572ff6f6SMatthew Dillon u_int high = param ? 1 : 0;
300572ff6f6SMatthew Dillon
301572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT,
302572ff6f6SMatthew Dillon AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK, weakSigThrCck[high]);
303572ff6f6SMatthew Dillon if (high)
304572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_cckhigh++;
305572ff6f6SMatthew Dillon else
306572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_ccklow++;
307572ff6f6SMatthew Dillon aniState->cckWeakSigThreshold = high;
308572ff6f6SMatthew Dillon break;
309572ff6f6SMatthew Dillon }
310572ff6f6SMatthew Dillon case HAL_ANI_FIRSTEP_LEVEL: {
311572ff6f6SMatthew Dillon u_int level = param;
312572ff6f6SMatthew Dillon
313572ff6f6SMatthew Dillon if (level > params->maxFirstepLevel) {
314572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANY,
315572ff6f6SMatthew Dillon "%s: level out of range (%u > %u)\n",
316572ff6f6SMatthew Dillon __func__, level, params->maxFirstepLevel);
317572ff6f6SMatthew Dillon return AH_FALSE;
318572ff6f6SMatthew Dillon }
319572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
320572ff6f6SMatthew Dillon AR_PHY_FIND_SIG_FIRSTEP, params->firstep[level]);
321572ff6f6SMatthew Dillon if (level > aniState->firstepLevel)
322572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_stepup++;
323572ff6f6SMatthew Dillon else if (level < aniState->firstepLevel)
324572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_stepdown++;
325572ff6f6SMatthew Dillon aniState->firstepLevel = level;
326572ff6f6SMatthew Dillon break;
327572ff6f6SMatthew Dillon }
328572ff6f6SMatthew Dillon case HAL_ANI_SPUR_IMMUNITY_LEVEL: {
329572ff6f6SMatthew Dillon u_int level = param;
330572ff6f6SMatthew Dillon
331572ff6f6SMatthew Dillon if (level > params->maxSpurImmunityLevel) {
332572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANY,
333572ff6f6SMatthew Dillon "%s: level out of range (%u > %u)\n",
334572ff6f6SMatthew Dillon __func__, level, params->maxSpurImmunityLevel);
335572ff6f6SMatthew Dillon return AH_FALSE;
336572ff6f6SMatthew Dillon }
337572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5,
338572ff6f6SMatthew Dillon AR_PHY_TIMING5_CYCPWR_THR1, params->cycPwrThr1[level]);
339572ff6f6SMatthew Dillon if (level > aniState->spurImmunityLevel)
340572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_spurup++;
341572ff6f6SMatthew Dillon else if (level < aniState->spurImmunityLevel)
342572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_spurdown++;
343572ff6f6SMatthew Dillon aniState->spurImmunityLevel = level;
344572ff6f6SMatthew Dillon break;
345572ff6f6SMatthew Dillon }
346572ff6f6SMatthew Dillon case HAL_ANI_PRESENT:
347572ff6f6SMatthew Dillon break;
348572ff6f6SMatthew Dillon case HAL_ANI_MODE:
349572ff6f6SMatthew Dillon if (param == 0) {
350572ff6f6SMatthew Dillon ahp->ah_procPhyErr &= ~HAL_ANI_ENA;
351572ff6f6SMatthew Dillon /* Turn off HW counters if we have them */
352572ff6f6SMatthew Dillon ar5212AniDetach(ah);
353572ff6f6SMatthew Dillon ah->ah_setRxFilter(ah,
354572ff6f6SMatthew Dillon ah->ah_getRxFilter(ah) &~ HAL_RX_FILTER_PHYERR);
355572ff6f6SMatthew Dillon } else { /* normal/auto mode */
356572ff6f6SMatthew Dillon /* don't mess with state if already enabled */
357572ff6f6SMatthew Dillon if (ahp->ah_procPhyErr & HAL_ANI_ENA)
358572ff6f6SMatthew Dillon break;
359572ff6f6SMatthew Dillon if (ahp->ah_hasHwPhyCounters) {
360572ff6f6SMatthew Dillon ar5212SetRxFilter(ah,
361572ff6f6SMatthew Dillon ar5212GetRxFilter(ah) &~ HAL_RX_FILTER_PHYERR);
362572ff6f6SMatthew Dillon /* Enable MIB Counters */
363572ff6f6SMatthew Dillon enableAniMIBCounters(ah,
364572ff6f6SMatthew Dillon ahp->ah_curani != AH_NULL ?
365572ff6f6SMatthew Dillon ahp->ah_curani->params:
366572ff6f6SMatthew Dillon &ahp->ah_aniParams24 /*XXX*/);
367572ff6f6SMatthew Dillon } else {
368572ff6f6SMatthew Dillon ah->ah_setRxFilter(ah,
369572ff6f6SMatthew Dillon ah->ah_getRxFilter(ah) | HAL_RX_FILTER_PHYERR);
370572ff6f6SMatthew Dillon }
371572ff6f6SMatthew Dillon ahp->ah_procPhyErr |= HAL_ANI_ENA;
372572ff6f6SMatthew Dillon }
373572ff6f6SMatthew Dillon break;
374572ff6f6SMatthew Dillon #ifdef AH_PRIVATE_DIAG
375572ff6f6SMatthew Dillon case HAL_ANI_PHYERR_RESET:
376572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_ofdmerrs = 0;
377572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_cckerrs = 0;
378572ff6f6SMatthew Dillon break;
379572ff6f6SMatthew Dillon #endif /* AH_PRIVATE_DIAG */
380572ff6f6SMatthew Dillon default:
381572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid cmd %u\n",
382572ff6f6SMatthew Dillon __func__, cmd);
383572ff6f6SMatthew Dillon return AH_FALSE;
384572ff6f6SMatthew Dillon }
385572ff6f6SMatthew Dillon return AH_TRUE;
386572ff6f6SMatthew Dillon }
387572ff6f6SMatthew Dillon
388572ff6f6SMatthew Dillon static void
ar5212AniOfdmErrTrigger(struct ath_hal * ah)389572ff6f6SMatthew Dillon ar5212AniOfdmErrTrigger(struct ath_hal *ah)
390572ff6f6SMatthew Dillon {
391572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
392572ff6f6SMatthew Dillon const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan;
393572ff6f6SMatthew Dillon struct ar5212AniState *aniState;
394572ff6f6SMatthew Dillon const struct ar5212AniParams *params;
395572ff6f6SMatthew Dillon
396572ff6f6SMatthew Dillon HALASSERT(chan != AH_NULL);
397572ff6f6SMatthew Dillon
398572ff6f6SMatthew Dillon if (!ANI_ENA(ah))
399572ff6f6SMatthew Dillon return;
400572ff6f6SMatthew Dillon
401572ff6f6SMatthew Dillon aniState = ahp->ah_curani;
402572ff6f6SMatthew Dillon params = aniState->params;
403572ff6f6SMatthew Dillon /* First, raise noise immunity level, up to max */
404572ff6f6SMatthew Dillon if (aniState->noiseImmunityLevel+1 <= params->maxNoiseImmunityLevel) {
405572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: raise NI to %u\n", __func__,
406572ff6f6SMatthew Dillon aniState->noiseImmunityLevel + 1);
407572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL,
408572ff6f6SMatthew Dillon aniState->noiseImmunityLevel + 1);
409572ff6f6SMatthew Dillon return;
410572ff6f6SMatthew Dillon }
411572ff6f6SMatthew Dillon /* then, raise spur immunity level, up to max */
412572ff6f6SMatthew Dillon if (aniState->spurImmunityLevel+1 <= params->maxSpurImmunityLevel) {
413572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: raise SI to %u\n", __func__,
414572ff6f6SMatthew Dillon aniState->spurImmunityLevel + 1);
415572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL,
416572ff6f6SMatthew Dillon aniState->spurImmunityLevel + 1);
417572ff6f6SMatthew Dillon return;
418572ff6f6SMatthew Dillon }
419572ff6f6SMatthew Dillon
420572ff6f6SMatthew Dillon if (ANI_ENA_RSSI(ah)) {
421572ff6f6SMatthew Dillon int32_t rssi = BEACON_RSSI(ahp);
422572ff6f6SMatthew Dillon if (rssi > params->rssiThrHigh) {
423572ff6f6SMatthew Dillon /*
424572ff6f6SMatthew Dillon * Beacon rssi is high, can turn off ofdm
425572ff6f6SMatthew Dillon * weak sig detect.
426572ff6f6SMatthew Dillon */
427572ff6f6SMatthew Dillon if (!aniState->ofdmWeakSigDetectOff) {
428572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
429572ff6f6SMatthew Dillon "%s: rssi %d OWSD off\n", __func__, rssi);
430572ff6f6SMatthew Dillon ar5212AniControl(ah,
431572ff6f6SMatthew Dillon HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
432572ff6f6SMatthew Dillon AH_FALSE);
433572ff6f6SMatthew Dillon ar5212AniControl(ah,
434572ff6f6SMatthew Dillon HAL_ANI_SPUR_IMMUNITY_LEVEL, 0);
435572ff6f6SMatthew Dillon return;
436572ff6f6SMatthew Dillon }
437572ff6f6SMatthew Dillon /*
438572ff6f6SMatthew Dillon * If weak sig detect is already off, as last resort,
439572ff6f6SMatthew Dillon * raise firstep level
440572ff6f6SMatthew Dillon */
441572ff6f6SMatthew Dillon if (aniState->firstepLevel+1 <= params->maxFirstepLevel) {
442572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
443572ff6f6SMatthew Dillon "%s: rssi %d raise ST %u\n", __func__, rssi,
444572ff6f6SMatthew Dillon aniState->firstepLevel+1);
445572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
446572ff6f6SMatthew Dillon aniState->firstepLevel + 1);
447572ff6f6SMatthew Dillon return;
448572ff6f6SMatthew Dillon }
449572ff6f6SMatthew Dillon } else if (rssi > params->rssiThrLow) {
450572ff6f6SMatthew Dillon /*
451572ff6f6SMatthew Dillon * Beacon rssi in mid range, need ofdm weak signal
452572ff6f6SMatthew Dillon * detect, but we can raise firststepLevel.
453572ff6f6SMatthew Dillon */
454572ff6f6SMatthew Dillon if (aniState->ofdmWeakSigDetectOff) {
455572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
456572ff6f6SMatthew Dillon "%s: rssi %d OWSD on\n", __func__, rssi);
457572ff6f6SMatthew Dillon ar5212AniControl(ah,
458572ff6f6SMatthew Dillon HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
459572ff6f6SMatthew Dillon AH_TRUE);
460572ff6f6SMatthew Dillon }
461572ff6f6SMatthew Dillon if (aniState->firstepLevel+1 <= params->maxFirstepLevel) {
462572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
463572ff6f6SMatthew Dillon "%s: rssi %d raise ST %u\n", __func__, rssi,
464572ff6f6SMatthew Dillon aniState->firstepLevel+1);
465572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
466572ff6f6SMatthew Dillon aniState->firstepLevel + 1);
467572ff6f6SMatthew Dillon }
468572ff6f6SMatthew Dillon return;
469572ff6f6SMatthew Dillon } else {
470572ff6f6SMatthew Dillon /*
471572ff6f6SMatthew Dillon * Beacon rssi is low, if in 11b/g mode, turn off ofdm
472572ff6f6SMatthew Dillon * weak signal detection and zero firstepLevel to
473572ff6f6SMatthew Dillon * maximize CCK sensitivity
474572ff6f6SMatthew Dillon */
475572ff6f6SMatthew Dillon if (IEEE80211_IS_CHAN_CCK(chan)) {
476572ff6f6SMatthew Dillon if (!aniState->ofdmWeakSigDetectOff) {
477572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
478572ff6f6SMatthew Dillon "%s: rssi %d OWSD off\n",
479572ff6f6SMatthew Dillon __func__, rssi);
480572ff6f6SMatthew Dillon ar5212AniControl(ah,
481572ff6f6SMatthew Dillon HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
482572ff6f6SMatthew Dillon AH_FALSE);
483572ff6f6SMatthew Dillon }
484572ff6f6SMatthew Dillon if (aniState->firstepLevel > 0) {
485572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
486572ff6f6SMatthew Dillon "%s: rssi %d zero ST (was %u)\n",
487572ff6f6SMatthew Dillon __func__, rssi,
488572ff6f6SMatthew Dillon aniState->firstepLevel);
489572ff6f6SMatthew Dillon ar5212AniControl(ah,
490572ff6f6SMatthew Dillon HAL_ANI_FIRSTEP_LEVEL, 0);
491572ff6f6SMatthew Dillon }
492572ff6f6SMatthew Dillon return;
493572ff6f6SMatthew Dillon }
494572ff6f6SMatthew Dillon }
495572ff6f6SMatthew Dillon }
496572ff6f6SMatthew Dillon }
497572ff6f6SMatthew Dillon
498572ff6f6SMatthew Dillon static void
ar5212AniCckErrTrigger(struct ath_hal * ah)499572ff6f6SMatthew Dillon ar5212AniCckErrTrigger(struct ath_hal *ah)
500572ff6f6SMatthew Dillon {
501572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
502572ff6f6SMatthew Dillon const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan;
503572ff6f6SMatthew Dillon struct ar5212AniState *aniState;
504572ff6f6SMatthew Dillon const struct ar5212AniParams *params;
505572ff6f6SMatthew Dillon
506572ff6f6SMatthew Dillon HALASSERT(chan != AH_NULL);
507572ff6f6SMatthew Dillon
508572ff6f6SMatthew Dillon if (!ANI_ENA(ah))
509572ff6f6SMatthew Dillon return;
510572ff6f6SMatthew Dillon
511572ff6f6SMatthew Dillon /* first, raise noise immunity level, up to max */
512572ff6f6SMatthew Dillon aniState = ahp->ah_curani;
513572ff6f6SMatthew Dillon params = aniState->params;
514572ff6f6SMatthew Dillon if (aniState->noiseImmunityLevel+1 <= params->maxNoiseImmunityLevel) {
515572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: raise NI to %u\n", __func__,
516572ff6f6SMatthew Dillon aniState->noiseImmunityLevel + 1);
517572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL,
518572ff6f6SMatthew Dillon aniState->noiseImmunityLevel + 1);
519572ff6f6SMatthew Dillon return;
520572ff6f6SMatthew Dillon }
521572ff6f6SMatthew Dillon
522572ff6f6SMatthew Dillon if (ANI_ENA_RSSI(ah)) {
523572ff6f6SMatthew Dillon int32_t rssi = BEACON_RSSI(ahp);
524572ff6f6SMatthew Dillon if (rssi > params->rssiThrLow) {
525572ff6f6SMatthew Dillon /*
526572ff6f6SMatthew Dillon * Beacon signal in mid and high range,
527572ff6f6SMatthew Dillon * raise firstep level.
528572ff6f6SMatthew Dillon */
529572ff6f6SMatthew Dillon if (aniState->firstepLevel+1 <= params->maxFirstepLevel) {
530572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
531572ff6f6SMatthew Dillon "%s: rssi %d raise ST %u\n", __func__, rssi,
532572ff6f6SMatthew Dillon aniState->firstepLevel+1);
533572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
534572ff6f6SMatthew Dillon aniState->firstepLevel + 1);
535572ff6f6SMatthew Dillon }
536572ff6f6SMatthew Dillon } else {
537572ff6f6SMatthew Dillon /*
538572ff6f6SMatthew Dillon * Beacon rssi is low, zero firstep level to maximize
539572ff6f6SMatthew Dillon * CCK sensitivity in 11b/g mode.
540572ff6f6SMatthew Dillon */
541572ff6f6SMatthew Dillon /* XXX can optimize */
542572ff6f6SMatthew Dillon if (IEEE80211_IS_CHAN_B(chan) ||
543572ff6f6SMatthew Dillon IEEE80211_IS_CHAN_G(chan)) {
544572ff6f6SMatthew Dillon if (aniState->firstepLevel > 0) {
545572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
546572ff6f6SMatthew Dillon "%s: rssi %d zero ST (was %u)\n",
547572ff6f6SMatthew Dillon __func__, rssi,
548572ff6f6SMatthew Dillon aniState->firstepLevel);
549572ff6f6SMatthew Dillon ar5212AniControl(ah,
550572ff6f6SMatthew Dillon HAL_ANI_FIRSTEP_LEVEL, 0);
551572ff6f6SMatthew Dillon }
552572ff6f6SMatthew Dillon }
553572ff6f6SMatthew Dillon }
554572ff6f6SMatthew Dillon }
555572ff6f6SMatthew Dillon }
556572ff6f6SMatthew Dillon
557572ff6f6SMatthew Dillon static void
ar5212AniRestart(struct ath_hal * ah,struct ar5212AniState * aniState)558572ff6f6SMatthew Dillon ar5212AniRestart(struct ath_hal *ah, struct ar5212AniState *aniState)
559572ff6f6SMatthew Dillon {
560572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
561572ff6f6SMatthew Dillon
562572ff6f6SMatthew Dillon aniState->listenTime = 0;
563572ff6f6SMatthew Dillon if (ahp->ah_hasHwPhyCounters) {
564572ff6f6SMatthew Dillon const struct ar5212AniParams *params = aniState->params;
565572ff6f6SMatthew Dillon /*
566572ff6f6SMatthew Dillon * NB: these are written on reset based on the
567572ff6f6SMatthew Dillon * ini so we must re-write them!
568572ff6f6SMatthew Dillon */
569572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHYCNT1, params->ofdmPhyErrBase);
570572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHYCNT2, params->cckPhyErrBase);
571572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHYCNTMASK1, AR_PHY_ERR_OFDM_TIMING);
572572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHYCNTMASK2, AR_PHY_ERR_CCK_TIMING);
573572ff6f6SMatthew Dillon
574572ff6f6SMatthew Dillon /* Clear the mib counters and save them in the stats */
575572ff6f6SMatthew Dillon ar5212UpdateMibCounters(ah, &ahp->ah_mibStats);
576572ff6f6SMatthew Dillon }
577572ff6f6SMatthew Dillon aniState->ofdmPhyErrCount = 0;
578572ff6f6SMatthew Dillon aniState->cckPhyErrCount = 0;
579572ff6f6SMatthew Dillon }
580572ff6f6SMatthew Dillon
581572ff6f6SMatthew Dillon /*
582572ff6f6SMatthew Dillon * Restore/reset the ANI parameters and reset the statistics.
583572ff6f6SMatthew Dillon * This routine must be called for every channel change.
584572ff6f6SMatthew Dillon */
585572ff6f6SMatthew Dillon void
ar5212AniReset(struct ath_hal * ah,const struct ieee80211_channel * chan,HAL_OPMODE opmode,int restore)586572ff6f6SMatthew Dillon ar5212AniReset(struct ath_hal *ah, const struct ieee80211_channel *chan,
587572ff6f6SMatthew Dillon HAL_OPMODE opmode, int restore)
588572ff6f6SMatthew Dillon {
589572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
590572ff6f6SMatthew Dillon HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan);
591572ff6f6SMatthew Dillon /* XXX bounds check ic_devdata */
592572ff6f6SMatthew Dillon struct ar5212AniState *aniState = &ahp->ah_ani[chan->ic_devdata];
593572ff6f6SMatthew Dillon uint32_t rxfilter;
594572ff6f6SMatthew Dillon
595572ff6f6SMatthew Dillon if ((ichan->privFlags & CHANNEL_ANI_INIT) == 0) {
596572ff6f6SMatthew Dillon OS_MEMZERO(aniState, sizeof(*aniState));
597572ff6f6SMatthew Dillon if (IEEE80211_IS_CHAN_2GHZ(chan))
598572ff6f6SMatthew Dillon aniState->params = &ahp->ah_aniParams24;
599572ff6f6SMatthew Dillon else
600572ff6f6SMatthew Dillon aniState->params = &ahp->ah_aniParams5;
601572ff6f6SMatthew Dillon ichan->privFlags |= CHANNEL_ANI_INIT;
602572ff6f6SMatthew Dillon HALASSERT((ichan->privFlags & CHANNEL_ANI_SETUP) == 0);
603572ff6f6SMatthew Dillon }
604572ff6f6SMatthew Dillon ahp->ah_curani = aniState;
605572ff6f6SMatthew Dillon #if 0
606572ff6f6SMatthew Dillon ath_hal_printf(ah,"%s: chan %u/0x%x restore %d opmode %u%s\n",
607572ff6f6SMatthew Dillon __func__, chan->ic_freq, chan->ic_flags, restore, opmode,
608572ff6f6SMatthew Dillon ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : "");
609572ff6f6SMatthew Dillon #else
610572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: chan %u/0x%x restore %d opmode %u%s\n",
611572ff6f6SMatthew Dillon __func__, chan->ic_freq, chan->ic_flags, restore, opmode,
612572ff6f6SMatthew Dillon ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : "");
613572ff6f6SMatthew Dillon #endif
614572ff6f6SMatthew Dillon OS_MARK(ah, AH_MARK_ANI_RESET, opmode);
615572ff6f6SMatthew Dillon
616572ff6f6SMatthew Dillon /*
617572ff6f6SMatthew Dillon * Turn off PHY error frame delivery while we futz with settings.
618572ff6f6SMatthew Dillon */
619572ff6f6SMatthew Dillon rxfilter = ah->ah_getRxFilter(ah);
620572ff6f6SMatthew Dillon ah->ah_setRxFilter(ah, rxfilter &~ HAL_RX_FILTER_PHYERR);
621572ff6f6SMatthew Dillon
622572ff6f6SMatthew Dillon /*
623572ff6f6SMatthew Dillon * If ANI is disabled at this point, don't set the default
624572ff6f6SMatthew Dillon * ANI parameter settings - leave the HAL settings there.
625572ff6f6SMatthew Dillon * This is (currently) needed for reliable radar detection.
626572ff6f6SMatthew Dillon */
627572ff6f6SMatthew Dillon if (! ANI_ENA(ah)) {
628572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: ANI disabled\n",
629572ff6f6SMatthew Dillon __func__);
630572ff6f6SMatthew Dillon goto finish;
631572ff6f6SMatthew Dillon }
632572ff6f6SMatthew Dillon
633572ff6f6SMatthew Dillon /*
634572ff6f6SMatthew Dillon * Automatic processing is done only in station mode right now.
635572ff6f6SMatthew Dillon */
636572ff6f6SMatthew Dillon if (opmode == HAL_M_STA)
637572ff6f6SMatthew Dillon ahp->ah_procPhyErr |= HAL_RSSI_ANI_ENA;
638572ff6f6SMatthew Dillon else
639572ff6f6SMatthew Dillon ahp->ah_procPhyErr &= ~HAL_RSSI_ANI_ENA;
640572ff6f6SMatthew Dillon /*
641572ff6f6SMatthew Dillon * Set all ani parameters. We either set them to initial
642572ff6f6SMatthew Dillon * values or restore the previous ones for the channel.
643572ff6f6SMatthew Dillon * XXX if ANI follows hardware, we don't care what mode we're
644572ff6f6SMatthew Dillon * XXX in, we should keep the ani parameters
645572ff6f6SMatthew Dillon */
646572ff6f6SMatthew Dillon if (restore && (ichan->privFlags & CHANNEL_ANI_SETUP)) {
647572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL,
648572ff6f6SMatthew Dillon aniState->noiseImmunityLevel);
649572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL,
650572ff6f6SMatthew Dillon aniState->spurImmunityLevel);
651572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
652572ff6f6SMatthew Dillon !aniState->ofdmWeakSigDetectOff);
653572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_CCK_WEAK_SIGNAL_THR,
654572ff6f6SMatthew Dillon aniState->cckWeakSigThreshold);
655572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
656572ff6f6SMatthew Dillon aniState->firstepLevel);
657572ff6f6SMatthew Dillon } else {
658572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 0);
659572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, 0);
660572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
661572ff6f6SMatthew Dillon AH_TRUE);
662572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_CCK_WEAK_SIGNAL_THR, AH_FALSE);
663572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 0);
664572ff6f6SMatthew Dillon ichan->privFlags |= CHANNEL_ANI_SETUP;
665572ff6f6SMatthew Dillon }
666572ff6f6SMatthew Dillon /*
667572ff6f6SMatthew Dillon * In case the counters haven't yet been setup; set them up.
668572ff6f6SMatthew Dillon */
669572ff6f6SMatthew Dillon enableAniMIBCounters(ah, ahp->ah_curani->params);
670572ff6f6SMatthew Dillon ar5212AniRestart(ah, aniState);
671572ff6f6SMatthew Dillon
672572ff6f6SMatthew Dillon finish:
673572ff6f6SMatthew Dillon /* restore RX filter mask */
674572ff6f6SMatthew Dillon ah->ah_setRxFilter(ah, rxfilter);
675572ff6f6SMatthew Dillon }
676572ff6f6SMatthew Dillon
677572ff6f6SMatthew Dillon /*
678572ff6f6SMatthew Dillon * Process a MIB interrupt. We may potentially be invoked because
679572ff6f6SMatthew Dillon * any of the MIB counters overflow/trigger so don't assume we're
680572ff6f6SMatthew Dillon * here because a PHY error counter triggered.
681572ff6f6SMatthew Dillon */
682572ff6f6SMatthew Dillon void
ar5212ProcessMibIntr(struct ath_hal * ah,const HAL_NODE_STATS * stats)683572ff6f6SMatthew Dillon ar5212ProcessMibIntr(struct ath_hal *ah, const HAL_NODE_STATS *stats)
684572ff6f6SMatthew Dillon {
685572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
686572ff6f6SMatthew Dillon uint32_t phyCnt1, phyCnt2;
687572ff6f6SMatthew Dillon
688572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: mibc 0x%x phyCnt1 0x%x phyCnt2 0x%x "
689572ff6f6SMatthew Dillon "filtofdm 0x%x filtcck 0x%x\n",
690572ff6f6SMatthew Dillon __func__, OS_REG_READ(ah, AR_MIBC),
691572ff6f6SMatthew Dillon OS_REG_READ(ah, AR_PHYCNT1), OS_REG_READ(ah, AR_PHYCNT2),
692572ff6f6SMatthew Dillon OS_REG_READ(ah, AR_FILTOFDM), OS_REG_READ(ah, AR_FILTCCK));
693572ff6f6SMatthew Dillon
694572ff6f6SMatthew Dillon /*
695572ff6f6SMatthew Dillon * First order of business is to clear whatever caused
696572ff6f6SMatthew Dillon * the interrupt so we don't keep getting interrupted.
697572ff6f6SMatthew Dillon * We have the usual mib counters that are reset-on-read
698572ff6f6SMatthew Dillon * and the additional counters that appeared starting in
699572ff6f6SMatthew Dillon * Hainan. We collect the mib counters and explicitly
700572ff6f6SMatthew Dillon * zero additional counters we are not using. Anything
701572ff6f6SMatthew Dillon * else is reset only if it caused the interrupt.
702572ff6f6SMatthew Dillon */
703572ff6f6SMatthew Dillon /* NB: these are not reset-on-read */
704572ff6f6SMatthew Dillon phyCnt1 = OS_REG_READ(ah, AR_PHYCNT1);
705572ff6f6SMatthew Dillon phyCnt2 = OS_REG_READ(ah, AR_PHYCNT2);
706572ff6f6SMatthew Dillon /* not used, always reset them in case they are the cause */
707572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_FILTOFDM, 0);
708572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_FILTCCK, 0);
709572ff6f6SMatthew Dillon
710572ff6f6SMatthew Dillon /* Clear the mib counters and save them in the stats */
711572ff6f6SMatthew Dillon ar5212UpdateMibCounters(ah, &ahp->ah_mibStats);
712572ff6f6SMatthew Dillon ahp->ah_stats.ast_nodestats = *stats;
713572ff6f6SMatthew Dillon
714572ff6f6SMatthew Dillon /*
715572ff6f6SMatthew Dillon * Check for an ani stat hitting the trigger threshold.
716572ff6f6SMatthew Dillon * When this happens we get a MIB interrupt and the top
717572ff6f6SMatthew Dillon * 2 bits of the counter register will be 0b11, hence
718572ff6f6SMatthew Dillon * the mask check of phyCnt?.
719572ff6f6SMatthew Dillon */
720572ff6f6SMatthew Dillon if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) ||
721572ff6f6SMatthew Dillon ((phyCnt2 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK)) {
722572ff6f6SMatthew Dillon struct ar5212AniState *aniState = ahp->ah_curani;
723572ff6f6SMatthew Dillon const struct ar5212AniParams *params = aniState->params;
724572ff6f6SMatthew Dillon uint32_t ofdmPhyErrCnt, cckPhyErrCnt;
725572ff6f6SMatthew Dillon
726572ff6f6SMatthew Dillon ofdmPhyErrCnt = phyCnt1 - params->ofdmPhyErrBase;
727572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_ofdmerrs +=
728572ff6f6SMatthew Dillon ofdmPhyErrCnt - aniState->ofdmPhyErrCount;
729572ff6f6SMatthew Dillon aniState->ofdmPhyErrCount = ofdmPhyErrCnt;
730572ff6f6SMatthew Dillon
731572ff6f6SMatthew Dillon cckPhyErrCnt = phyCnt2 - params->cckPhyErrBase;
732572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_cckerrs +=
733572ff6f6SMatthew Dillon cckPhyErrCnt - aniState->cckPhyErrCount;
734572ff6f6SMatthew Dillon aniState->cckPhyErrCount = cckPhyErrCnt;
735572ff6f6SMatthew Dillon
736572ff6f6SMatthew Dillon /*
737572ff6f6SMatthew Dillon * NB: figure out which counter triggered. If both
738572ff6f6SMatthew Dillon * trigger we'll only deal with one as the processing
739572ff6f6SMatthew Dillon * clobbers the error counter so the trigger threshold
740572ff6f6SMatthew Dillon * check will never be true.
741572ff6f6SMatthew Dillon */
742572ff6f6SMatthew Dillon if (aniState->ofdmPhyErrCount > params->ofdmTrigHigh)
743572ff6f6SMatthew Dillon ar5212AniOfdmErrTrigger(ah);
744572ff6f6SMatthew Dillon if (aniState->cckPhyErrCount > params->cckTrigHigh)
745572ff6f6SMatthew Dillon ar5212AniCckErrTrigger(ah);
746572ff6f6SMatthew Dillon /* NB: always restart to insure the h/w counters are reset */
747572ff6f6SMatthew Dillon ar5212AniRestart(ah, aniState);
748572ff6f6SMatthew Dillon }
749572ff6f6SMatthew Dillon }
750572ff6f6SMatthew Dillon
751572ff6f6SMatthew Dillon void
ar5212AniPhyErrReport(struct ath_hal * ah,const struct ath_rx_status * rs)752572ff6f6SMatthew Dillon ar5212AniPhyErrReport(struct ath_hal *ah, const struct ath_rx_status *rs)
753572ff6f6SMatthew Dillon {
754572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
755572ff6f6SMatthew Dillon struct ar5212AniState *aniState;
756572ff6f6SMatthew Dillon const struct ar5212AniParams *params;
757572ff6f6SMatthew Dillon
758572ff6f6SMatthew Dillon HALASSERT(!ahp->ah_hasHwPhyCounters && rs != AH_NULL);
759572ff6f6SMatthew Dillon
760572ff6f6SMatthew Dillon aniState = ahp->ah_curani;
761572ff6f6SMatthew Dillon params = aniState->params;
762572ff6f6SMatthew Dillon if (rs->rs_phyerr == HAL_PHYERR_OFDM_TIMING) {
763572ff6f6SMatthew Dillon aniState->ofdmPhyErrCount++;
764572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_ofdmerrs++;
765572ff6f6SMatthew Dillon if (aniState->ofdmPhyErrCount > params->ofdmTrigHigh) {
766572ff6f6SMatthew Dillon ar5212AniOfdmErrTrigger(ah);
767572ff6f6SMatthew Dillon ar5212AniRestart(ah, aniState);
768572ff6f6SMatthew Dillon }
769572ff6f6SMatthew Dillon } else if (rs->rs_phyerr == HAL_PHYERR_CCK_TIMING) {
770572ff6f6SMatthew Dillon aniState->cckPhyErrCount++;
771572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_cckerrs++;
772572ff6f6SMatthew Dillon if (aniState->cckPhyErrCount > params->cckTrigHigh) {
773572ff6f6SMatthew Dillon ar5212AniCckErrTrigger(ah);
774572ff6f6SMatthew Dillon ar5212AniRestart(ah, aniState);
775572ff6f6SMatthew Dillon }
776572ff6f6SMatthew Dillon }
777572ff6f6SMatthew Dillon }
778572ff6f6SMatthew Dillon
779572ff6f6SMatthew Dillon static void
ar5212AniLowerImmunity(struct ath_hal * ah)780572ff6f6SMatthew Dillon ar5212AniLowerImmunity(struct ath_hal *ah)
781572ff6f6SMatthew Dillon {
782572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
783572ff6f6SMatthew Dillon struct ar5212AniState *aniState;
784572ff6f6SMatthew Dillon const struct ar5212AniParams *params;
785572ff6f6SMatthew Dillon
786572ff6f6SMatthew Dillon HALASSERT(ANI_ENA(ah));
787572ff6f6SMatthew Dillon
788572ff6f6SMatthew Dillon aniState = ahp->ah_curani;
789572ff6f6SMatthew Dillon params = aniState->params;
790572ff6f6SMatthew Dillon if (ANI_ENA_RSSI(ah)) {
791572ff6f6SMatthew Dillon int32_t rssi = BEACON_RSSI(ahp);
792572ff6f6SMatthew Dillon if (rssi > params->rssiThrHigh) {
793572ff6f6SMatthew Dillon /*
794572ff6f6SMatthew Dillon * Beacon signal is high, leave ofdm weak signal
795572ff6f6SMatthew Dillon * detection off or it may oscillate. Let it fall
796572ff6f6SMatthew Dillon * through.
797572ff6f6SMatthew Dillon */
798572ff6f6SMatthew Dillon } else if (rssi > params->rssiThrLow) {
799572ff6f6SMatthew Dillon /*
800572ff6f6SMatthew Dillon * Beacon rssi in mid range, turn on ofdm weak signal
801572ff6f6SMatthew Dillon * detection or lower firstep level.
802572ff6f6SMatthew Dillon */
803572ff6f6SMatthew Dillon if (aniState->ofdmWeakSigDetectOff) {
804572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
805572ff6f6SMatthew Dillon "%s: rssi %d OWSD on\n", __func__, rssi);
806572ff6f6SMatthew Dillon ar5212AniControl(ah,
807572ff6f6SMatthew Dillon HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
808572ff6f6SMatthew Dillon AH_TRUE);
809572ff6f6SMatthew Dillon return;
810572ff6f6SMatthew Dillon }
811572ff6f6SMatthew Dillon if (aniState->firstepLevel > 0) {
812572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
813572ff6f6SMatthew Dillon "%s: rssi %d lower ST %u\n", __func__, rssi,
814572ff6f6SMatthew Dillon aniState->firstepLevel-1);
815572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
816572ff6f6SMatthew Dillon aniState->firstepLevel - 1);
817572ff6f6SMatthew Dillon return;
818572ff6f6SMatthew Dillon }
819572ff6f6SMatthew Dillon } else {
820572ff6f6SMatthew Dillon /*
821572ff6f6SMatthew Dillon * Beacon rssi is low, reduce firstep level.
822572ff6f6SMatthew Dillon */
823572ff6f6SMatthew Dillon if (aniState->firstepLevel > 0) {
824572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
825572ff6f6SMatthew Dillon "%s: rssi %d lower ST %u\n", __func__, rssi,
826572ff6f6SMatthew Dillon aniState->firstepLevel-1);
827572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
828572ff6f6SMatthew Dillon aniState->firstepLevel - 1);
829572ff6f6SMatthew Dillon return;
830572ff6f6SMatthew Dillon }
831572ff6f6SMatthew Dillon }
832572ff6f6SMatthew Dillon }
833572ff6f6SMatthew Dillon /* then lower spur immunity level, down to zero */
834572ff6f6SMatthew Dillon if (aniState->spurImmunityLevel > 0) {
835572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: lower SI %u\n",
836572ff6f6SMatthew Dillon __func__, aniState->spurImmunityLevel-1);
837572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL,
838572ff6f6SMatthew Dillon aniState->spurImmunityLevel - 1);
839572ff6f6SMatthew Dillon return;
840572ff6f6SMatthew Dillon }
841572ff6f6SMatthew Dillon /*
842572ff6f6SMatthew Dillon * if all else fails, lower noise immunity level down to a min value
843572ff6f6SMatthew Dillon * zero for now
844572ff6f6SMatthew Dillon */
845572ff6f6SMatthew Dillon if (aniState->noiseImmunityLevel > 0) {
846572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: lower NI %u\n",
847572ff6f6SMatthew Dillon __func__, aniState->noiseImmunityLevel-1);
848572ff6f6SMatthew Dillon ar5212AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL,
849572ff6f6SMatthew Dillon aniState->noiseImmunityLevel - 1);
850572ff6f6SMatthew Dillon return;
851572ff6f6SMatthew Dillon }
852572ff6f6SMatthew Dillon }
853572ff6f6SMatthew Dillon
854572ff6f6SMatthew Dillon #define CLOCK_RATE 44000 /* XXX use mac_usec or similar */
855572ff6f6SMatthew Dillon /* convert HW counter values to ms using 11g clock rate, goo9d enough
856572ff6f6SMatthew Dillon for 11a and Turbo */
857572ff6f6SMatthew Dillon
858572ff6f6SMatthew Dillon /*
859572ff6f6SMatthew Dillon * Return an approximation of the time spent ``listening'' by
860572ff6f6SMatthew Dillon * deducting the cycles spent tx'ing and rx'ing from the total
861572ff6f6SMatthew Dillon * cycle count since our last call. A return value <0 indicates
862572ff6f6SMatthew Dillon * an invalid/inconsistent time.
863572ff6f6SMatthew Dillon */
864572ff6f6SMatthew Dillon static int32_t
ar5212AniGetListenTime(struct ath_hal * ah)865572ff6f6SMatthew Dillon ar5212AniGetListenTime(struct ath_hal *ah)
866572ff6f6SMatthew Dillon {
867572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
868572ff6f6SMatthew Dillon struct ar5212AniState *aniState = NULL;
869572ff6f6SMatthew Dillon int32_t listenTime = 0;
870572ff6f6SMatthew Dillon int good;
871572ff6f6SMatthew Dillon HAL_SURVEY_SAMPLE hs;
872572ff6f6SMatthew Dillon
873572ff6f6SMatthew Dillon /*
874572ff6f6SMatthew Dillon * We shouldn't see ah_curchan be NULL, but just in case..
875572ff6f6SMatthew Dillon */
876572ff6f6SMatthew Dillon if (AH_PRIVATE(ah)->ah_curchan == AH_NULL) {
877572ff6f6SMatthew Dillon ath_hal_printf(ah, "%s: ah_curchan = NULL?\n", __func__);
878572ff6f6SMatthew Dillon return (0);
879572ff6f6SMatthew Dillon }
880572ff6f6SMatthew Dillon
881572ff6f6SMatthew Dillon /*
882572ff6f6SMatthew Dillon * Fetch the current statistics, squirrel away the current
883572ff6f6SMatthew Dillon * sample, bump the sequence/sample counter.
884572ff6f6SMatthew Dillon */
885572ff6f6SMatthew Dillon OS_MEMZERO(&hs, sizeof(hs));
886572ff6f6SMatthew Dillon good = ar5212GetMibCycleCounts(ah, &hs);
887*b14ca477SMatthew Dillon ath_hal_survey_add_sample(ah, &hs);
888572ff6f6SMatthew Dillon
889572ff6f6SMatthew Dillon if (ANI_ENA(ah))
890572ff6f6SMatthew Dillon aniState = ahp->ah_curani;
891572ff6f6SMatthew Dillon
892572ff6f6SMatthew Dillon if (good == AH_FALSE) {
893572ff6f6SMatthew Dillon /*
894572ff6f6SMatthew Dillon * Cycle counter wrap (or initial call); it's not possible
895572ff6f6SMatthew Dillon * to accurately calculate a value because the registers
896572ff6f6SMatthew Dillon * right shift rather than wrap--so punt and return 0.
897572ff6f6SMatthew Dillon */
898572ff6f6SMatthew Dillon listenTime = 0;
899572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_lzero++;
900572ff6f6SMatthew Dillon } else if (ANI_ENA(ah)) {
901572ff6f6SMatthew Dillon /*
902572ff6f6SMatthew Dillon * Only calculate and update the cycle count if we have
903572ff6f6SMatthew Dillon * an ANI state.
904572ff6f6SMatthew Dillon */
905572ff6f6SMatthew Dillon int32_t ccdelta =
906572ff6f6SMatthew Dillon AH5212(ah)->ah_cycleCount - aniState->cycleCount;
907572ff6f6SMatthew Dillon int32_t rfdelta =
908572ff6f6SMatthew Dillon AH5212(ah)->ah_rxBusy - aniState->rxFrameCount;
909572ff6f6SMatthew Dillon int32_t tfdelta =
910572ff6f6SMatthew Dillon AH5212(ah)->ah_txBusy - aniState->txFrameCount;
911572ff6f6SMatthew Dillon listenTime = (ccdelta - rfdelta - tfdelta) / CLOCK_RATE;
912572ff6f6SMatthew Dillon }
913572ff6f6SMatthew Dillon
914572ff6f6SMatthew Dillon /*
915572ff6f6SMatthew Dillon * Again, only update ANI state if we have it.
916572ff6f6SMatthew Dillon */
917572ff6f6SMatthew Dillon if (ANI_ENA(ah)) {
918572ff6f6SMatthew Dillon aniState->cycleCount = AH5212(ah)->ah_cycleCount;
919572ff6f6SMatthew Dillon aniState->rxFrameCount = AH5212(ah)->ah_rxBusy;
920572ff6f6SMatthew Dillon aniState->txFrameCount = AH5212(ah)->ah_txBusy;
921572ff6f6SMatthew Dillon }
922572ff6f6SMatthew Dillon
923572ff6f6SMatthew Dillon return listenTime;
924572ff6f6SMatthew Dillon }
925572ff6f6SMatthew Dillon
926572ff6f6SMatthew Dillon /*
927572ff6f6SMatthew Dillon * Update ani stats in preparation for listen time processing.
928572ff6f6SMatthew Dillon */
929572ff6f6SMatthew Dillon static void
updateMIBStats(struct ath_hal * ah,struct ar5212AniState * aniState)930572ff6f6SMatthew Dillon updateMIBStats(struct ath_hal *ah, struct ar5212AniState *aniState)
931572ff6f6SMatthew Dillon {
932572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
933572ff6f6SMatthew Dillon const struct ar5212AniParams *params = aniState->params;
934572ff6f6SMatthew Dillon uint32_t phyCnt1, phyCnt2;
935572ff6f6SMatthew Dillon int32_t ofdmPhyErrCnt, cckPhyErrCnt;
936572ff6f6SMatthew Dillon
937572ff6f6SMatthew Dillon HALASSERT(ahp->ah_hasHwPhyCounters);
938572ff6f6SMatthew Dillon
939572ff6f6SMatthew Dillon /* Clear the mib counters and save them in the stats */
940572ff6f6SMatthew Dillon ar5212UpdateMibCounters(ah, &ahp->ah_mibStats);
941572ff6f6SMatthew Dillon
942572ff6f6SMatthew Dillon /* NB: these are not reset-on-read */
943572ff6f6SMatthew Dillon phyCnt1 = OS_REG_READ(ah, AR_PHYCNT1);
944572ff6f6SMatthew Dillon phyCnt2 = OS_REG_READ(ah, AR_PHYCNT2);
945572ff6f6SMatthew Dillon
946572ff6f6SMatthew Dillon /* NB: these are spec'd to never roll-over */
947572ff6f6SMatthew Dillon ofdmPhyErrCnt = phyCnt1 - params->ofdmPhyErrBase;
948572ff6f6SMatthew Dillon if (ofdmPhyErrCnt < 0) {
949572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "OFDM phyErrCnt %d phyCnt1 0x%x\n",
950572ff6f6SMatthew Dillon ofdmPhyErrCnt, phyCnt1);
951572ff6f6SMatthew Dillon ofdmPhyErrCnt = AR_PHY_COUNTMAX;
952572ff6f6SMatthew Dillon }
953572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_ofdmerrs +=
954572ff6f6SMatthew Dillon ofdmPhyErrCnt - aniState->ofdmPhyErrCount;
955572ff6f6SMatthew Dillon aniState->ofdmPhyErrCount = ofdmPhyErrCnt;
956572ff6f6SMatthew Dillon
957572ff6f6SMatthew Dillon cckPhyErrCnt = phyCnt2 - params->cckPhyErrBase;
958572ff6f6SMatthew Dillon if (cckPhyErrCnt < 0) {
959572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "CCK phyErrCnt %d phyCnt2 0x%x\n",
960572ff6f6SMatthew Dillon cckPhyErrCnt, phyCnt2);
961572ff6f6SMatthew Dillon cckPhyErrCnt = AR_PHY_COUNTMAX;
962572ff6f6SMatthew Dillon }
963572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_cckerrs +=
964572ff6f6SMatthew Dillon cckPhyErrCnt - aniState->cckPhyErrCount;
965572ff6f6SMatthew Dillon aniState->cckPhyErrCount = cckPhyErrCnt;
966572ff6f6SMatthew Dillon }
967572ff6f6SMatthew Dillon
968572ff6f6SMatthew Dillon void
ar5212RxMonitor(struct ath_hal * ah,const HAL_NODE_STATS * stats,const struct ieee80211_channel * chan)969572ff6f6SMatthew Dillon ar5212RxMonitor(struct ath_hal *ah, const HAL_NODE_STATS *stats,
970572ff6f6SMatthew Dillon const struct ieee80211_channel *chan)
971572ff6f6SMatthew Dillon {
972572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
973572ff6f6SMatthew Dillon ahp->ah_stats.ast_nodestats.ns_avgbrssi = stats->ns_avgbrssi;
974572ff6f6SMatthew Dillon }
975572ff6f6SMatthew Dillon
976572ff6f6SMatthew Dillon /*
977572ff6f6SMatthew Dillon * Do periodic processing. This routine is called from the
978572ff6f6SMatthew Dillon * driver's rx interrupt handler after processing frames.
979572ff6f6SMatthew Dillon */
980572ff6f6SMatthew Dillon void
ar5212AniPoll(struct ath_hal * ah,const struct ieee80211_channel * chan)981572ff6f6SMatthew Dillon ar5212AniPoll(struct ath_hal *ah, const struct ieee80211_channel *chan)
982572ff6f6SMatthew Dillon {
983572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
984572ff6f6SMatthew Dillon struct ar5212AniState *aniState = ahp->ah_curani;
985572ff6f6SMatthew Dillon const struct ar5212AniParams *params;
986572ff6f6SMatthew Dillon int32_t listenTime;
987572ff6f6SMatthew Dillon
988572ff6f6SMatthew Dillon /* Always update from the MIB, for statistics gathering */
989572ff6f6SMatthew Dillon listenTime = ar5212AniGetListenTime(ah);
990572ff6f6SMatthew Dillon
991572ff6f6SMatthew Dillon /* XXX can aniState be null? */
992572ff6f6SMatthew Dillon if (aniState == AH_NULL)
993572ff6f6SMatthew Dillon return;
994572ff6f6SMatthew Dillon if (!ANI_ENA(ah))
995572ff6f6SMatthew Dillon return;
996572ff6f6SMatthew Dillon
997572ff6f6SMatthew Dillon if (listenTime < 0) {
998572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_lneg++;
999572ff6f6SMatthew Dillon /* restart ANI period if listenTime is invalid */
1000572ff6f6SMatthew Dillon ar5212AniRestart(ah, aniState);
1001572ff6f6SMatthew Dillon }
1002572ff6f6SMatthew Dillon /* XXX beware of overflow? */
1003572ff6f6SMatthew Dillon aniState->listenTime += listenTime;
1004572ff6f6SMatthew Dillon
1005572ff6f6SMatthew Dillon OS_MARK(ah, AH_MARK_ANI_POLL, aniState->listenTime);
1006572ff6f6SMatthew Dillon
1007572ff6f6SMatthew Dillon params = aniState->params;
1008572ff6f6SMatthew Dillon if (aniState->listenTime > 5*params->period) {
1009572ff6f6SMatthew Dillon /*
1010572ff6f6SMatthew Dillon * Check to see if need to lower immunity if
1011572ff6f6SMatthew Dillon * 5 aniPeriods have passed
1012572ff6f6SMatthew Dillon */
1013572ff6f6SMatthew Dillon if (ahp->ah_hasHwPhyCounters)
1014572ff6f6SMatthew Dillon updateMIBStats(ah, aniState);
1015572ff6f6SMatthew Dillon if (aniState->ofdmPhyErrCount <= aniState->listenTime *
1016572ff6f6SMatthew Dillon params->ofdmTrigLow/1000 &&
1017572ff6f6SMatthew Dillon aniState->cckPhyErrCount <= aniState->listenTime *
1018572ff6f6SMatthew Dillon params->cckTrigLow/1000)
1019572ff6f6SMatthew Dillon ar5212AniLowerImmunity(ah);
1020572ff6f6SMatthew Dillon ar5212AniRestart(ah, aniState);
1021572ff6f6SMatthew Dillon } else if (aniState->listenTime > params->period) {
1022572ff6f6SMatthew Dillon if (ahp->ah_hasHwPhyCounters)
1023572ff6f6SMatthew Dillon updateMIBStats(ah, aniState);
1024572ff6f6SMatthew Dillon /* check to see if need to raise immunity */
1025572ff6f6SMatthew Dillon if (aniState->ofdmPhyErrCount > aniState->listenTime *
1026572ff6f6SMatthew Dillon params->ofdmTrigHigh / 1000) {
1027572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
1028572ff6f6SMatthew Dillon "%s: OFDM err %u listenTime %u\n", __func__,
1029572ff6f6SMatthew Dillon aniState->ofdmPhyErrCount, aniState->listenTime);
1030572ff6f6SMatthew Dillon ar5212AniOfdmErrTrigger(ah);
1031572ff6f6SMatthew Dillon ar5212AniRestart(ah, aniState);
1032572ff6f6SMatthew Dillon } else if (aniState->cckPhyErrCount > aniState->listenTime *
1033572ff6f6SMatthew Dillon params->cckTrigHigh / 1000) {
1034572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
1035572ff6f6SMatthew Dillon "%s: CCK err %u listenTime %u\n", __func__,
1036572ff6f6SMatthew Dillon aniState->cckPhyErrCount, aniState->listenTime);
1037572ff6f6SMatthew Dillon ar5212AniCckErrTrigger(ah);
1038572ff6f6SMatthew Dillon ar5212AniRestart(ah, aniState);
1039572ff6f6SMatthew Dillon }
1040572ff6f6SMatthew Dillon }
1041572ff6f6SMatthew Dillon }
1042