1572ff6f6SMatthew Dillon /*
2572ff6f6SMatthew Dillon  * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3572ff6f6SMatthew Dillon  * Copyright (c) 2002-2008 Atheros Communications, Inc.
4572ff6f6SMatthew Dillon  *
5572ff6f6SMatthew Dillon  * Permission to use, copy, modify, and/or distribute this software for any
6572ff6f6SMatthew Dillon  * purpose with or without fee is hereby granted, provided that the above
7572ff6f6SMatthew Dillon  * copyright notice and this permission notice appear in all copies.
8572ff6f6SMatthew Dillon  *
9572ff6f6SMatthew Dillon  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10572ff6f6SMatthew Dillon  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11572ff6f6SMatthew Dillon  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12572ff6f6SMatthew Dillon  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13572ff6f6SMatthew Dillon  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14572ff6f6SMatthew Dillon  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15572ff6f6SMatthew Dillon  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16572ff6f6SMatthew Dillon  *
17572ff6f6SMatthew Dillon  * $FreeBSD$
18572ff6f6SMatthew Dillon  */
19572ff6f6SMatthew Dillon #include "opt_ah.h"
20572ff6f6SMatthew Dillon 
21572ff6f6SMatthew Dillon #include "ah.h"
22572ff6f6SMatthew Dillon #include "ah_internal.h"
23572ff6f6SMatthew Dillon 
24572ff6f6SMatthew Dillon #include "ar5212/ar5212.h"
25572ff6f6SMatthew Dillon #include "ar5212/ar5212reg.h"
26572ff6f6SMatthew Dillon #include "ar5212/ar5212desc.h"
27572ff6f6SMatthew Dillon 
28572ff6f6SMatthew Dillon /*
29572ff6f6SMatthew Dillon  * Notify Power Mgt is enabled in self-generated frames.
30572ff6f6SMatthew Dillon  * If requested, force chip awake.
31572ff6f6SMatthew Dillon  *
32572ff6f6SMatthew Dillon  * Returns A_OK if chip is awake or successfully forced awake.
33572ff6f6SMatthew Dillon  *
34572ff6f6SMatthew Dillon  * WARNING WARNING WARNING
35572ff6f6SMatthew Dillon  * There is a problem with the chip where sometimes it will not wake up.
36572ff6f6SMatthew Dillon  */
37572ff6f6SMatthew Dillon static HAL_BOOL
ar5212SetPowerModeAwake(struct ath_hal * ah,int setChip)38572ff6f6SMatthew Dillon ar5212SetPowerModeAwake(struct ath_hal *ah, int setChip)
39572ff6f6SMatthew Dillon {
40572ff6f6SMatthew Dillon #define	AR_SCR_MASK \
41572ff6f6SMatthew Dillon     (AR_SCR_SLDUR|AR_SCR_SLE|AR_SCR_SLDTP|AR_SCR_SLDWP|\
42572ff6f6SMatthew Dillon      AR_SCR_SLEPOL|AR_SCR_MIBIE|AR_SCR_UNKNOWN)
43572ff6f6SMatthew Dillon #define	POWER_UP_TIME	2000
44572ff6f6SMatthew Dillon 	uint32_t scr, val;
45572ff6f6SMatthew Dillon 	int i;
46572ff6f6SMatthew Dillon 
47572ff6f6SMatthew Dillon 	if (setChip) {
48572ff6f6SMatthew Dillon 		/*
49572ff6f6SMatthew Dillon 		 * Be careful setting the AWAKE mode.  When we are called
50572ff6f6SMatthew Dillon 		 * with the chip powered down the read returns 0xffffffff
51572ff6f6SMatthew Dillon 		 * which when blindly written back with OS_REG_RMW_FIELD
52572ff6f6SMatthew Dillon 		 * enables the MIB interrupt for the sleep performance
53572ff6f6SMatthew Dillon 		 * counters.  This can result in an interrupt storm when
54572ff6f6SMatthew Dillon 		 * ANI is in operation as no one knows to turn off the MIB
55572ff6f6SMatthew Dillon 		 * interrupt cause.
56572ff6f6SMatthew Dillon 		 */
57572ff6f6SMatthew Dillon 		scr = OS_REG_READ(ah, AR_SCR);
58572ff6f6SMatthew Dillon 		if (scr & ~AR_SCR_MASK) {
59572ff6f6SMatthew Dillon 			HALDEBUG(ah, HAL_DEBUG_ANY,
60572ff6f6SMatthew Dillon 			    "%s: bogus SCR 0x%x, PCICFG 0x%x\n",
61572ff6f6SMatthew Dillon 			    __func__, scr, OS_REG_READ(ah, AR_PCICFG));
62572ff6f6SMatthew Dillon 			scr = 0;
63572ff6f6SMatthew Dillon 		}
64572ff6f6SMatthew Dillon 		scr = (scr &~ AR_SCR_SLE) | AR_SCR_SLE_WAKE;
65572ff6f6SMatthew Dillon 		OS_REG_WRITE(ah, AR_SCR, scr);
66572ff6f6SMatthew Dillon 		OS_DELAY(10);	/* Give chip the chance to awake */
67572ff6f6SMatthew Dillon 
68572ff6f6SMatthew Dillon 		for (i = POWER_UP_TIME / 50; i != 0; i--) {
69572ff6f6SMatthew Dillon 			val = OS_REG_READ(ah, AR_PCICFG);
70572ff6f6SMatthew Dillon 			if ((val & AR_PCICFG_SPWR_DN) == 0)
71572ff6f6SMatthew Dillon 				break;
72572ff6f6SMatthew Dillon 			OS_DELAY(50);
73572ff6f6SMatthew Dillon 			OS_REG_WRITE(ah, AR_SCR, scr);
74572ff6f6SMatthew Dillon 		}
75572ff6f6SMatthew Dillon 		if (i == 0) {
76572ff6f6SMatthew Dillon #ifdef AH_DEBUG
77572ff6f6SMatthew Dillon 			ath_hal_printf(ah, "%s: Failed to wakeup in %ums\n",
78572ff6f6SMatthew Dillon 				__func__, POWER_UP_TIME/50);
79572ff6f6SMatthew Dillon #endif
80572ff6f6SMatthew Dillon 			return AH_FALSE;
81572ff6f6SMatthew Dillon 		}
82572ff6f6SMatthew Dillon 	}
83572ff6f6SMatthew Dillon 
84572ff6f6SMatthew Dillon 	OS_REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
85572ff6f6SMatthew Dillon 	return AH_TRUE;
86572ff6f6SMatthew Dillon #undef POWER_UP_TIME
87572ff6f6SMatthew Dillon #undef AR_SCR_MASK
88572ff6f6SMatthew Dillon }
89572ff6f6SMatthew Dillon 
90572ff6f6SMatthew Dillon /*
91572ff6f6SMatthew Dillon  * Notify Power Mgt is disabled in self-generated frames.
92572ff6f6SMatthew Dillon  * If requested, force chip to sleep.
93572ff6f6SMatthew Dillon  */
94572ff6f6SMatthew Dillon static void
ar5212SetPowerModeSleep(struct ath_hal * ah,int setChip)95572ff6f6SMatthew Dillon ar5212SetPowerModeSleep(struct ath_hal *ah, int setChip)
96572ff6f6SMatthew Dillon {
97572ff6f6SMatthew Dillon 	OS_REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
98572ff6f6SMatthew Dillon 	if (setChip)
99572ff6f6SMatthew Dillon 		OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP);
100572ff6f6SMatthew Dillon }
101572ff6f6SMatthew Dillon 
102572ff6f6SMatthew Dillon /*
103572ff6f6SMatthew Dillon  * Notify Power Management is enabled in self-generating
104572ff6f6SMatthew Dillon  * fames.  If request, set power mode of chip to
105572ff6f6SMatthew Dillon  * auto/normal.  Duration in units of 128us (1/8 TU).
106572ff6f6SMatthew Dillon  */
107572ff6f6SMatthew Dillon static void
ar5212SetPowerModeNetworkSleep(struct ath_hal * ah,int setChip)108572ff6f6SMatthew Dillon ar5212SetPowerModeNetworkSleep(struct ath_hal *ah, int setChip)
109572ff6f6SMatthew Dillon {
110572ff6f6SMatthew Dillon 	OS_REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
111572ff6f6SMatthew Dillon 	if (setChip)
112572ff6f6SMatthew Dillon 		OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_NORM);
113572ff6f6SMatthew Dillon }
114572ff6f6SMatthew Dillon 
115572ff6f6SMatthew Dillon /*
116572ff6f6SMatthew Dillon  * Set power mgt to the requested mode, and conditionally set
117572ff6f6SMatthew Dillon  * the chip as well
118572ff6f6SMatthew Dillon  */
119572ff6f6SMatthew Dillon HAL_BOOL
ar5212SetPowerMode(struct ath_hal * ah,HAL_POWER_MODE mode,int setChip)120572ff6f6SMatthew Dillon ar5212SetPowerMode(struct ath_hal *ah, HAL_POWER_MODE mode, int setChip)
121572ff6f6SMatthew Dillon {
122572ff6f6SMatthew Dillon #ifdef AH_DEBUG
123572ff6f6SMatthew Dillon 	static const char* modes[] = {
124572ff6f6SMatthew Dillon 		"AWAKE",
125572ff6f6SMatthew Dillon 		"FULL-SLEEP",
126572ff6f6SMatthew Dillon 		"NETWORK SLEEP",
127572ff6f6SMatthew Dillon 		"UNDEFINED"
128572ff6f6SMatthew Dillon 	};
129572ff6f6SMatthew Dillon #endif
130572ff6f6SMatthew Dillon 	int status = AH_TRUE;
131572ff6f6SMatthew Dillon 
132572ff6f6SMatthew Dillon 	HALDEBUG(ah, HAL_DEBUG_POWER, "%s: %s -> %s (%s)\n", __func__,
133*d98a0bcfSMatthew Dillon 		modes[ah->ah_powerMode], modes[mode],
134572ff6f6SMatthew Dillon 		setChip ? "set chip " : "");
135572ff6f6SMatthew Dillon 	switch (mode) {
136572ff6f6SMatthew Dillon 	case HAL_PM_AWAKE:
137*d98a0bcfSMatthew Dillon 		if (setChip)
138*d98a0bcfSMatthew Dillon 			ah->ah_powerMode = mode;
139572ff6f6SMatthew Dillon 		status = ar5212SetPowerModeAwake(ah, setChip);
140572ff6f6SMatthew Dillon 		break;
141572ff6f6SMatthew Dillon 	case HAL_PM_FULL_SLEEP:
142572ff6f6SMatthew Dillon 		ar5212SetPowerModeSleep(ah, setChip);
143*d98a0bcfSMatthew Dillon 		if (setChip)
144*d98a0bcfSMatthew Dillon 			ah->ah_powerMode = mode;
145572ff6f6SMatthew Dillon 		break;
146572ff6f6SMatthew Dillon 	case HAL_PM_NETWORK_SLEEP:
147572ff6f6SMatthew Dillon 		ar5212SetPowerModeNetworkSleep(ah, setChip);
148*d98a0bcfSMatthew Dillon 		if (setChip)
149*d98a0bcfSMatthew Dillon 			ah->ah_powerMode = mode;
150572ff6f6SMatthew Dillon 		break;
151572ff6f6SMatthew Dillon 	default:
152572ff6f6SMatthew Dillon 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown power mode %u\n",
153572ff6f6SMatthew Dillon 		    __func__, mode);
154572ff6f6SMatthew Dillon 		return AH_FALSE;
155572ff6f6SMatthew Dillon 	}
156572ff6f6SMatthew Dillon 	return status;
157572ff6f6SMatthew Dillon }
158572ff6f6SMatthew Dillon 
159572ff6f6SMatthew Dillon /*
160572ff6f6SMatthew Dillon  * Return the current sleep mode of the chip
161572ff6f6SMatthew Dillon  */
162572ff6f6SMatthew Dillon HAL_POWER_MODE
ar5212GetPowerMode(struct ath_hal * ah)163572ff6f6SMatthew Dillon ar5212GetPowerMode(struct ath_hal *ah)
164572ff6f6SMatthew Dillon {
165572ff6f6SMatthew Dillon 	/* Just so happens the h/w maps directly to the abstracted value */
166572ff6f6SMatthew Dillon 	return MS(OS_REG_READ(ah, AR_SCR), AR_SCR_SLE);
167572ff6f6SMatthew Dillon }
168572ff6f6SMatthew Dillon 
169572ff6f6SMatthew Dillon #if 0
170572ff6f6SMatthew Dillon /*
171572ff6f6SMatthew Dillon  * Return the current sleep state of the chip
172572ff6f6SMatthew Dillon  * TRUE = sleeping
173572ff6f6SMatthew Dillon  */
174572ff6f6SMatthew Dillon HAL_BOOL
175572ff6f6SMatthew Dillon ar5212GetPowerStatus(struct ath_hal *ah)
176572ff6f6SMatthew Dillon {
177572ff6f6SMatthew Dillon 	return (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_SPWR_DN) != 0;
178572ff6f6SMatthew Dillon }
179572ff6f6SMatthew Dillon #endif
180