1572ff6f6SMatthew Dillon /*
2572ff6f6SMatthew Dillon * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3572ff6f6SMatthew Dillon * Copyright (c) 2002-2008 Atheros Communications, Inc.
4572ff6f6SMatthew Dillon *
5572ff6f6SMatthew Dillon * Permission to use, copy, modify, and/or distribute this software for any
6572ff6f6SMatthew Dillon * purpose with or without fee is hereby granted, provided that the above
7572ff6f6SMatthew Dillon * copyright notice and this permission notice appear in all copies.
8572ff6f6SMatthew Dillon *
9572ff6f6SMatthew Dillon * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10572ff6f6SMatthew Dillon * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11572ff6f6SMatthew Dillon * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12572ff6f6SMatthew Dillon * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13572ff6f6SMatthew Dillon * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14572ff6f6SMatthew Dillon * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15572ff6f6SMatthew Dillon * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16572ff6f6SMatthew Dillon *
17572ff6f6SMatthew Dillon * $FreeBSD$
18572ff6f6SMatthew Dillon */
19572ff6f6SMatthew Dillon #include "opt_ah.h"
20572ff6f6SMatthew Dillon
21572ff6f6SMatthew Dillon /*
22572ff6f6SMatthew Dillon * XXX this is virtually the same code as for 5212; we reuse
23572ff6f6SMatthew Dillon * storage in the 5212 state block; need to refactor.
24572ff6f6SMatthew Dillon */
25572ff6f6SMatthew Dillon #include "ah.h"
26572ff6f6SMatthew Dillon #include "ah_internal.h"
27572ff6f6SMatthew Dillon #include "ah_desc.h"
28572ff6f6SMatthew Dillon
29572ff6f6SMatthew Dillon #include "ar5416/ar5416.h"
30572ff6f6SMatthew Dillon #include "ar5416/ar5416reg.h"
31572ff6f6SMatthew Dillon #include "ar5416/ar5416phy.h"
32572ff6f6SMatthew Dillon
33572ff6f6SMatthew Dillon /*
34572ff6f6SMatthew Dillon * Anti noise immunity support. We track phy errors and react
35572ff6f6SMatthew Dillon * to excessive errors by adjusting the noise immunity parameters.
36572ff6f6SMatthew Dillon */
37572ff6f6SMatthew Dillon
38572ff6f6SMatthew Dillon #define HAL_EP_RND(x, mul) \
39572ff6f6SMatthew Dillon ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
40572ff6f6SMatthew Dillon #define BEACON_RSSI(ahp) \
41572ff6f6SMatthew Dillon HAL_EP_RND(ahp->ah_stats.ast_nodestats.ns_avgbrssi, \
42572ff6f6SMatthew Dillon HAL_RSSI_EP_MULTIPLIER)
43572ff6f6SMatthew Dillon
44572ff6f6SMatthew Dillon /*
45572ff6f6SMatthew Dillon * ANI processing tunes radio parameters according to PHY errors
46572ff6f6SMatthew Dillon * and related information. This is done for for noise and spur
47572ff6f6SMatthew Dillon * immunity in all operating modes if the device indicates it's
48572ff6f6SMatthew Dillon * capable at attach time. In addition, when there is a reference
49572ff6f6SMatthew Dillon * rssi value (e.g. beacon frames from an ap in station mode)
50572ff6f6SMatthew Dillon * further tuning is done.
51572ff6f6SMatthew Dillon *
52572ff6f6SMatthew Dillon * ANI_ENA indicates whether any ANI processing should be done;
53572ff6f6SMatthew Dillon * this is specified at attach time.
54572ff6f6SMatthew Dillon *
55572ff6f6SMatthew Dillon * ANI_ENA_RSSI indicates whether rssi-based processing should
56572ff6f6SMatthew Dillon * done, this is enabled based on operating mode and is meaningful
57572ff6f6SMatthew Dillon * only if ANI_ENA is true.
58572ff6f6SMatthew Dillon *
59572ff6f6SMatthew Dillon * ANI parameters are typically controlled only by the hal. The
60572ff6f6SMatthew Dillon * AniControl interface however permits manual tuning through the
61572ff6f6SMatthew Dillon * diagnostic api.
62572ff6f6SMatthew Dillon */
63572ff6f6SMatthew Dillon #define ANI_ENA(ah) \
64572ff6f6SMatthew Dillon (AH5212(ah)->ah_procPhyErr & HAL_ANI_ENA)
65572ff6f6SMatthew Dillon #define ANI_ENA_RSSI(ah) \
66572ff6f6SMatthew Dillon (AH5212(ah)->ah_procPhyErr & HAL_RSSI_ANI_ENA)
67572ff6f6SMatthew Dillon
68572ff6f6SMatthew Dillon #define ah_mibStats ah_stats.ast_mibstats
69572ff6f6SMatthew Dillon
70572ff6f6SMatthew Dillon static void
enableAniMIBCounters(struct ath_hal * ah,const struct ar5212AniParams * params)71572ff6f6SMatthew Dillon enableAniMIBCounters(struct ath_hal *ah, const struct ar5212AniParams *params)
72572ff6f6SMatthew Dillon {
73572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
74572ff6f6SMatthew Dillon
75572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: Enable mib counters: "
76572ff6f6SMatthew Dillon "OfdmPhyErrBase 0x%x cckPhyErrBase 0x%x\n",
77572ff6f6SMatthew Dillon __func__, params->ofdmPhyErrBase, params->cckPhyErrBase);
78572ff6f6SMatthew Dillon
79572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_FILTOFDM, 0);
80572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_FILTCCK, 0);
81572ff6f6SMatthew Dillon
82572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHYCNT1, params->ofdmPhyErrBase);
83572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHYCNT2, params->cckPhyErrBase);
84572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);
85572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
86572ff6f6SMatthew Dillon
87572ff6f6SMatthew Dillon ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); /* save+clear counters*/
88572ff6f6SMatthew Dillon ar5212EnableMibCounters(ah); /* enable everything */
89572ff6f6SMatthew Dillon }
90572ff6f6SMatthew Dillon
91572ff6f6SMatthew Dillon static void
disableAniMIBCounters(struct ath_hal * ah)92572ff6f6SMatthew Dillon disableAniMIBCounters(struct ath_hal *ah)
93572ff6f6SMatthew Dillon {
94572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
95572ff6f6SMatthew Dillon
96572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "Disable MIB counters\n");
97572ff6f6SMatthew Dillon
98572ff6f6SMatthew Dillon ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); /* save stats */
99572ff6f6SMatthew Dillon ar5212DisableMibCounters(ah); /* disable everything */
100572ff6f6SMatthew Dillon
101572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, 0);
102572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, 0);
103572ff6f6SMatthew Dillon }
104572ff6f6SMatthew Dillon
105572ff6f6SMatthew Dillon static void
setPhyErrBase(struct ath_hal * ah,struct ar5212AniParams * params)106572ff6f6SMatthew Dillon setPhyErrBase(struct ath_hal *ah, struct ar5212AniParams *params)
107572ff6f6SMatthew Dillon {
108572ff6f6SMatthew Dillon if (params->ofdmTrigHigh >= AR_PHY_COUNTMAX) {
109572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANY,
110572ff6f6SMatthew Dillon "OFDM Trigger %d is too high for hw counters, using max\n",
111572ff6f6SMatthew Dillon params->ofdmTrigHigh);
112572ff6f6SMatthew Dillon params->ofdmPhyErrBase = 0;
113572ff6f6SMatthew Dillon } else
114572ff6f6SMatthew Dillon params->ofdmPhyErrBase = AR_PHY_COUNTMAX - params->ofdmTrigHigh;
115572ff6f6SMatthew Dillon if (params->cckTrigHigh >= AR_PHY_COUNTMAX) {
116572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANY,
117572ff6f6SMatthew Dillon "CCK Trigger %d is too high for hw counters, using max\n",
118572ff6f6SMatthew Dillon params->cckTrigHigh);
119572ff6f6SMatthew Dillon params->cckPhyErrBase = 0;
120572ff6f6SMatthew Dillon } else
121572ff6f6SMatthew Dillon params->cckPhyErrBase = AR_PHY_COUNTMAX - params->cckTrigHigh;
122572ff6f6SMatthew Dillon }
123572ff6f6SMatthew Dillon
124572ff6f6SMatthew Dillon /*
125572ff6f6SMatthew Dillon * Setup ANI handling. Sets all thresholds and reset the
126572ff6f6SMatthew Dillon * channel statistics. Note that ar5416AniReset should be
127572ff6f6SMatthew Dillon * called by ar5416Reset before anything else happens and
128572ff6f6SMatthew Dillon * that's where we force initial settings.
129572ff6f6SMatthew Dillon */
130572ff6f6SMatthew Dillon void
ar5416AniAttach(struct ath_hal * ah,const struct ar5212AniParams * params24,const struct ar5212AniParams * params5,HAL_BOOL enable)131572ff6f6SMatthew Dillon ar5416AniAttach(struct ath_hal *ah, const struct ar5212AniParams *params24,
132572ff6f6SMatthew Dillon const struct ar5212AniParams *params5, HAL_BOOL enable)
133572ff6f6SMatthew Dillon {
134572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
135572ff6f6SMatthew Dillon
136572ff6f6SMatthew Dillon if (params24 != AH_NULL) {
137572ff6f6SMatthew Dillon OS_MEMCPY(&ahp->ah_aniParams24, params24, sizeof(*params24));
138572ff6f6SMatthew Dillon setPhyErrBase(ah, &ahp->ah_aniParams24);
139572ff6f6SMatthew Dillon }
140572ff6f6SMatthew Dillon if (params5 != AH_NULL) {
141572ff6f6SMatthew Dillon OS_MEMCPY(&ahp->ah_aniParams5, params5, sizeof(*params5));
142572ff6f6SMatthew Dillon setPhyErrBase(ah, &ahp->ah_aniParams5);
143572ff6f6SMatthew Dillon }
144572ff6f6SMatthew Dillon
145572ff6f6SMatthew Dillon OS_MEMZERO(ahp->ah_ani, sizeof(ahp->ah_ani));
146572ff6f6SMatthew Dillon /* Enable MIB Counters */
147572ff6f6SMatthew Dillon enableAniMIBCounters(ah, &ahp->ah_aniParams24 /*XXX*/);
148572ff6f6SMatthew Dillon
149572ff6f6SMatthew Dillon if (enable) { /* Enable ani now */
150572ff6f6SMatthew Dillon HALASSERT(params24 != AH_NULL && params5 != AH_NULL);
151572ff6f6SMatthew Dillon ahp->ah_procPhyErr |= HAL_ANI_ENA;
152572ff6f6SMatthew Dillon } else {
153572ff6f6SMatthew Dillon ahp->ah_procPhyErr &= ~HAL_ANI_ENA;
154572ff6f6SMatthew Dillon }
155572ff6f6SMatthew Dillon }
156572ff6f6SMatthew Dillon
157572ff6f6SMatthew Dillon /*
158572ff6f6SMatthew Dillon * Cleanup any ANI state setup.
159572ff6f6SMatthew Dillon *
160572ff6f6SMatthew Dillon * This doesn't restore registers to their default settings!
161572ff6f6SMatthew Dillon */
162572ff6f6SMatthew Dillon void
ar5416AniDetach(struct ath_hal * ah)163572ff6f6SMatthew Dillon ar5416AniDetach(struct ath_hal *ah)
164572ff6f6SMatthew Dillon {
165572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "Detaching Ani\n");
166572ff6f6SMatthew Dillon disableAniMIBCounters(ah);
167572ff6f6SMatthew Dillon }
168572ff6f6SMatthew Dillon
169572ff6f6SMatthew Dillon /*
170572ff6f6SMatthew Dillon * Control Adaptive Noise Immunity Parameters
171572ff6f6SMatthew Dillon */
172572ff6f6SMatthew Dillon HAL_BOOL
ar5416AniControl(struct ath_hal * ah,HAL_ANI_CMD cmd,int param)173572ff6f6SMatthew Dillon ar5416AniControl(struct ath_hal *ah, HAL_ANI_CMD cmd, int param)
174572ff6f6SMatthew Dillon {
175572ff6f6SMatthew Dillon typedef int TABLE[];
176572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
177572ff6f6SMatthew Dillon struct ar5212AniState *aniState = ahp->ah_curani;
178572ff6f6SMatthew Dillon const struct ar5212AniParams *params = AH_NULL;
179572ff6f6SMatthew Dillon
180572ff6f6SMatthew Dillon /*
181572ff6f6SMatthew Dillon * This function may be called before there's a current
182572ff6f6SMatthew Dillon * channel (eg to disable ANI.)
183572ff6f6SMatthew Dillon */
184572ff6f6SMatthew Dillon if (aniState != AH_NULL)
185572ff6f6SMatthew Dillon params = aniState->params;
186572ff6f6SMatthew Dillon
187572ff6f6SMatthew Dillon OS_MARK(ah, AH_MARK_ANI_CONTROL, cmd);
188572ff6f6SMatthew Dillon
189572ff6f6SMatthew Dillon /* These commands can't be disabled */
190572ff6f6SMatthew Dillon if (cmd == HAL_ANI_PRESENT)
191572ff6f6SMatthew Dillon return AH_TRUE;
192572ff6f6SMatthew Dillon
193572ff6f6SMatthew Dillon if (cmd == HAL_ANI_MODE) {
194572ff6f6SMatthew Dillon if (param == 0) {
195572ff6f6SMatthew Dillon ahp->ah_procPhyErr &= ~HAL_ANI_ENA;
196572ff6f6SMatthew Dillon /* Turn off HW counters if we have them */
197572ff6f6SMatthew Dillon ar5416AniDetach(ah);
198572ff6f6SMatthew Dillon } else { /* normal/auto mode */
199572ff6f6SMatthew Dillon /* don't mess with state if already enabled */
200572ff6f6SMatthew Dillon if (! (ahp->ah_procPhyErr & HAL_ANI_ENA)) {
201572ff6f6SMatthew Dillon /* Enable MIB Counters */
202572ff6f6SMatthew Dillon /*
203572ff6f6SMatthew Dillon * XXX use 2.4ghz params if no channel is
204572ff6f6SMatthew Dillon * available
205572ff6f6SMatthew Dillon */
206572ff6f6SMatthew Dillon enableAniMIBCounters(ah,
207572ff6f6SMatthew Dillon ahp->ah_curani != AH_NULL ?
208572ff6f6SMatthew Dillon ahp->ah_curani->params:
209572ff6f6SMatthew Dillon &ahp->ah_aniParams24);
210572ff6f6SMatthew Dillon ahp->ah_procPhyErr |= HAL_ANI_ENA;
211572ff6f6SMatthew Dillon }
212572ff6f6SMatthew Dillon }
213572ff6f6SMatthew Dillon return AH_TRUE;
214572ff6f6SMatthew Dillon }
215572ff6f6SMatthew Dillon
216572ff6f6SMatthew Dillon /* Check whether the particular function is enabled */
217572ff6f6SMatthew Dillon if (((1 << cmd) & AH5416(ah)->ah_ani_function) == 0) {
218572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: command %d disabled\n",
219572ff6f6SMatthew Dillon __func__, cmd);
220572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: cmd %d; mask %x\n", __func__, cmd, AH5416(ah)->ah_ani_function);
221572ff6f6SMatthew Dillon return AH_FALSE;
222572ff6f6SMatthew Dillon }
223572ff6f6SMatthew Dillon
224572ff6f6SMatthew Dillon
225572ff6f6SMatthew Dillon switch (cmd) {
226572ff6f6SMatthew Dillon case HAL_ANI_NOISE_IMMUNITY_LEVEL: {
227572ff6f6SMatthew Dillon u_int level = param;
228572ff6f6SMatthew Dillon
229572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_NOISE_IMMUNITY_LEVEL: set level = %d\n", __func__, level);
230572ff6f6SMatthew Dillon if (level > params->maxNoiseImmunityLevel) {
231572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
232572ff6f6SMatthew Dillon "%s: immunity level out of range (%u > %u)\n",
233572ff6f6SMatthew Dillon __func__, level, params->maxNoiseImmunityLevel);
234572ff6f6SMatthew Dillon return AH_FALSE;
235572ff6f6SMatthew Dillon }
236572ff6f6SMatthew Dillon
237572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
238572ff6f6SMatthew Dillon AR_PHY_DESIRED_SZ_TOT_DES, params->totalSizeDesired[level]);
239572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
240572ff6f6SMatthew Dillon AR_PHY_AGC_CTL1_COARSE_LOW, params->coarseLow[level]);
241572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
242572ff6f6SMatthew Dillon AR_PHY_AGC_CTL1_COARSE_HIGH, params->coarseHigh[level]);
243572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
244572ff6f6SMatthew Dillon AR_PHY_FIND_SIG_FIRPWR, params->firpwr[level]);
245572ff6f6SMatthew Dillon
246572ff6f6SMatthew Dillon if (level > aniState->noiseImmunityLevel)
247572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_niup++;
248572ff6f6SMatthew Dillon else if (level < aniState->noiseImmunityLevel)
249572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_nidown++;
250572ff6f6SMatthew Dillon aniState->noiseImmunityLevel = level;
251572ff6f6SMatthew Dillon break;
252572ff6f6SMatthew Dillon }
253572ff6f6SMatthew Dillon case HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION: {
254572ff6f6SMatthew Dillon static const TABLE m1ThreshLow = { 127, 50 };
255572ff6f6SMatthew Dillon static const TABLE m2ThreshLow = { 127, 40 };
256572ff6f6SMatthew Dillon static const TABLE m1Thresh = { 127, 0x4d };
257572ff6f6SMatthew Dillon static const TABLE m2Thresh = { 127, 0x40 };
258572ff6f6SMatthew Dillon static const TABLE m2CountThr = { 31, 16 };
259572ff6f6SMatthew Dillon static const TABLE m2CountThrLow = { 63, 48 };
260572ff6f6SMatthew Dillon u_int on = param ? 1 : 0;
261572ff6f6SMatthew Dillon
262572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION: %s\n", __func__, on ? "enabled" : "disabled");
263572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
264572ff6f6SMatthew Dillon AR_PHY_SFCORR_LOW_M1_THRESH_LOW, m1ThreshLow[on]);
265572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
266572ff6f6SMatthew Dillon AR_PHY_SFCORR_LOW_M2_THRESH_LOW, m2ThreshLow[on]);
267572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
268572ff6f6SMatthew Dillon AR_PHY_SFCORR_M1_THRESH, m1Thresh[on]);
269572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
270572ff6f6SMatthew Dillon AR_PHY_SFCORR_M2_THRESH, m2Thresh[on]);
271572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
272572ff6f6SMatthew Dillon AR_PHY_SFCORR_M2COUNT_THR, m2CountThr[on]);
273572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
274572ff6f6SMatthew Dillon AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW, m2CountThrLow[on]);
275572ff6f6SMatthew Dillon
276572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
277572ff6f6SMatthew Dillon AR_PHY_SFCORR_EXT_M1_THRESH_LOW, m1ThreshLow[on]);
278572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
279572ff6f6SMatthew Dillon AR_PHY_SFCORR_EXT_M2_THRESH_LOW, m2ThreshLow[on]);
280572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
281572ff6f6SMatthew Dillon AR_PHY_SFCORR_EXT_M1_THRESH, m1Thresh[on]);
282572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
283572ff6f6SMatthew Dillon AR_PHY_SFCORR_EXT_M2_THRESH, m2Thresh[on]);
284572ff6f6SMatthew Dillon
285572ff6f6SMatthew Dillon if (on) {
286572ff6f6SMatthew Dillon OS_REG_SET_BIT(ah, AR_PHY_SFCORR_LOW,
287572ff6f6SMatthew Dillon AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
288572ff6f6SMatthew Dillon } else {
289572ff6f6SMatthew Dillon OS_REG_CLR_BIT(ah, AR_PHY_SFCORR_LOW,
290572ff6f6SMatthew Dillon AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
291572ff6f6SMatthew Dillon }
292572ff6f6SMatthew Dillon if (on)
293572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_ofdmon++;
294572ff6f6SMatthew Dillon else
295572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_ofdmoff++;
296572ff6f6SMatthew Dillon aniState->ofdmWeakSigDetectOff = !on;
297572ff6f6SMatthew Dillon break;
298572ff6f6SMatthew Dillon }
299572ff6f6SMatthew Dillon case HAL_ANI_CCK_WEAK_SIGNAL_THR: {
300572ff6f6SMatthew Dillon static const TABLE weakSigThrCck = { 8, 6 };
301572ff6f6SMatthew Dillon u_int high = param ? 1 : 0;
302572ff6f6SMatthew Dillon
303572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_CCK_WEAK_SIGNAL_THR: %s\n", __func__, high ? "high" : "low");
304572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT,
305572ff6f6SMatthew Dillon AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK, weakSigThrCck[high]);
306572ff6f6SMatthew Dillon if (high)
307572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_cckhigh++;
308572ff6f6SMatthew Dillon else
309572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_ccklow++;
310572ff6f6SMatthew Dillon aniState->cckWeakSigThreshold = high;
311572ff6f6SMatthew Dillon break;
312572ff6f6SMatthew Dillon }
313572ff6f6SMatthew Dillon case HAL_ANI_FIRSTEP_LEVEL: {
314572ff6f6SMatthew Dillon u_int level = param;
315572ff6f6SMatthew Dillon
316572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_FIRSTEP_LEVEL: level = %d\n", __func__, level);
317572ff6f6SMatthew Dillon if (level > params->maxFirstepLevel) {
318572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
319572ff6f6SMatthew Dillon "%s: firstep level out of range (%u > %u)\n",
320572ff6f6SMatthew Dillon __func__, level, params->maxFirstepLevel);
321572ff6f6SMatthew Dillon return AH_FALSE;
322572ff6f6SMatthew Dillon }
323572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
324572ff6f6SMatthew Dillon AR_PHY_FIND_SIG_FIRSTEP, params->firstep[level]);
325572ff6f6SMatthew Dillon if (level > aniState->firstepLevel)
326572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_stepup++;
327572ff6f6SMatthew Dillon else if (level < aniState->firstepLevel)
328572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_stepdown++;
329572ff6f6SMatthew Dillon aniState->firstepLevel = level;
330572ff6f6SMatthew Dillon break;
331572ff6f6SMatthew Dillon }
332572ff6f6SMatthew Dillon case HAL_ANI_SPUR_IMMUNITY_LEVEL: {
333572ff6f6SMatthew Dillon u_int level = param;
334572ff6f6SMatthew Dillon
335572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_SPUR_IMMUNITY_LEVEL: level = %d\n", __func__, level);
336572ff6f6SMatthew Dillon if (level > params->maxSpurImmunityLevel) {
337572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
338572ff6f6SMatthew Dillon "%s: spur immunity level out of range (%u > %u)\n",
339572ff6f6SMatthew Dillon __func__, level, params->maxSpurImmunityLevel);
340572ff6f6SMatthew Dillon return AH_FALSE;
341572ff6f6SMatthew Dillon }
342572ff6f6SMatthew Dillon OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5,
343572ff6f6SMatthew Dillon AR_PHY_TIMING5_CYCPWR_THR1, params->cycPwrThr1[level]);
344572ff6f6SMatthew Dillon
345572ff6f6SMatthew Dillon if (level > aniState->spurImmunityLevel)
346572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_spurup++;
347572ff6f6SMatthew Dillon else if (level < aniState->spurImmunityLevel)
348572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_spurdown++;
349572ff6f6SMatthew Dillon aniState->spurImmunityLevel = level;
350572ff6f6SMatthew Dillon break;
351572ff6f6SMatthew Dillon }
352572ff6f6SMatthew Dillon #ifdef AH_PRIVATE_DIAG
353572ff6f6SMatthew Dillon case HAL_ANI_PHYERR_RESET:
354572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_ofdmerrs = 0;
355572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_cckerrs = 0;
356572ff6f6SMatthew Dillon break;
357572ff6f6SMatthew Dillon #endif /* AH_PRIVATE_DIAG */
358572ff6f6SMatthew Dillon default:
359572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: invalid cmd %u\n",
360572ff6f6SMatthew Dillon __func__, cmd);
361572ff6f6SMatthew Dillon return AH_FALSE;
362572ff6f6SMatthew Dillon }
363572ff6f6SMatthew Dillon return AH_TRUE;
364572ff6f6SMatthew Dillon }
365572ff6f6SMatthew Dillon
366572ff6f6SMatthew Dillon static void
ar5416AniOfdmErrTrigger(struct ath_hal * ah)367572ff6f6SMatthew Dillon ar5416AniOfdmErrTrigger(struct ath_hal *ah)
368572ff6f6SMatthew Dillon {
369572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
370572ff6f6SMatthew Dillon const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan;
371572ff6f6SMatthew Dillon struct ar5212AniState *aniState;
372572ff6f6SMatthew Dillon const struct ar5212AniParams *params;
373572ff6f6SMatthew Dillon
374572ff6f6SMatthew Dillon HALASSERT(chan != AH_NULL);
375572ff6f6SMatthew Dillon
376572ff6f6SMatthew Dillon if (!ANI_ENA(ah))
377572ff6f6SMatthew Dillon return;
378572ff6f6SMatthew Dillon
379572ff6f6SMatthew Dillon aniState = ahp->ah_curani;
380572ff6f6SMatthew Dillon params = aniState->params;
381572ff6f6SMatthew Dillon /* First, raise noise immunity level, up to max */
382572ff6f6SMatthew Dillon if (aniState->noiseImmunityLevel+1 < params->maxNoiseImmunityLevel) {
383572ff6f6SMatthew Dillon if (ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL,
384572ff6f6SMatthew Dillon aniState->noiseImmunityLevel + 1))
385572ff6f6SMatthew Dillon return;
386572ff6f6SMatthew Dillon }
387572ff6f6SMatthew Dillon /* then, raise spur immunity level, up to max */
388572ff6f6SMatthew Dillon if (aniState->spurImmunityLevel+1 < params->maxSpurImmunityLevel) {
389572ff6f6SMatthew Dillon if (ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL,
390572ff6f6SMatthew Dillon aniState->spurImmunityLevel + 1))
391572ff6f6SMatthew Dillon return;
392572ff6f6SMatthew Dillon }
393572ff6f6SMatthew Dillon
394572ff6f6SMatthew Dillon /*
395572ff6f6SMatthew Dillon * In the case of AP mode operation, we cannot bucketize beacons
396572ff6f6SMatthew Dillon * according to RSSI. Instead, raise Firstep level, up to max, and
397572ff6f6SMatthew Dillon * simply return.
398572ff6f6SMatthew Dillon */
399572ff6f6SMatthew Dillon if (AH_PRIVATE(ah)->ah_opmode == HAL_M_HOSTAP) {
400572ff6f6SMatthew Dillon if (aniState->firstepLevel < params->maxFirstepLevel) {
401572ff6f6SMatthew Dillon if (ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
402572ff6f6SMatthew Dillon aniState->firstepLevel + 1))
403572ff6f6SMatthew Dillon return;
404572ff6f6SMatthew Dillon }
405572ff6f6SMatthew Dillon }
406572ff6f6SMatthew Dillon if (ANI_ENA_RSSI(ah)) {
407572ff6f6SMatthew Dillon int32_t rssi = BEACON_RSSI(ahp);
408572ff6f6SMatthew Dillon if (rssi > params->rssiThrHigh) {
409572ff6f6SMatthew Dillon /*
410572ff6f6SMatthew Dillon * Beacon rssi is high, can turn off ofdm
411572ff6f6SMatthew Dillon * weak sig detect.
412572ff6f6SMatthew Dillon */
413572ff6f6SMatthew Dillon if (!aniState->ofdmWeakSigDetectOff) {
414572ff6f6SMatthew Dillon ar5416AniControl(ah,
415572ff6f6SMatthew Dillon HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
416572ff6f6SMatthew Dillon AH_FALSE);
417572ff6f6SMatthew Dillon ar5416AniControl(ah,
418572ff6f6SMatthew Dillon HAL_ANI_SPUR_IMMUNITY_LEVEL, 0);
419572ff6f6SMatthew Dillon return;
420572ff6f6SMatthew Dillon }
421572ff6f6SMatthew Dillon /*
422572ff6f6SMatthew Dillon * If weak sig detect is already off, as last resort,
423572ff6f6SMatthew Dillon * raise firstep level
424572ff6f6SMatthew Dillon */
425572ff6f6SMatthew Dillon if (aniState->firstepLevel < params->maxFirstepLevel) {
426572ff6f6SMatthew Dillon if (ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
427572ff6f6SMatthew Dillon aniState->firstepLevel + 1))
428572ff6f6SMatthew Dillon return;
429572ff6f6SMatthew Dillon }
430572ff6f6SMatthew Dillon } else if (rssi > params->rssiThrLow) {
431572ff6f6SMatthew Dillon /*
432572ff6f6SMatthew Dillon * Beacon rssi in mid range, need ofdm weak signal
433572ff6f6SMatthew Dillon * detect, but we can raise firststepLevel.
434572ff6f6SMatthew Dillon */
435572ff6f6SMatthew Dillon if (aniState->ofdmWeakSigDetectOff)
436572ff6f6SMatthew Dillon ar5416AniControl(ah,
437572ff6f6SMatthew Dillon HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
438572ff6f6SMatthew Dillon AH_TRUE);
439572ff6f6SMatthew Dillon if (aniState->firstepLevel < params->maxFirstepLevel)
440572ff6f6SMatthew Dillon if (ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
441572ff6f6SMatthew Dillon aniState->firstepLevel + 1))
442572ff6f6SMatthew Dillon return;
443572ff6f6SMatthew Dillon } else {
444572ff6f6SMatthew Dillon /*
445572ff6f6SMatthew Dillon * Beacon rssi is low, if in 11b/g mode, turn off ofdm
446572ff6f6SMatthew Dillon * weak signal detection and zero firstepLevel to
447572ff6f6SMatthew Dillon * maximize CCK sensitivity
448572ff6f6SMatthew Dillon */
449572ff6f6SMatthew Dillon if (IEEE80211_IS_CHAN_CCK(chan)) {
450572ff6f6SMatthew Dillon if (!aniState->ofdmWeakSigDetectOff)
451572ff6f6SMatthew Dillon ar5416AniControl(ah,
452572ff6f6SMatthew Dillon HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
453572ff6f6SMatthew Dillon AH_FALSE);
454572ff6f6SMatthew Dillon if (aniState->firstepLevel > 0)
455572ff6f6SMatthew Dillon if (ar5416AniControl(ah,
456572ff6f6SMatthew Dillon HAL_ANI_FIRSTEP_LEVEL, 0))
457572ff6f6SMatthew Dillon return;
458572ff6f6SMatthew Dillon }
459572ff6f6SMatthew Dillon }
460572ff6f6SMatthew Dillon }
461572ff6f6SMatthew Dillon }
462572ff6f6SMatthew Dillon
463572ff6f6SMatthew Dillon static void
ar5416AniCckErrTrigger(struct ath_hal * ah)464572ff6f6SMatthew Dillon ar5416AniCckErrTrigger(struct ath_hal *ah)
465572ff6f6SMatthew Dillon {
466572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
467572ff6f6SMatthew Dillon const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan;
468572ff6f6SMatthew Dillon struct ar5212AniState *aniState;
469572ff6f6SMatthew Dillon const struct ar5212AniParams *params;
470572ff6f6SMatthew Dillon
471572ff6f6SMatthew Dillon HALASSERT(chan != AH_NULL);
472572ff6f6SMatthew Dillon
473572ff6f6SMatthew Dillon if (!ANI_ENA(ah))
474572ff6f6SMatthew Dillon return;
475572ff6f6SMatthew Dillon
476572ff6f6SMatthew Dillon /* first, raise noise immunity level, up to max */
477572ff6f6SMatthew Dillon aniState = ahp->ah_curani;
478572ff6f6SMatthew Dillon params = aniState->params;
479572ff6f6SMatthew Dillon if ((AH5416(ah)->ah_ani_function & (1 << HAL_ANI_NOISE_IMMUNITY_LEVEL) &&
480572ff6f6SMatthew Dillon aniState->noiseImmunityLevel+1 < params->maxNoiseImmunityLevel)) {
481572ff6f6SMatthew Dillon ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL,
482572ff6f6SMatthew Dillon aniState->noiseImmunityLevel + 1);
483572ff6f6SMatthew Dillon return;
484572ff6f6SMatthew Dillon }
485572ff6f6SMatthew Dillon
486572ff6f6SMatthew Dillon if (ANI_ENA_RSSI(ah)) {
487572ff6f6SMatthew Dillon int32_t rssi = BEACON_RSSI(ahp);
488572ff6f6SMatthew Dillon if (rssi > params->rssiThrLow) {
489572ff6f6SMatthew Dillon /*
490572ff6f6SMatthew Dillon * Beacon signal in mid and high range,
491572ff6f6SMatthew Dillon * raise firstep level.
492572ff6f6SMatthew Dillon */
493572ff6f6SMatthew Dillon if (aniState->firstepLevel < params->maxFirstepLevel)
494572ff6f6SMatthew Dillon ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
495572ff6f6SMatthew Dillon aniState->firstepLevel + 1);
496572ff6f6SMatthew Dillon } else {
497572ff6f6SMatthew Dillon /*
498572ff6f6SMatthew Dillon * Beacon rssi is low, zero firstep level to maximize
499572ff6f6SMatthew Dillon * CCK sensitivity in 11b/g mode.
500572ff6f6SMatthew Dillon */
501572ff6f6SMatthew Dillon if (IEEE80211_IS_CHAN_CCK(chan)) {
502572ff6f6SMatthew Dillon if (aniState->firstepLevel > 0)
503572ff6f6SMatthew Dillon ar5416AniControl(ah,
504572ff6f6SMatthew Dillon HAL_ANI_FIRSTEP_LEVEL, 0);
505572ff6f6SMatthew Dillon }
506572ff6f6SMatthew Dillon }
507572ff6f6SMatthew Dillon }
508572ff6f6SMatthew Dillon }
509572ff6f6SMatthew Dillon
510572ff6f6SMatthew Dillon static void
ar5416AniRestart(struct ath_hal * ah,struct ar5212AniState * aniState)511572ff6f6SMatthew Dillon ar5416AniRestart(struct ath_hal *ah, struct ar5212AniState *aniState)
512572ff6f6SMatthew Dillon {
513572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
514572ff6f6SMatthew Dillon const struct ar5212AniParams *params = aniState->params;
515572ff6f6SMatthew Dillon
516572ff6f6SMatthew Dillon aniState->listenTime = 0;
517572ff6f6SMatthew Dillon /*
518572ff6f6SMatthew Dillon * NB: these are written on reset based on the
519572ff6f6SMatthew Dillon * ini so we must re-write them!
520572ff6f6SMatthew Dillon */
521572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
522572ff6f6SMatthew Dillon "%s: Writing ofdmbase=%u cckbase=%u\n", __func__,
523572ff6f6SMatthew Dillon params->ofdmPhyErrBase, params->cckPhyErrBase);
524572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHY_ERR_1, params->ofdmPhyErrBase);
525572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHY_ERR_2, params->cckPhyErrBase);
526572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);
527572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
528572ff6f6SMatthew Dillon
529572ff6f6SMatthew Dillon /* Clear the mib counters and save them in the stats */
530572ff6f6SMatthew Dillon ar5212UpdateMibCounters(ah, &ahp->ah_mibStats);
531572ff6f6SMatthew Dillon aniState->ofdmPhyErrCount = 0;
532572ff6f6SMatthew Dillon aniState->cckPhyErrCount = 0;
533572ff6f6SMatthew Dillon }
534572ff6f6SMatthew Dillon
535572ff6f6SMatthew Dillon /*
536572ff6f6SMatthew Dillon * Restore/reset the ANI parameters and reset the statistics.
537572ff6f6SMatthew Dillon * This routine must be called for every channel change.
538572ff6f6SMatthew Dillon *
539572ff6f6SMatthew Dillon * NOTE: This is where ah_curani is set; other ani code assumes
540572ff6f6SMatthew Dillon * it is setup to reflect the current channel.
541572ff6f6SMatthew Dillon */
542572ff6f6SMatthew Dillon void
ar5416AniReset(struct ath_hal * ah,const struct ieee80211_channel * chan,HAL_OPMODE opmode,int restore)543572ff6f6SMatthew Dillon ar5416AniReset(struct ath_hal *ah, const struct ieee80211_channel *chan,
544572ff6f6SMatthew Dillon HAL_OPMODE opmode, int restore)
545572ff6f6SMatthew Dillon {
546572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
547572ff6f6SMatthew Dillon HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan);
548572ff6f6SMatthew Dillon /* XXX bounds check ic_devdata */
549572ff6f6SMatthew Dillon struct ar5212AniState *aniState = &ahp->ah_ani[chan->ic_devdata];
550572ff6f6SMatthew Dillon uint32_t rxfilter;
551572ff6f6SMatthew Dillon
552572ff6f6SMatthew Dillon if ((ichan->privFlags & CHANNEL_ANI_INIT) == 0) {
553572ff6f6SMatthew Dillon OS_MEMZERO(aniState, sizeof(*aniState));
554572ff6f6SMatthew Dillon if (IEEE80211_IS_CHAN_2GHZ(chan))
555572ff6f6SMatthew Dillon aniState->params = &ahp->ah_aniParams24;
556572ff6f6SMatthew Dillon else
557572ff6f6SMatthew Dillon aniState->params = &ahp->ah_aniParams5;
558572ff6f6SMatthew Dillon ichan->privFlags |= CHANNEL_ANI_INIT;
559572ff6f6SMatthew Dillon HALASSERT((ichan->privFlags & CHANNEL_ANI_SETUP) == 0);
560572ff6f6SMatthew Dillon }
561572ff6f6SMatthew Dillon ahp->ah_curani = aniState;
562572ff6f6SMatthew Dillon #if 0
563572ff6f6SMatthew Dillon ath_hal_printf(ah,"%s: chan %u/0x%x restore %d opmode %u%s\n",
564572ff6f6SMatthew Dillon __func__, chan->ic_freq, chan->ic_flags, restore, opmode,
565572ff6f6SMatthew Dillon ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : "");
566572ff6f6SMatthew Dillon #else
567572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: chan %u/0x%x restore %d opmode %u%s\n",
568572ff6f6SMatthew Dillon __func__, chan->ic_freq, chan->ic_flags, restore, opmode,
569572ff6f6SMatthew Dillon ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : "");
570572ff6f6SMatthew Dillon #endif
571572ff6f6SMatthew Dillon OS_MARK(ah, AH_MARK_ANI_RESET, opmode);
572572ff6f6SMatthew Dillon
573572ff6f6SMatthew Dillon /*
574572ff6f6SMatthew Dillon * Turn off PHY error frame delivery while we futz with settings.
575572ff6f6SMatthew Dillon */
576572ff6f6SMatthew Dillon rxfilter = ah->ah_getRxFilter(ah);
577572ff6f6SMatthew Dillon ah->ah_setRxFilter(ah, rxfilter &~ HAL_RX_FILTER_PHYERR);
578572ff6f6SMatthew Dillon
579572ff6f6SMatthew Dillon /*
580572ff6f6SMatthew Dillon * If ANI is disabled at this point, don't set the default
581572ff6f6SMatthew Dillon * ANI parameter settings - leave the HAL settings there.
582572ff6f6SMatthew Dillon * This is (currently) needed for reliable radar detection.
583572ff6f6SMatthew Dillon */
584572ff6f6SMatthew Dillon if (! ANI_ENA(ah)) {
585572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: ANI disabled\n",
586572ff6f6SMatthew Dillon __func__);
587572ff6f6SMatthew Dillon goto finish;
588572ff6f6SMatthew Dillon }
589572ff6f6SMatthew Dillon
590572ff6f6SMatthew Dillon /*
591572ff6f6SMatthew Dillon * Use a restrictive set of ANI parameters for hostap mode.
592572ff6f6SMatthew Dillon */
593572ff6f6SMatthew Dillon if (opmode == HAL_M_HOSTAP) {
594572ff6f6SMatthew Dillon if (IEEE80211_IS_CHAN_2GHZ(chan))
595572ff6f6SMatthew Dillon AH5416(ah)->ah_ani_function =
596572ff6f6SMatthew Dillon HAL_ANI_SPUR_IMMUNITY_LEVEL | HAL_ANI_FIRSTEP_LEVEL;
597572ff6f6SMatthew Dillon else
598572ff6f6SMatthew Dillon AH5416(ah)->ah_ani_function = 0;
599572ff6f6SMatthew Dillon }
600572ff6f6SMatthew Dillon
601572ff6f6SMatthew Dillon /*
602572ff6f6SMatthew Dillon * Automatic processing is done only in station mode right now.
603572ff6f6SMatthew Dillon */
604572ff6f6SMatthew Dillon if (opmode == HAL_M_STA)
605572ff6f6SMatthew Dillon ahp->ah_procPhyErr |= HAL_RSSI_ANI_ENA;
606572ff6f6SMatthew Dillon else
607572ff6f6SMatthew Dillon ahp->ah_procPhyErr &= ~HAL_RSSI_ANI_ENA;
608572ff6f6SMatthew Dillon /*
609572ff6f6SMatthew Dillon * Set all ani parameters. We either set them to initial
610572ff6f6SMatthew Dillon * values or restore the previous ones for the channel.
611572ff6f6SMatthew Dillon * XXX if ANI follows hardware, we don't care what mode we're
612572ff6f6SMatthew Dillon * XXX in, we should keep the ani parameters
613572ff6f6SMatthew Dillon */
614572ff6f6SMatthew Dillon if (restore && (ichan->privFlags & CHANNEL_ANI_SETUP)) {
615572ff6f6SMatthew Dillon ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL,
616572ff6f6SMatthew Dillon aniState->noiseImmunityLevel);
617572ff6f6SMatthew Dillon ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL,
618572ff6f6SMatthew Dillon aniState->spurImmunityLevel);
619572ff6f6SMatthew Dillon ar5416AniControl(ah, HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
620572ff6f6SMatthew Dillon !aniState->ofdmWeakSigDetectOff);
621572ff6f6SMatthew Dillon ar5416AniControl(ah, HAL_ANI_CCK_WEAK_SIGNAL_THR,
622572ff6f6SMatthew Dillon aniState->cckWeakSigThreshold);
623572ff6f6SMatthew Dillon ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
624572ff6f6SMatthew Dillon aniState->firstepLevel);
625572ff6f6SMatthew Dillon } else {
626572ff6f6SMatthew Dillon ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 0);
627572ff6f6SMatthew Dillon ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, 0);
628572ff6f6SMatthew Dillon ar5416AniControl(ah, HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
629572ff6f6SMatthew Dillon AH_FALSE);
630572ff6f6SMatthew Dillon ar5416AniControl(ah, HAL_ANI_CCK_WEAK_SIGNAL_THR, AH_FALSE);
631572ff6f6SMatthew Dillon ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 0);
632572ff6f6SMatthew Dillon ichan->privFlags |= CHANNEL_ANI_SETUP;
633572ff6f6SMatthew Dillon }
634572ff6f6SMatthew Dillon
635572ff6f6SMatthew Dillon /*
636572ff6f6SMatthew Dillon * In case the counters haven't yet been setup; set them up.
637572ff6f6SMatthew Dillon */
638572ff6f6SMatthew Dillon enableAniMIBCounters(ah, aniState->params);
639572ff6f6SMatthew Dillon ar5416AniRestart(ah, aniState);
640572ff6f6SMatthew Dillon
641572ff6f6SMatthew Dillon finish:
642572ff6f6SMatthew Dillon /* restore RX filter mask */
643572ff6f6SMatthew Dillon ah->ah_setRxFilter(ah, rxfilter);
644572ff6f6SMatthew Dillon }
645572ff6f6SMatthew Dillon
646572ff6f6SMatthew Dillon /*
647572ff6f6SMatthew Dillon * Process a MIB interrupt. We may potentially be invoked because
648572ff6f6SMatthew Dillon * any of the MIB counters overflow/trigger so don't assume we're
649572ff6f6SMatthew Dillon * here because a PHY error counter triggered.
650572ff6f6SMatthew Dillon */
651572ff6f6SMatthew Dillon void
ar5416ProcessMibIntr(struct ath_hal * ah,const HAL_NODE_STATS * stats)652572ff6f6SMatthew Dillon ar5416ProcessMibIntr(struct ath_hal *ah, const HAL_NODE_STATS *stats)
653572ff6f6SMatthew Dillon {
654572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
655572ff6f6SMatthew Dillon uint32_t phyCnt1, phyCnt2;
656572ff6f6SMatthew Dillon
657572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: mibc 0x%x phyCnt1 0x%x phyCnt2 0x%x "
658572ff6f6SMatthew Dillon "filtofdm 0x%x filtcck 0x%x\n",
659572ff6f6SMatthew Dillon __func__, OS_REG_READ(ah, AR_MIBC),
660572ff6f6SMatthew Dillon OS_REG_READ(ah, AR_PHYCNT1), OS_REG_READ(ah, AR_PHYCNT2),
661572ff6f6SMatthew Dillon OS_REG_READ(ah, AR_FILTOFDM), OS_REG_READ(ah, AR_FILTCCK));
662572ff6f6SMatthew Dillon
663572ff6f6SMatthew Dillon /*
664572ff6f6SMatthew Dillon * First order of business is to clear whatever caused
665572ff6f6SMatthew Dillon * the interrupt so we don't keep getting interrupted.
666572ff6f6SMatthew Dillon * We have the usual mib counters that are reset-on-read
667572ff6f6SMatthew Dillon * and the additional counters that appeared starting in
668572ff6f6SMatthew Dillon * Hainan. We collect the mib counters and explicitly
669572ff6f6SMatthew Dillon * zero additional counters we are not using. Anything
670572ff6f6SMatthew Dillon * else is reset only if it caused the interrupt.
671572ff6f6SMatthew Dillon */
672572ff6f6SMatthew Dillon /* NB: these are not reset-on-read */
673572ff6f6SMatthew Dillon phyCnt1 = OS_REG_READ(ah, AR_PHY_ERR_1);
674572ff6f6SMatthew Dillon phyCnt2 = OS_REG_READ(ah, AR_PHY_ERR_2);
675572ff6f6SMatthew Dillon /* not used, always reset them in case they are the cause */
676572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_FILTOFDM, 0);
677572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_FILTCCK, 0);
678572ff6f6SMatthew Dillon if ((OS_REG_READ(ah, AR_SLP_MIB_CTRL) & AR_SLP_MIB_PENDING) == 0)
679572ff6f6SMatthew Dillon OS_REG_WRITE(ah, AR_SLP_MIB_CTRL, AR_SLP_MIB_CLEAR);
680572ff6f6SMatthew Dillon
681572ff6f6SMatthew Dillon /* Clear the mib counters and save them in the stats */
682572ff6f6SMatthew Dillon ar5212UpdateMibCounters(ah, &ahp->ah_mibStats);
683572ff6f6SMatthew Dillon ahp->ah_stats.ast_nodestats = *stats;
684572ff6f6SMatthew Dillon
685572ff6f6SMatthew Dillon /*
686572ff6f6SMatthew Dillon * Check for an ani stat hitting the trigger threshold.
687572ff6f6SMatthew Dillon * When this happens we get a MIB interrupt and the top
688572ff6f6SMatthew Dillon * 2 bits of the counter register will be 0b11, hence
689572ff6f6SMatthew Dillon * the mask check of phyCnt?.
690572ff6f6SMatthew Dillon */
691572ff6f6SMatthew Dillon if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) ||
692572ff6f6SMatthew Dillon ((phyCnt2 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK)) {
693572ff6f6SMatthew Dillon struct ar5212AniState *aniState = ahp->ah_curani;
694572ff6f6SMatthew Dillon const struct ar5212AniParams *params = aniState->params;
695572ff6f6SMatthew Dillon uint32_t ofdmPhyErrCnt, cckPhyErrCnt;
696572ff6f6SMatthew Dillon
697572ff6f6SMatthew Dillon ofdmPhyErrCnt = phyCnt1 - params->ofdmPhyErrBase;
698572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_ofdmerrs +=
699572ff6f6SMatthew Dillon ofdmPhyErrCnt - aniState->ofdmPhyErrCount;
700572ff6f6SMatthew Dillon aniState->ofdmPhyErrCount = ofdmPhyErrCnt;
701572ff6f6SMatthew Dillon
702572ff6f6SMatthew Dillon cckPhyErrCnt = phyCnt2 - params->cckPhyErrBase;
703572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_cckerrs +=
704572ff6f6SMatthew Dillon cckPhyErrCnt - aniState->cckPhyErrCount;
705572ff6f6SMatthew Dillon aniState->cckPhyErrCount = cckPhyErrCnt;
706572ff6f6SMatthew Dillon
707572ff6f6SMatthew Dillon /*
708572ff6f6SMatthew Dillon * NB: figure out which counter triggered. If both
709572ff6f6SMatthew Dillon * trigger we'll only deal with one as the processing
710572ff6f6SMatthew Dillon * clobbers the error counter so the trigger threshold
711572ff6f6SMatthew Dillon * check will never be true.
712572ff6f6SMatthew Dillon */
713572ff6f6SMatthew Dillon if (aniState->ofdmPhyErrCount > params->ofdmTrigHigh)
714572ff6f6SMatthew Dillon ar5416AniOfdmErrTrigger(ah);
715572ff6f6SMatthew Dillon if (aniState->cckPhyErrCount > params->cckTrigHigh)
716572ff6f6SMatthew Dillon ar5416AniCckErrTrigger(ah);
717572ff6f6SMatthew Dillon /* NB: always restart to insure the h/w counters are reset */
718572ff6f6SMatthew Dillon ar5416AniRestart(ah, aniState);
719572ff6f6SMatthew Dillon }
720572ff6f6SMatthew Dillon }
721572ff6f6SMatthew Dillon
722572ff6f6SMatthew Dillon static void
ar5416AniLowerImmunity(struct ath_hal * ah)723572ff6f6SMatthew Dillon ar5416AniLowerImmunity(struct ath_hal *ah)
724572ff6f6SMatthew Dillon {
725572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
726572ff6f6SMatthew Dillon struct ar5212AniState *aniState;
727572ff6f6SMatthew Dillon const struct ar5212AniParams *params;
728572ff6f6SMatthew Dillon
729572ff6f6SMatthew Dillon HALASSERT(ANI_ENA(ah));
730572ff6f6SMatthew Dillon
731572ff6f6SMatthew Dillon aniState = ahp->ah_curani;
732572ff6f6SMatthew Dillon params = aniState->params;
733572ff6f6SMatthew Dillon
734572ff6f6SMatthew Dillon /*
735572ff6f6SMatthew Dillon * In the case of AP mode operation, we cannot bucketize beacons
736572ff6f6SMatthew Dillon * according to RSSI. Instead, lower Firstep level, down to min, and
737572ff6f6SMatthew Dillon * simply return.
738572ff6f6SMatthew Dillon */
739572ff6f6SMatthew Dillon if (AH_PRIVATE(ah)->ah_opmode == HAL_M_HOSTAP) {
740572ff6f6SMatthew Dillon if (aniState->firstepLevel > 0) {
741572ff6f6SMatthew Dillon if (ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
742572ff6f6SMatthew Dillon aniState->firstepLevel - 1))
743572ff6f6SMatthew Dillon return;
744572ff6f6SMatthew Dillon }
745572ff6f6SMatthew Dillon }
746572ff6f6SMatthew Dillon if (ANI_ENA_RSSI(ah)) {
747572ff6f6SMatthew Dillon int32_t rssi = BEACON_RSSI(ahp);
748572ff6f6SMatthew Dillon if (rssi > params->rssiThrHigh) {
749572ff6f6SMatthew Dillon /*
750572ff6f6SMatthew Dillon * Beacon signal is high, leave ofdm weak signal
751572ff6f6SMatthew Dillon * detection off or it may oscillate. Let it fall
752572ff6f6SMatthew Dillon * through.
753572ff6f6SMatthew Dillon */
754572ff6f6SMatthew Dillon } else if (rssi > params->rssiThrLow) {
755572ff6f6SMatthew Dillon /*
756572ff6f6SMatthew Dillon * Beacon rssi in mid range, turn on ofdm weak signal
757572ff6f6SMatthew Dillon * detection or lower firstep level.
758572ff6f6SMatthew Dillon */
759572ff6f6SMatthew Dillon if (aniState->ofdmWeakSigDetectOff) {
760572ff6f6SMatthew Dillon if (ar5416AniControl(ah,
761572ff6f6SMatthew Dillon HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
762572ff6f6SMatthew Dillon AH_TRUE))
763572ff6f6SMatthew Dillon return;
764572ff6f6SMatthew Dillon }
765572ff6f6SMatthew Dillon if (aniState->firstepLevel > 0) {
766572ff6f6SMatthew Dillon if (ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
767572ff6f6SMatthew Dillon aniState->firstepLevel - 1))
768572ff6f6SMatthew Dillon return;
769572ff6f6SMatthew Dillon }
770572ff6f6SMatthew Dillon } else {
771572ff6f6SMatthew Dillon /*
772572ff6f6SMatthew Dillon * Beacon rssi is low, reduce firstep level.
773572ff6f6SMatthew Dillon */
774572ff6f6SMatthew Dillon if (aniState->firstepLevel > 0) {
775572ff6f6SMatthew Dillon if (ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
776572ff6f6SMatthew Dillon aniState->firstepLevel - 1))
777572ff6f6SMatthew Dillon return;
778572ff6f6SMatthew Dillon }
779572ff6f6SMatthew Dillon }
780572ff6f6SMatthew Dillon }
781572ff6f6SMatthew Dillon /* then lower spur immunity level, down to zero */
782572ff6f6SMatthew Dillon if (aniState->spurImmunityLevel > 0) {
783572ff6f6SMatthew Dillon if (ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL,
784572ff6f6SMatthew Dillon aniState->spurImmunityLevel - 1))
785572ff6f6SMatthew Dillon return;
786572ff6f6SMatthew Dillon }
787572ff6f6SMatthew Dillon /*
788572ff6f6SMatthew Dillon * if all else fails, lower noise immunity level down to a min value
789572ff6f6SMatthew Dillon * zero for now
790572ff6f6SMatthew Dillon */
791572ff6f6SMatthew Dillon if (aniState->noiseImmunityLevel > 0) {
792572ff6f6SMatthew Dillon if (ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL,
793572ff6f6SMatthew Dillon aniState->noiseImmunityLevel - 1))
794572ff6f6SMatthew Dillon return;
795572ff6f6SMatthew Dillon }
796572ff6f6SMatthew Dillon }
797572ff6f6SMatthew Dillon
798572ff6f6SMatthew Dillon #define CLOCK_RATE 44000 /* XXX use mac_usec or similar */
799572ff6f6SMatthew Dillon /* convert HW counter values to ms using 11g clock rate, goo9d enough
800572ff6f6SMatthew Dillon for 11a and Turbo */
801572ff6f6SMatthew Dillon
802572ff6f6SMatthew Dillon /*
803572ff6f6SMatthew Dillon * Return an approximation of the time spent ``listening'' by
804572ff6f6SMatthew Dillon * deducting the cycles spent tx'ing and rx'ing from the total
805572ff6f6SMatthew Dillon * cycle count since our last call. A return value <0 indicates
806572ff6f6SMatthew Dillon * an invalid/inconsistent time.
807572ff6f6SMatthew Dillon *
808572ff6f6SMatthew Dillon * This may be called with ANI disabled; in which case simply keep
809572ff6f6SMatthew Dillon * the statistics and don't write to the aniState pointer.
810572ff6f6SMatthew Dillon *
811572ff6f6SMatthew Dillon * XXX TODO: Make this cleaner!
812572ff6f6SMatthew Dillon */
813572ff6f6SMatthew Dillon static int32_t
ar5416AniGetListenTime(struct ath_hal * ah)814572ff6f6SMatthew Dillon ar5416AniGetListenTime(struct ath_hal *ah)
815572ff6f6SMatthew Dillon {
816572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
817572ff6f6SMatthew Dillon struct ar5212AniState *aniState = NULL;
818572ff6f6SMatthew Dillon int32_t listenTime = 0;
819572ff6f6SMatthew Dillon int good;
820572ff6f6SMatthew Dillon HAL_SURVEY_SAMPLE hs;
821572ff6f6SMatthew Dillon
822572ff6f6SMatthew Dillon /*
823572ff6f6SMatthew Dillon * We shouldn't see ah_curchan be NULL, but just in case..
824572ff6f6SMatthew Dillon */
825572ff6f6SMatthew Dillon if (AH_PRIVATE(ah)->ah_curchan == AH_NULL) {
826572ff6f6SMatthew Dillon ath_hal_printf(ah, "%s: ah_curchan = NULL?\n", __func__);
827572ff6f6SMatthew Dillon return (0);
828572ff6f6SMatthew Dillon }
829572ff6f6SMatthew Dillon
830572ff6f6SMatthew Dillon /*
831572ff6f6SMatthew Dillon * Fetch the current statistics, squirrel away the current
832*b14ca477SMatthew Dillon * sample.
833572ff6f6SMatthew Dillon */
834572ff6f6SMatthew Dillon OS_MEMZERO(&hs, sizeof(hs));
835572ff6f6SMatthew Dillon good = ar5416GetMibCycleCounts(ah, &hs);
836*b14ca477SMatthew Dillon ath_hal_survey_add_sample(ah, &hs);
837572ff6f6SMatthew Dillon
838572ff6f6SMatthew Dillon if (ANI_ENA(ah))
839572ff6f6SMatthew Dillon aniState = ahp->ah_curani;
840572ff6f6SMatthew Dillon
841572ff6f6SMatthew Dillon if (good == AH_FALSE) {
842572ff6f6SMatthew Dillon /*
843572ff6f6SMatthew Dillon * Cycle counter wrap (or initial call); it's not possible
844572ff6f6SMatthew Dillon * to accurately calculate a value because the registers
845572ff6f6SMatthew Dillon * right shift rather than wrap--so punt and return 0.
846572ff6f6SMatthew Dillon */
847572ff6f6SMatthew Dillon listenTime = 0;
848572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_lzero++;
849572ff6f6SMatthew Dillon } else if (ANI_ENA(ah)) {
850572ff6f6SMatthew Dillon /*
851572ff6f6SMatthew Dillon * Only calculate and update the cycle count if we have
852572ff6f6SMatthew Dillon * an ANI state.
853572ff6f6SMatthew Dillon */
854572ff6f6SMatthew Dillon int32_t ccdelta =
855572ff6f6SMatthew Dillon AH5416(ah)->ah_cycleCount - aniState->cycleCount;
856572ff6f6SMatthew Dillon int32_t rfdelta =
857572ff6f6SMatthew Dillon AH5416(ah)->ah_rxBusy - aniState->rxFrameCount;
858572ff6f6SMatthew Dillon int32_t tfdelta =
859572ff6f6SMatthew Dillon AH5416(ah)->ah_txBusy - aniState->txFrameCount;
860572ff6f6SMatthew Dillon listenTime = (ccdelta - rfdelta - tfdelta) / CLOCK_RATE;
861572ff6f6SMatthew Dillon }
862572ff6f6SMatthew Dillon
863572ff6f6SMatthew Dillon /*
864572ff6f6SMatthew Dillon * Again, only update ANI state if we have it.
865572ff6f6SMatthew Dillon */
866572ff6f6SMatthew Dillon if (ANI_ENA(ah)) {
867572ff6f6SMatthew Dillon aniState->cycleCount = AH5416(ah)->ah_cycleCount;
868572ff6f6SMatthew Dillon aniState->rxFrameCount = AH5416(ah)->ah_rxBusy;
869572ff6f6SMatthew Dillon aniState->txFrameCount = AH5416(ah)->ah_txBusy;
870572ff6f6SMatthew Dillon }
871572ff6f6SMatthew Dillon
872572ff6f6SMatthew Dillon return listenTime;
873572ff6f6SMatthew Dillon }
874572ff6f6SMatthew Dillon
875572ff6f6SMatthew Dillon /*
876572ff6f6SMatthew Dillon * Update ani stats in preparation for listen time processing.
877572ff6f6SMatthew Dillon */
878572ff6f6SMatthew Dillon static void
updateMIBStats(struct ath_hal * ah,struct ar5212AniState * aniState)879572ff6f6SMatthew Dillon updateMIBStats(struct ath_hal *ah, struct ar5212AniState *aniState)
880572ff6f6SMatthew Dillon {
881572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
882572ff6f6SMatthew Dillon const struct ar5212AniParams *params = aniState->params;
883572ff6f6SMatthew Dillon uint32_t phyCnt1, phyCnt2;
884572ff6f6SMatthew Dillon int32_t ofdmPhyErrCnt, cckPhyErrCnt;
885572ff6f6SMatthew Dillon
886572ff6f6SMatthew Dillon /* Clear the mib counters and save them in the stats */
887572ff6f6SMatthew Dillon ar5212UpdateMibCounters(ah, &ahp->ah_mibStats);
888572ff6f6SMatthew Dillon
889572ff6f6SMatthew Dillon /* NB: these are not reset-on-read */
890572ff6f6SMatthew Dillon phyCnt1 = OS_REG_READ(ah, AR_PHY_ERR_1);
891572ff6f6SMatthew Dillon phyCnt2 = OS_REG_READ(ah, AR_PHY_ERR_2);
892572ff6f6SMatthew Dillon
893572ff6f6SMatthew Dillon /* NB: these are spec'd to never roll-over */
894572ff6f6SMatthew Dillon ofdmPhyErrCnt = phyCnt1 - params->ofdmPhyErrBase;
895572ff6f6SMatthew Dillon if (ofdmPhyErrCnt < 0) {
896572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "OFDM phyErrCnt %d phyCnt1 0x%x\n",
897572ff6f6SMatthew Dillon ofdmPhyErrCnt, phyCnt1);
898572ff6f6SMatthew Dillon ofdmPhyErrCnt = AR_PHY_COUNTMAX;
899572ff6f6SMatthew Dillon }
900572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_ofdmerrs +=
901572ff6f6SMatthew Dillon ofdmPhyErrCnt - aniState->ofdmPhyErrCount;
902572ff6f6SMatthew Dillon aniState->ofdmPhyErrCount = ofdmPhyErrCnt;
903572ff6f6SMatthew Dillon
904572ff6f6SMatthew Dillon cckPhyErrCnt = phyCnt2 - params->cckPhyErrBase;
905572ff6f6SMatthew Dillon if (cckPhyErrCnt < 0) {
906572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "CCK phyErrCnt %d phyCnt2 0x%x\n",
907572ff6f6SMatthew Dillon cckPhyErrCnt, phyCnt2);
908572ff6f6SMatthew Dillon cckPhyErrCnt = AR_PHY_COUNTMAX;
909572ff6f6SMatthew Dillon }
910572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_cckerrs +=
911572ff6f6SMatthew Dillon cckPhyErrCnt - aniState->cckPhyErrCount;
912572ff6f6SMatthew Dillon aniState->cckPhyErrCount = cckPhyErrCnt;
913572ff6f6SMatthew Dillon }
914572ff6f6SMatthew Dillon
915572ff6f6SMatthew Dillon void
ar5416RxMonitor(struct ath_hal * ah,const HAL_NODE_STATS * stats,const struct ieee80211_channel * chan)916572ff6f6SMatthew Dillon ar5416RxMonitor(struct ath_hal *ah, const HAL_NODE_STATS *stats,
917572ff6f6SMatthew Dillon const struct ieee80211_channel *chan)
918572ff6f6SMatthew Dillon {
919572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
920572ff6f6SMatthew Dillon ahp->ah_stats.ast_nodestats.ns_avgbrssi = stats->ns_avgbrssi;
921572ff6f6SMatthew Dillon }
922572ff6f6SMatthew Dillon
923572ff6f6SMatthew Dillon /*
924572ff6f6SMatthew Dillon * Do periodic processing. This routine is called from the
925572ff6f6SMatthew Dillon * driver's rx interrupt handler after processing frames.
926572ff6f6SMatthew Dillon */
927572ff6f6SMatthew Dillon void
ar5416AniPoll(struct ath_hal * ah,const struct ieee80211_channel * chan)928572ff6f6SMatthew Dillon ar5416AniPoll(struct ath_hal *ah, const struct ieee80211_channel *chan)
929572ff6f6SMatthew Dillon {
930572ff6f6SMatthew Dillon struct ath_hal_5212 *ahp = AH5212(ah);
931572ff6f6SMatthew Dillon struct ar5212AniState *aniState = ahp->ah_curani;
932572ff6f6SMatthew Dillon const struct ar5212AniParams *params;
933572ff6f6SMatthew Dillon int32_t listenTime;
934572ff6f6SMatthew Dillon
935572ff6f6SMatthew Dillon /* Always update from the MIB, for statistics gathering */
936572ff6f6SMatthew Dillon listenTime = ar5416AniGetListenTime(ah);
937572ff6f6SMatthew Dillon
938572ff6f6SMatthew Dillon /* XXX can aniState be null? */
939572ff6f6SMatthew Dillon if (aniState == AH_NULL)
940572ff6f6SMatthew Dillon return;
941572ff6f6SMatthew Dillon
942572ff6f6SMatthew Dillon if (!ANI_ENA(ah))
943572ff6f6SMatthew Dillon return;
944572ff6f6SMatthew Dillon
945572ff6f6SMatthew Dillon if (listenTime < 0) {
946572ff6f6SMatthew Dillon ahp->ah_stats.ast_ani_lneg++;
947572ff6f6SMatthew Dillon /* restart ANI period if listenTime is invalid */
948572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: invalid listenTime\n",
949572ff6f6SMatthew Dillon __func__);
950572ff6f6SMatthew Dillon ar5416AniRestart(ah, aniState);
951572ff6f6SMatthew Dillon }
952572ff6f6SMatthew Dillon /* XXX beware of overflow? */
953572ff6f6SMatthew Dillon aniState->listenTime += listenTime;
954572ff6f6SMatthew Dillon
955572ff6f6SMatthew Dillon OS_MARK(ah, AH_MARK_ANI_POLL, aniState->listenTime);
956572ff6f6SMatthew Dillon
957572ff6f6SMatthew Dillon params = aniState->params;
958572ff6f6SMatthew Dillon if (aniState->listenTime > 5*params->period) {
959572ff6f6SMatthew Dillon /*
960572ff6f6SMatthew Dillon * Check to see if need to lower immunity if
961572ff6f6SMatthew Dillon * 5 aniPeriods have passed
962572ff6f6SMatthew Dillon */
963572ff6f6SMatthew Dillon updateMIBStats(ah, aniState);
964572ff6f6SMatthew Dillon if (aniState->ofdmPhyErrCount <= aniState->listenTime *
965572ff6f6SMatthew Dillon params->ofdmTrigLow/1000 &&
966572ff6f6SMatthew Dillon aniState->cckPhyErrCount <= aniState->listenTime *
967572ff6f6SMatthew Dillon params->cckTrigLow/1000)
968572ff6f6SMatthew Dillon ar5416AniLowerImmunity(ah);
969572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI, "%s: lower immunity\n",
970572ff6f6SMatthew Dillon __func__);
971572ff6f6SMatthew Dillon ar5416AniRestart(ah, aniState);
972572ff6f6SMatthew Dillon } else if (aniState->listenTime > params->period) {
973572ff6f6SMatthew Dillon updateMIBStats(ah, aniState);
974572ff6f6SMatthew Dillon /* check to see if need to raise immunity */
975572ff6f6SMatthew Dillon if (aniState->ofdmPhyErrCount > aniState->listenTime *
976572ff6f6SMatthew Dillon params->ofdmTrigHigh / 1000) {
977572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
978572ff6f6SMatthew Dillon "%s: OFDM err %u listenTime %u\n", __func__,
979572ff6f6SMatthew Dillon aniState->ofdmPhyErrCount, aniState->listenTime);
980572ff6f6SMatthew Dillon ar5416AniOfdmErrTrigger(ah);
981572ff6f6SMatthew Dillon ar5416AniRestart(ah, aniState);
982572ff6f6SMatthew Dillon } else if (aniState->cckPhyErrCount > aniState->listenTime *
983572ff6f6SMatthew Dillon params->cckTrigHigh / 1000) {
984572ff6f6SMatthew Dillon HALDEBUG(ah, HAL_DEBUG_ANI,
985572ff6f6SMatthew Dillon "%s: CCK err %u listenTime %u\n", __func__,
986572ff6f6SMatthew Dillon aniState->cckPhyErrCount, aniState->listenTime);
987572ff6f6SMatthew Dillon ar5416AniCckErrTrigger(ah);
988572ff6f6SMatthew Dillon ar5416AniRestart(ah, aniState);
989572ff6f6SMatthew Dillon }
990572ff6f6SMatthew Dillon }
991572ff6f6SMatthew Dillon }
992