1 /* 2 * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>. All rights reserved. 3 * 4 * Copyright (c) 2001-2008, Intel Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright notice, 11 * this list of conditions and the following disclaimer. 12 * 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * 3. Neither the name of the Intel Corporation nor the names of its 18 * contributors may be used to endorse or promote products derived from 19 * this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 * 33 * 34 * Copyright (c) 2005 The DragonFly Project. All rights reserved. 35 * 36 * This code is derived from software contributed to The DragonFly Project 37 * by Matthew Dillon <dillon@backplane.com> 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in 47 * the documentation and/or other materials provided with the 48 * distribution. 49 * 3. Neither the name of The DragonFly Project nor the names of its 50 * contributors may be used to endorse or promote products derived 51 * from this software without specific, prior written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 54 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 55 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 56 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 57 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 58 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 59 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 60 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 61 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 62 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 63 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 64 * SUCH DAMAGE. 65 * 66 * $DragonFly: src/sys/dev/netif/em/if_em.c,v 1.80 2008/09/17 08:51:29 sephe Exp $ 67 */ 68 /* 69 * SERIALIZATION API RULES: 70 * 71 * - If the driver uses the same serializer for the interrupt as for the 72 * ifnet, most of the serialization will be done automatically for the 73 * driver. 74 * 75 * - ifmedia entry points will be serialized by the ifmedia code using the 76 * ifnet serializer. 77 * 78 * - if_* entry points except for if_input will be serialized by the IF 79 * and protocol layers. 80 * 81 * - The device driver must be sure to serialize access from timeout code 82 * installed by the device driver. 83 * 84 * - The device driver typically holds the serializer at the time it wishes 85 * to call if_input. 86 * 87 * - We must call lwkt_serialize_handler_enable() prior to enabling the 88 * hardware interrupt and lwkt_serialize_handler_disable() after disabling 89 * the hardware interrupt in order to avoid handler execution races from 90 * scheduled interrupt threads. 91 * 92 * NOTE! Since callers into the device driver hold the ifnet serializer, 93 * the device driver may be holding a serializer at the time it calls 94 * if_input even if it is not serializer-aware. 95 */ 96 97 #include "opt_polling.h" 98 #include "opt_serializer.h" 99 100 #include <sys/param.h> 101 #include <sys/bus.h> 102 #include <sys/endian.h> 103 #include <sys/interrupt.h> 104 #include <sys/kernel.h> 105 #include <sys/ktr.h> 106 #include <sys/malloc.h> 107 #include <sys/mbuf.h> 108 #include <sys/proc.h> 109 #include <sys/rman.h> 110 #include <sys/serialize.h> 111 #include <sys/socket.h> 112 #include <sys/sockio.h> 113 #include <sys/sysctl.h> 114 #include <sys/systm.h> 115 116 #include <net/bpf.h> 117 #include <net/ethernet.h> 118 #include <net/if.h> 119 #include <net/if_arp.h> 120 #include <net/if_dl.h> 121 #include <net/if_media.h> 122 #include <net/ifq_var.h> 123 #include <net/vlan/if_vlan_var.h> 124 #include <net/vlan/if_vlan_ether.h> 125 126 #include <netinet/in_systm.h> 127 #include <netinet/in.h> 128 #include <netinet/ip.h> 129 #include <netinet/tcp.h> 130 #include <netinet/udp.h> 131 132 #include <bus/pci/pcivar.h> 133 #include <bus/pci/pcireg.h> 134 135 #include <dev/netif/ig_hal/e1000_api.h> 136 #include <dev/netif/ig_hal/e1000_82571.h> 137 #include <dev/netif/em/if_em.h> 138 139 #define EM_NAME "Intel(R) PRO/1000 Network Connection " 140 #define EM_VER " 6.9.6" 141 142 #define _EM_DEVICE(id, ret) \ 143 { EM_VENDOR_ID, E1000_DEV_ID_##id, ret, EM_NAME #id EM_VER } 144 #define EM_EMX_DEVICE(id) _EM_DEVICE(id, -100) 145 #define EM_DEVICE(id) _EM_DEVICE(id, 0) 146 #define EM_DEVICE_NULL { 0, 0, 0, NULL } 147 148 static const struct em_vendor_info em_vendor_info_array[] = { 149 EM_DEVICE(82540EM), 150 EM_DEVICE(82540EM_LOM), 151 EM_DEVICE(82540EP), 152 EM_DEVICE(82540EP_LOM), 153 EM_DEVICE(82540EP_LP), 154 155 EM_DEVICE(82541EI), 156 EM_DEVICE(82541ER), 157 EM_DEVICE(82541ER_LOM), 158 EM_DEVICE(82541EI_MOBILE), 159 EM_DEVICE(82541GI), 160 EM_DEVICE(82541GI_LF), 161 EM_DEVICE(82541GI_MOBILE), 162 163 EM_DEVICE(82542), 164 165 EM_DEVICE(82543GC_FIBER), 166 EM_DEVICE(82543GC_COPPER), 167 168 EM_DEVICE(82544EI_COPPER), 169 EM_DEVICE(82544EI_FIBER), 170 EM_DEVICE(82544GC_COPPER), 171 EM_DEVICE(82544GC_LOM), 172 173 EM_DEVICE(82545EM_COPPER), 174 EM_DEVICE(82545EM_FIBER), 175 EM_DEVICE(82545GM_COPPER), 176 EM_DEVICE(82545GM_FIBER), 177 EM_DEVICE(82545GM_SERDES), 178 179 EM_DEVICE(82546EB_COPPER), 180 EM_DEVICE(82546EB_FIBER), 181 EM_DEVICE(82546EB_QUAD_COPPER), 182 EM_DEVICE(82546GB_COPPER), 183 EM_DEVICE(82546GB_FIBER), 184 EM_DEVICE(82546GB_SERDES), 185 EM_DEVICE(82546GB_PCIE), 186 EM_DEVICE(82546GB_QUAD_COPPER), 187 EM_DEVICE(82546GB_QUAD_COPPER_KSP3), 188 189 EM_DEVICE(82547EI), 190 EM_DEVICE(82547EI_MOBILE), 191 EM_DEVICE(82547GI), 192 193 EM_EMX_DEVICE(82571EB_COPPER), 194 EM_EMX_DEVICE(82571EB_FIBER), 195 EM_EMX_DEVICE(82571EB_SERDES), 196 EM_EMX_DEVICE(82571EB_SERDES_DUAL), 197 EM_EMX_DEVICE(82571EB_SERDES_QUAD), 198 EM_EMX_DEVICE(82571EB_QUAD_COPPER), 199 EM_EMX_DEVICE(82571EB_QUAD_COPPER_BP), 200 EM_EMX_DEVICE(82571EB_QUAD_COPPER_LP), 201 EM_EMX_DEVICE(82571EB_QUAD_FIBER), 202 EM_EMX_DEVICE(82571PT_QUAD_COPPER), 203 204 EM_EMX_DEVICE(82572EI_COPPER), 205 EM_EMX_DEVICE(82572EI_FIBER), 206 EM_EMX_DEVICE(82572EI_SERDES), 207 EM_EMX_DEVICE(82572EI), 208 209 EM_EMX_DEVICE(82573E), 210 EM_EMX_DEVICE(82573E_IAMT), 211 EM_EMX_DEVICE(82573L), 212 213 EM_EMX_DEVICE(80003ES2LAN_COPPER_SPT), 214 EM_EMX_DEVICE(80003ES2LAN_SERDES_SPT), 215 EM_EMX_DEVICE(80003ES2LAN_COPPER_DPT), 216 EM_EMX_DEVICE(80003ES2LAN_SERDES_DPT), 217 218 EM_DEVICE(ICH8_IGP_M_AMT), 219 EM_DEVICE(ICH8_IGP_AMT), 220 EM_DEVICE(ICH8_IGP_C), 221 EM_DEVICE(ICH8_IFE), 222 EM_DEVICE(ICH8_IFE_GT), 223 EM_DEVICE(ICH8_IFE_G), 224 EM_DEVICE(ICH8_IGP_M), 225 226 EM_DEVICE(ICH9_IGP_M_AMT), 227 EM_DEVICE(ICH9_IGP_AMT), 228 EM_DEVICE(ICH9_IGP_C), 229 EM_DEVICE(ICH9_IGP_M), 230 EM_DEVICE(ICH9_IGP_M_V), 231 EM_DEVICE(ICH9_IFE), 232 EM_DEVICE(ICH9_IFE_GT), 233 EM_DEVICE(ICH9_IFE_G), 234 EM_DEVICE(ICH9_BM), 235 236 EM_EMX_DEVICE(82574L), 237 238 EM_DEVICE(ICH10_R_BM_LM), 239 EM_DEVICE(ICH10_R_BM_LF), 240 EM_DEVICE(ICH10_R_BM_V), 241 EM_DEVICE(ICH10_D_BM_LM), 242 EM_DEVICE(ICH10_D_BM_LF), 243 244 /* required last entry */ 245 EM_DEVICE_NULL 246 }; 247 248 static int em_probe(device_t); 249 static int em_attach(device_t); 250 static int em_detach(device_t); 251 static int em_shutdown(device_t); 252 static int em_suspend(device_t); 253 static int em_resume(device_t); 254 255 static void em_init(void *); 256 static void em_stop(struct adapter *); 257 static int em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *); 258 static void em_start(struct ifnet *); 259 #ifdef DEVICE_POLLING 260 static void em_poll(struct ifnet *, enum poll_cmd, int); 261 #endif 262 static void em_watchdog(struct ifnet *); 263 static void em_media_status(struct ifnet *, struct ifmediareq *); 264 static int em_media_change(struct ifnet *); 265 static void em_timer(void *); 266 267 static void em_intr(void *); 268 static void em_rxeof(struct adapter *, int); 269 static void em_txeof(struct adapter *); 270 static void em_tx_collect(struct adapter *); 271 static void em_tx_purge(struct adapter *); 272 static void em_enable_intr(struct adapter *); 273 static void em_disable_intr(struct adapter *); 274 275 static int em_dma_malloc(struct adapter *, bus_size_t, 276 struct em_dma_alloc *); 277 static void em_dma_free(struct adapter *, struct em_dma_alloc *); 278 static void em_init_tx_ring(struct adapter *); 279 static int em_init_rx_ring(struct adapter *); 280 static int em_create_tx_ring(struct adapter *); 281 static int em_create_rx_ring(struct adapter *); 282 static void em_destroy_tx_ring(struct adapter *, int); 283 static void em_destroy_rx_ring(struct adapter *, int); 284 static int em_newbuf(struct adapter *, int, int); 285 static int em_encap(struct adapter *, struct mbuf **); 286 static void em_rxcsum(struct adapter *, struct e1000_rx_desc *, 287 struct mbuf *); 288 static int em_txcsum_pullup(struct adapter *, struct mbuf **); 289 static int em_txcsum(struct adapter *, struct mbuf *, 290 uint32_t *, uint32_t *); 291 292 static int em_get_hw_info(struct adapter *); 293 static int em_is_valid_eaddr(const uint8_t *); 294 static int em_alloc_pci_res(struct adapter *); 295 static void em_free_pci_res(struct adapter *); 296 static int em_hw_init(struct adapter *); 297 static void em_setup_ifp(struct adapter *); 298 static void em_init_tx_unit(struct adapter *); 299 static void em_init_rx_unit(struct adapter *); 300 static void em_update_stats(struct adapter *); 301 static void em_set_promisc(struct adapter *); 302 static void em_disable_promisc(struct adapter *); 303 static void em_set_multi(struct adapter *); 304 static void em_update_link_status(struct adapter *); 305 static void em_smartspeed(struct adapter *); 306 307 /* Hardware workarounds */ 308 static int em_82547_fifo_workaround(struct adapter *, int); 309 static void em_82547_update_fifo_head(struct adapter *, int); 310 static int em_82547_tx_fifo_reset(struct adapter *); 311 static void em_82547_move_tail(void *); 312 static void em_82547_move_tail_serialized(struct adapter *); 313 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY); 314 315 static void em_print_debug_info(struct adapter *); 316 static void em_print_nvm_info(struct adapter *); 317 static void em_print_hw_stats(struct adapter *); 318 319 static int em_sysctl_stats(SYSCTL_HANDLER_ARGS); 320 static int em_sysctl_debug_info(SYSCTL_HANDLER_ARGS); 321 static int em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS); 322 static int em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS); 323 static void em_add_sysctl(struct adapter *adapter); 324 325 /* Management and WOL Support */ 326 static void em_get_mgmt(struct adapter *); 327 static void em_rel_mgmt(struct adapter *); 328 static void em_get_hw_control(struct adapter *); 329 static void em_rel_hw_control(struct adapter *); 330 static void em_enable_wol(device_t); 331 332 static device_method_t em_methods[] = { 333 /* Device interface */ 334 DEVMETHOD(device_probe, em_probe), 335 DEVMETHOD(device_attach, em_attach), 336 DEVMETHOD(device_detach, em_detach), 337 DEVMETHOD(device_shutdown, em_shutdown), 338 DEVMETHOD(device_suspend, em_suspend), 339 DEVMETHOD(device_resume, em_resume), 340 { 0, 0 } 341 }; 342 343 static driver_t em_driver = { 344 "em", 345 em_methods, 346 sizeof(struct adapter), 347 }; 348 349 static devclass_t em_devclass; 350 351 DECLARE_DUMMY_MODULE(if_em); 352 MODULE_DEPEND(em, ig_hal, 1, 1, 1); 353 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, 0, 0); 354 355 /* 356 * Tunables 357 */ 358 static int em_int_throttle_ceil = EM_DEFAULT_ITR; 359 static int em_rxd = EM_DEFAULT_RXD; 360 static int em_txd = EM_DEFAULT_TXD; 361 static int em_smart_pwr_down = FALSE; 362 363 /* Controls whether promiscuous also shows bad packets */ 364 static int em_debug_sbp = FALSE; 365 366 static int em_82573_workaround = TRUE; 367 368 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil); 369 TUNABLE_INT("hw.em.rxd", &em_rxd); 370 TUNABLE_INT("hw.em.txd", &em_txd); 371 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down); 372 TUNABLE_INT("hw.em.sbp", &em_debug_sbp); 373 TUNABLE_INT("hw.em.82573_workaround", &em_82573_workaround); 374 375 /* Global used in WOL setup with multiport cards */ 376 static int em_global_quad_port_a = 0; 377 378 /* Set this to one to display debug statistics */ 379 static int em_display_debug_stats = 0; 380 381 #if !defined(KTR_IF_EM) 382 #define KTR_IF_EM KTR_ALL 383 #endif 384 KTR_INFO_MASTER(if_em); 385 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin", 0); 386 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end", 0); 387 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet", 0); 388 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet", 0); 389 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean", 0); 390 #define logif(name) KTR_LOG(if_em_ ## name) 391 392 static int 393 em_probe(device_t dev) 394 { 395 const struct em_vendor_info *ent; 396 uint16_t vid, did; 397 398 vid = pci_get_vendor(dev); 399 did = pci_get_device(dev); 400 401 for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) { 402 if (vid == ent->vendor_id && did == ent->device_id) { 403 device_set_desc(dev, ent->desc); 404 device_set_async_attach(dev, TRUE); 405 return (ent->ret); 406 } 407 } 408 return (ENXIO); 409 } 410 411 static int 412 em_attach(device_t dev) 413 { 414 struct adapter *adapter = device_get_softc(dev); 415 struct ifnet *ifp = &adapter->arpcom.ac_if; 416 int tsize, rsize; 417 int error = 0; 418 uint16_t eeprom_data, device_id; 419 420 adapter->dev = adapter->osdep.dev = dev; 421 422 callout_init(&adapter->timer); 423 callout_init(&adapter->tx_fifo_timer); 424 425 /* Determine hardware and mac info */ 426 error = em_get_hw_info(adapter); 427 if (error) { 428 device_printf(dev, "Identify hardware failed\n"); 429 goto fail; 430 } 431 432 /* Setup PCI resources */ 433 error = em_alloc_pci_res(adapter); 434 if (error) { 435 device_printf(dev, "Allocation of PCI resources failed\n"); 436 goto fail; 437 } 438 439 /* 440 * For ICH8 and family we need to map the flash memory, 441 * and this must happen after the MAC is identified. 442 */ 443 if (adapter->hw.mac.type == e1000_ich8lan || 444 adapter->hw.mac.type == e1000_ich10lan || 445 adapter->hw.mac.type == e1000_ich9lan) { 446 adapter->flash_rid = EM_BAR_FLASH; 447 448 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 449 &adapter->flash_rid, RF_ACTIVE); 450 if (adapter->flash == NULL) { 451 device_printf(dev, "Mapping of Flash failed\n"); 452 error = ENXIO; 453 goto fail; 454 } 455 adapter->osdep.flash_bus_space_tag = 456 rman_get_bustag(adapter->flash); 457 adapter->osdep.flash_bus_space_handle = 458 rman_get_bushandle(adapter->flash); 459 460 /* 461 * This is used in the shared code 462 * XXX this goof is actually not used. 463 */ 464 adapter->hw.flash_address = (uint8_t *)adapter->flash; 465 } 466 467 /* Do Shared Code initialization */ 468 if (e1000_setup_init_funcs(&adapter->hw, TRUE)) { 469 device_printf(dev, "Setup of Shared code failed\n"); 470 error = ENXIO; 471 goto fail; 472 } 473 474 e1000_get_bus_info(&adapter->hw); 475 476 /* 477 * Validate number of transmit and receive descriptors. It 478 * must not exceed hardware maximum, and must be multiple 479 * of E1000_DBA_ALIGN. 480 */ 481 if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 || 482 (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) || 483 (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) || 484 em_txd < EM_MIN_TXD) { 485 device_printf(dev, "Using %d TX descriptors instead of %d!\n", 486 EM_DEFAULT_TXD, em_txd); 487 adapter->num_tx_desc = EM_DEFAULT_TXD; 488 } else { 489 adapter->num_tx_desc = em_txd; 490 } 491 if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 || 492 (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) || 493 (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) || 494 em_rxd < EM_MIN_RXD) { 495 device_printf(dev, "Using %d RX descriptors instead of %d!\n", 496 EM_DEFAULT_RXD, em_rxd); 497 adapter->num_rx_desc = EM_DEFAULT_RXD; 498 } else { 499 adapter->num_rx_desc = em_rxd; 500 } 501 502 adapter->hw.mac.autoneg = DO_AUTO_NEG; 503 adapter->hw.phy.autoneg_wait_to_complete = FALSE; 504 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT; 505 adapter->rx_buffer_len = MCLBYTES; 506 507 /* 508 * Interrupt throttle rate 509 */ 510 if (em_int_throttle_ceil == 0) { 511 adapter->int_throttle_ceil = 0; 512 } else { 513 int throttle = em_int_throttle_ceil; 514 515 if (throttle < 0) 516 throttle = EM_DEFAULT_ITR; 517 518 /* Recalculate the tunable value to get the exact frequency. */ 519 throttle = 1000000000 / 256 / throttle; 520 521 /* Upper 16bits of ITR is reserved and should be zero */ 522 if (throttle & 0xffff0000) 523 throttle = 1000000000 / 256 / EM_DEFAULT_ITR; 524 525 adapter->int_throttle_ceil = 1000000000 / 256 / throttle; 526 } 527 528 e1000_init_script_state_82541(&adapter->hw, TRUE); 529 e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE); 530 531 /* Copper options */ 532 if (adapter->hw.phy.media_type == e1000_media_type_copper) { 533 adapter->hw.phy.mdix = AUTO_ALL_MODES; 534 adapter->hw.phy.disable_polarity_correction = FALSE; 535 adapter->hw.phy.ms_type = EM_MASTER_SLAVE; 536 } 537 538 /* Set the frame limits assuming standard ethernet sized frames. */ 539 adapter->max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN; 540 adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN; 541 542 /* This controls when hardware reports transmit completion status. */ 543 adapter->hw.mac.report_tx_early = 1; 544 545 /* 546 * Create top level busdma tag 547 */ 548 error = bus_dma_tag_create(NULL, 1, 0, 549 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 550 NULL, NULL, 551 BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT, 552 0, &adapter->parent_dtag); 553 if (error) { 554 device_printf(dev, "could not create top level DMA tag\n"); 555 goto fail; 556 } 557 558 /* 559 * Allocate Transmit Descriptor ring 560 */ 561 tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc), 562 EM_DBA_ALIGN); 563 error = em_dma_malloc(adapter, tsize, &adapter->txdma); 564 if (error) { 565 device_printf(dev, "Unable to allocate tx_desc memory\n"); 566 goto fail; 567 } 568 adapter->tx_desc_base = adapter->txdma.dma_vaddr; 569 570 /* 571 * Allocate Receive Descriptor ring 572 */ 573 rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc), 574 EM_DBA_ALIGN); 575 error = em_dma_malloc(adapter, rsize, &adapter->rxdma); 576 if (error) { 577 device_printf(dev, "Unable to allocate rx_desc memory\n"); 578 goto fail; 579 } 580 adapter->rx_desc_base = adapter->rxdma.dma_vaddr; 581 582 /* Make sure we have a good EEPROM before we read from it */ 583 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) { 584 /* 585 * Some PCI-E parts fail the first check due to 586 * the link being in sleep state, call it again, 587 * if it fails a second time its a real issue. 588 */ 589 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) { 590 device_printf(dev, 591 "The EEPROM Checksum Is Not Valid\n"); 592 error = EIO; 593 goto fail; 594 } 595 } 596 597 /* Initialize the hardware */ 598 error = em_hw_init(adapter); 599 if (error) { 600 device_printf(dev, "Unable to initialize the hardware\n"); 601 goto fail; 602 } 603 604 /* Copy the permanent MAC address out of the EEPROM */ 605 if (e1000_read_mac_addr(&adapter->hw) < 0) { 606 device_printf(dev, "EEPROM read error while reading MAC" 607 " address\n"); 608 error = EIO; 609 goto fail; 610 } 611 if (!em_is_valid_eaddr(adapter->hw.mac.addr)) { 612 device_printf(dev, "Invalid MAC address\n"); 613 error = EIO; 614 goto fail; 615 } 616 617 /* Allocate transmit descriptors and buffers */ 618 error = em_create_tx_ring(adapter); 619 if (error) { 620 device_printf(dev, "Could not setup transmit structures\n"); 621 goto fail; 622 } 623 624 /* Allocate receive descriptors and buffers */ 625 error = em_create_rx_ring(adapter); 626 if (error) { 627 device_printf(dev, "Could not setup receive structures\n"); 628 goto fail; 629 } 630 631 /* Manually turn off all interrupts */ 632 E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff); 633 634 /* Setup OS specific network interface */ 635 em_setup_ifp(adapter); 636 637 /* Add sysctl tree, must after em_setup_ifp() */ 638 em_add_sysctl(adapter); 639 640 /* Initialize statistics */ 641 em_update_stats(adapter); 642 643 adapter->hw.mac.get_link_status = 1; 644 em_update_link_status(adapter); 645 646 /* Indicate SOL/IDER usage */ 647 if (e1000_check_reset_block(&adapter->hw)) { 648 device_printf(dev, 649 "PHY reset is blocked due to SOL/IDER session.\n"); 650 } 651 652 /* Determine if we have to control management hardware */ 653 adapter->has_manage = e1000_enable_mng_pass_thru(&adapter->hw); 654 655 /* 656 * Setup Wake-on-Lan 657 */ 658 switch (adapter->hw.mac.type) { 659 case e1000_82542: 660 case e1000_82543: 661 break; 662 663 case e1000_82546: 664 case e1000_82546_rev_3: 665 case e1000_82571: 666 case e1000_80003es2lan: 667 if (adapter->hw.bus.func == 1) { 668 e1000_read_nvm(&adapter->hw, 669 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); 670 } else { 671 e1000_read_nvm(&adapter->hw, 672 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); 673 } 674 eeprom_data &= EM_EEPROM_APME; 675 break; 676 677 default: 678 /* APME bit in EEPROM is mapped to WUC.APME */ 679 eeprom_data = 680 E1000_READ_REG(&adapter->hw, E1000_WUC) & E1000_WUC_APME; 681 break; 682 } 683 if (eeprom_data) 684 adapter->wol = E1000_WUFC_MAG; 685 /* 686 * We have the eeprom settings, now apply the special cases 687 * where the eeprom may be wrong or the board won't support 688 * wake on lan on a particular port 689 */ 690 device_id = pci_get_device(dev); 691 switch (device_id) { 692 case E1000_DEV_ID_82546GB_PCIE: 693 adapter->wol = 0; 694 break; 695 696 case E1000_DEV_ID_82546EB_FIBER: 697 case E1000_DEV_ID_82546GB_FIBER: 698 case E1000_DEV_ID_82571EB_FIBER: 699 /* 700 * Wake events only supported on port A for dual fiber 701 * regardless of eeprom setting 702 */ 703 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) & 704 E1000_STATUS_FUNC_1) 705 adapter->wol = 0; 706 break; 707 708 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: 709 case E1000_DEV_ID_82571EB_QUAD_COPPER: 710 case E1000_DEV_ID_82571EB_QUAD_FIBER: 711 case E1000_DEV_ID_82571EB_QUAD_COPPER_LP: 712 /* if quad port adapter, disable WoL on all but port A */ 713 if (em_global_quad_port_a != 0) 714 adapter->wol = 0; 715 /* Reset for multiple quad port adapters */ 716 if (++em_global_quad_port_a == 4) 717 em_global_quad_port_a = 0; 718 break; 719 } 720 721 /* XXX disable wol */ 722 adapter->wol = 0; 723 724 /* Do we need workaround for 82544 PCI-X adapter? */ 725 if (adapter->hw.bus.type == e1000_bus_type_pcix && 726 adapter->hw.mac.type == e1000_82544) 727 adapter->pcix_82544 = TRUE; 728 else 729 adapter->pcix_82544 = FALSE; 730 731 if (adapter->pcix_82544) { 732 /* 733 * 82544 on PCI-X may split one TX segment 734 * into two TX descs, so we double its number 735 * of spare TX desc here. 736 */ 737 adapter->spare_tx_desc = 2 * EM_TX_SPARE; 738 } else { 739 adapter->spare_tx_desc = EM_TX_SPARE; 740 } 741 742 /* 743 * Keep following relationship between spare_tx_desc, oact_tx_desc 744 * and tx_int_nsegs: 745 * (spare_tx_desc + EM_TX_RESERVED) <= 746 * oact_tx_desc <= EM_TX_OACTIVE_MAX <= tx_int_nsegs 747 */ 748 adapter->oact_tx_desc = adapter->num_tx_desc / 8; 749 if (adapter->oact_tx_desc > EM_TX_OACTIVE_MAX) 750 adapter->oact_tx_desc = EM_TX_OACTIVE_MAX; 751 if (adapter->oact_tx_desc < adapter->spare_tx_desc + EM_TX_RESERVED) 752 adapter->oact_tx_desc = adapter->spare_tx_desc + EM_TX_RESERVED; 753 754 adapter->tx_int_nsegs = adapter->num_tx_desc / 16; 755 if (adapter->tx_int_nsegs < adapter->oact_tx_desc) 756 adapter->tx_int_nsegs = adapter->oact_tx_desc; 757 758 error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE, 759 em_intr, adapter, &adapter->intr_tag, 760 ifp->if_serializer); 761 if (error) { 762 device_printf(dev, "Failed to register interrupt handler"); 763 ether_ifdetach(&adapter->arpcom.ac_if); 764 goto fail; 765 } 766 767 ifp->if_cpuid = ithread_cpuid(rman_get_start(adapter->intr_res)); 768 KKASSERT(ifp->if_cpuid >= 0 && ifp->if_cpuid < ncpus); 769 return (0); 770 fail: 771 em_detach(dev); 772 return (error); 773 } 774 775 static int 776 em_detach(device_t dev) 777 { 778 struct adapter *adapter = device_get_softc(dev); 779 780 if (device_is_attached(dev)) { 781 struct ifnet *ifp = &adapter->arpcom.ac_if; 782 783 lwkt_serialize_enter(ifp->if_serializer); 784 785 em_stop(adapter); 786 787 e1000_phy_hw_reset(&adapter->hw); 788 789 em_rel_mgmt(adapter); 790 791 if ((adapter->hw.mac.type == e1000_82573 || 792 adapter->hw.mac.type == e1000_ich8lan || 793 adapter->hw.mac.type == e1000_ich10lan || 794 adapter->hw.mac.type == e1000_ich9lan) && 795 e1000_check_mng_mode(&adapter->hw)) 796 em_rel_hw_control(adapter); 797 798 if (adapter->wol) { 799 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 800 E1000_WUC_PME_EN); 801 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol); 802 em_enable_wol(dev); 803 } 804 805 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag); 806 807 lwkt_serialize_exit(ifp->if_serializer); 808 809 ether_ifdetach(ifp); 810 } 811 bus_generic_detach(dev); 812 813 em_free_pci_res(adapter); 814 815 em_destroy_tx_ring(adapter, adapter->num_tx_desc); 816 em_destroy_rx_ring(adapter, adapter->num_rx_desc); 817 818 /* Free Transmit Descriptor ring */ 819 if (adapter->tx_desc_base) 820 em_dma_free(adapter, &adapter->txdma); 821 822 /* Free Receive Descriptor ring */ 823 if (adapter->rx_desc_base) 824 em_dma_free(adapter, &adapter->rxdma); 825 826 /* Free top level busdma tag */ 827 if (adapter->parent_dtag != NULL) 828 bus_dma_tag_destroy(adapter->parent_dtag); 829 830 /* Free sysctl tree */ 831 if (adapter->sysctl_tree != NULL) 832 sysctl_ctx_free(&adapter->sysctl_ctx); 833 834 return (0); 835 } 836 837 static int 838 em_shutdown(device_t dev) 839 { 840 return em_suspend(dev); 841 } 842 843 static int 844 em_suspend(device_t dev) 845 { 846 struct adapter *adapter = device_get_softc(dev); 847 struct ifnet *ifp = &adapter->arpcom.ac_if; 848 849 lwkt_serialize_enter(ifp->if_serializer); 850 851 em_stop(adapter); 852 853 em_rel_mgmt(adapter); 854 855 if ((adapter->hw.mac.type == e1000_82573 || 856 adapter->hw.mac.type == e1000_ich8lan || 857 adapter->hw.mac.type == e1000_ich10lan || 858 adapter->hw.mac.type == e1000_ich9lan) && 859 e1000_check_mng_mode(&adapter->hw)) 860 em_rel_hw_control(adapter); 861 862 if (adapter->wol) { 863 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN); 864 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol); 865 em_enable_wol(dev); 866 } 867 868 lwkt_serialize_exit(ifp->if_serializer); 869 870 return bus_generic_suspend(dev); 871 } 872 873 static int 874 em_resume(device_t dev) 875 { 876 struct adapter *adapter = device_get_softc(dev); 877 struct ifnet *ifp = &adapter->arpcom.ac_if; 878 879 lwkt_serialize_enter(ifp->if_serializer); 880 881 em_init(adapter); 882 em_get_mgmt(adapter); 883 if_devstart(ifp); 884 885 lwkt_serialize_exit(ifp->if_serializer); 886 887 return bus_generic_resume(dev); 888 } 889 890 static void 891 em_start(struct ifnet *ifp) 892 { 893 struct adapter *adapter = ifp->if_softc; 894 struct mbuf *m_head; 895 896 ASSERT_SERIALIZED(ifp->if_serializer); 897 898 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 899 return; 900 901 if (!adapter->link_active) { 902 ifq_purge(&ifp->if_snd); 903 return; 904 } 905 906 while (!ifq_is_empty(&ifp->if_snd)) { 907 /* Now do we at least have a minimal? */ 908 if (EM_IS_OACTIVE(adapter)) { 909 em_tx_collect(adapter); 910 if (EM_IS_OACTIVE(adapter)) { 911 ifp->if_flags |= IFF_OACTIVE; 912 adapter->no_tx_desc_avail1++; 913 break; 914 } 915 } 916 917 logif(pkt_txqueue); 918 m_head = ifq_dequeue(&ifp->if_snd, NULL); 919 if (m_head == NULL) 920 break; 921 922 if (em_encap(adapter, &m_head)) { 923 ifp->if_oerrors++; 924 em_tx_collect(adapter); 925 continue; 926 } 927 928 /* Send a copy of the frame to the BPF listener */ 929 ETHER_BPF_MTAP(ifp, m_head); 930 931 /* Set timeout in case hardware has problems transmitting. */ 932 ifp->if_timer = EM_TX_TIMEOUT; 933 } 934 } 935 936 static int 937 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr) 938 { 939 struct adapter *adapter = ifp->if_softc; 940 struct ifreq *ifr = (struct ifreq *)data; 941 uint16_t eeprom_data = 0; 942 int max_frame_size, mask, reinit; 943 int error = 0; 944 945 ASSERT_SERIALIZED(ifp->if_serializer); 946 947 switch (command) { 948 case SIOCSIFMTU: 949 switch (adapter->hw.mac.type) { 950 case e1000_82573: 951 /* 952 * 82573 only supports jumbo frames 953 * if ASPM is disabled. 954 */ 955 e1000_read_nvm(&adapter->hw, 956 NVM_INIT_3GIO_3, 1, &eeprom_data); 957 if (eeprom_data & NVM_WORD1A_ASPM_MASK) { 958 max_frame_size = ETHER_MAX_LEN; 959 break; 960 } 961 /* FALL THROUGH */ 962 963 /* Limit Jumbo Frame size */ 964 case e1000_82571: 965 case e1000_82572: 966 case e1000_ich9lan: 967 case e1000_ich10lan: 968 case e1000_82574: 969 case e1000_80003es2lan: 970 max_frame_size = 9234; 971 break; 972 973 /* Adapters that do not support jumbo frames */ 974 case e1000_82542: 975 case e1000_ich8lan: 976 max_frame_size = ETHER_MAX_LEN; 977 break; 978 979 default: 980 max_frame_size = MAX_JUMBO_FRAME_SIZE; 981 break; 982 } 983 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN - 984 ETHER_CRC_LEN) { 985 error = EINVAL; 986 break; 987 } 988 989 ifp->if_mtu = ifr->ifr_mtu; 990 adapter->max_frame_size = 991 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 992 993 if (ifp->if_flags & IFF_RUNNING) 994 em_init(adapter); 995 break; 996 997 case SIOCSIFFLAGS: 998 if (ifp->if_flags & IFF_UP) { 999 if ((ifp->if_flags & IFF_RUNNING)) { 1000 if ((ifp->if_flags ^ adapter->if_flags) & 1001 (IFF_PROMISC | IFF_ALLMULTI)) { 1002 em_disable_promisc(adapter); 1003 em_set_promisc(adapter); 1004 } 1005 } else { 1006 em_init(adapter); 1007 } 1008 } else if (ifp->if_flags & IFF_RUNNING) { 1009 em_stop(adapter); 1010 } 1011 adapter->if_flags = ifp->if_flags; 1012 break; 1013 1014 case SIOCADDMULTI: 1015 case SIOCDELMULTI: 1016 if (ifp->if_flags & IFF_RUNNING) { 1017 em_disable_intr(adapter); 1018 em_set_multi(adapter); 1019 if (adapter->hw.mac.type == e1000_82542 && 1020 adapter->hw.revision_id == E1000_REVISION_2) 1021 em_init_rx_unit(adapter); 1022 #ifdef DEVICE_POLLING 1023 if (!(ifp->if_flags & IFF_POLLING)) 1024 #endif 1025 em_enable_intr(adapter); 1026 } 1027 break; 1028 1029 case SIOCSIFMEDIA: 1030 /* Check SOL/IDER usage */ 1031 if (e1000_check_reset_block(&adapter->hw)) { 1032 device_printf(adapter->dev, "Media change is" 1033 " blocked due to SOL/IDER session.\n"); 1034 break; 1035 } 1036 /* FALL THROUGH */ 1037 1038 case SIOCGIFMEDIA: 1039 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command); 1040 break; 1041 1042 case SIOCSIFCAP: 1043 reinit = 0; 1044 mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1045 if (mask & IFCAP_HWCSUM) { 1046 ifp->if_capenable ^= (mask & IFCAP_HWCSUM); 1047 reinit = 1; 1048 } 1049 if (mask & IFCAP_VLAN_HWTAGGING) { 1050 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 1051 reinit = 1; 1052 } 1053 if (reinit && (ifp->if_flags & IFF_RUNNING)) 1054 em_init(adapter); 1055 break; 1056 1057 default: 1058 error = ether_ioctl(ifp, command, data); 1059 break; 1060 } 1061 return (error); 1062 } 1063 1064 static void 1065 em_watchdog(struct ifnet *ifp) 1066 { 1067 struct adapter *adapter = ifp->if_softc; 1068 1069 ASSERT_SERIALIZED(ifp->if_serializer); 1070 1071 /* 1072 * The timer is set to 5 every time start queues a packet. 1073 * Then txeof keeps resetting it as long as it cleans at 1074 * least one descriptor. 1075 * Finally, anytime all descriptors are clean the timer is 1076 * set to 0. 1077 */ 1078 1079 if (E1000_READ_REG(&adapter->hw, E1000_TDT(0)) == 1080 E1000_READ_REG(&adapter->hw, E1000_TDH(0))) { 1081 /* 1082 * If we reach here, all TX jobs are completed and 1083 * the TX engine should have been idled for some time. 1084 * We don't need to call if_devstart() here. 1085 */ 1086 ifp->if_flags &= ~IFF_OACTIVE; 1087 ifp->if_timer = 0; 1088 return; 1089 } 1090 1091 /* 1092 * If we are in this routine because of pause frames, then 1093 * don't reset the hardware. 1094 */ 1095 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) & 1096 E1000_STATUS_TXOFF) { 1097 ifp->if_timer = EM_TX_TIMEOUT; 1098 return; 1099 } 1100 1101 if (e1000_check_for_link(&adapter->hw) == 0) 1102 if_printf(ifp, "watchdog timeout -- resetting\n"); 1103 1104 ifp->if_oerrors++; 1105 adapter->watchdog_events++; 1106 1107 em_init(adapter); 1108 1109 if (!ifq_is_empty(&ifp->if_snd)) 1110 if_devstart(ifp); 1111 } 1112 1113 static void 1114 em_init(void *xsc) 1115 { 1116 struct adapter *adapter = xsc; 1117 struct ifnet *ifp = &adapter->arpcom.ac_if; 1118 device_t dev = adapter->dev; 1119 uint32_t pba; 1120 1121 ASSERT_SERIALIZED(ifp->if_serializer); 1122 1123 em_stop(adapter); 1124 1125 /* 1126 * Packet Buffer Allocation (PBA) 1127 * Writing PBA sets the receive portion of the buffer 1128 * the remainder is used for the transmit buffer. 1129 * 1130 * Devices before the 82547 had a Packet Buffer of 64K. 1131 * Default allocation: PBA=48K for Rx, leaving 16K for Tx. 1132 * After the 82547 the buffer was reduced to 40K. 1133 * Default allocation: PBA=30K for Rx, leaving 10K for Tx. 1134 * Note: default does not leave enough room for Jumbo Frame >10k. 1135 */ 1136 switch (adapter->hw.mac.type) { 1137 case e1000_82547: 1138 case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */ 1139 if (adapter->max_frame_size > 8192) 1140 pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */ 1141 else 1142 pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */ 1143 adapter->tx_fifo_head = 0; 1144 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT; 1145 adapter->tx_fifo_size = 1146 (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT; 1147 break; 1148 1149 /* Total Packet Buffer on these is 48K */ 1150 case e1000_82571: 1151 case e1000_82572: 1152 case e1000_80003es2lan: 1153 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */ 1154 break; 1155 1156 case e1000_82573: /* 82573: Total Packet Buffer is 32K */ 1157 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */ 1158 break; 1159 1160 case e1000_82574: 1161 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */ 1162 break; 1163 1164 case e1000_ich9lan: 1165 case e1000_ich10lan: 1166 #define E1000_PBA_10K 0x000A 1167 pba = E1000_PBA_10K; 1168 break; 1169 1170 case e1000_ich8lan: 1171 pba = E1000_PBA_8K; 1172 break; 1173 1174 default: 1175 /* Devices before 82547 had a Packet Buffer of 64K. */ 1176 if (adapter->max_frame_size > 8192) 1177 pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */ 1178 else 1179 pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */ 1180 } 1181 E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba); 1182 1183 /* Get the latest mac address, User can use a LAA */ 1184 bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN); 1185 1186 /* Put the address into the Receive Address Array */ 1187 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0); 1188 1189 /* 1190 * With the 82571 adapter, RAR[0] may be overwritten 1191 * when the other port is reset, we make a duplicate 1192 * in RAR[14] for that eventuality, this assures 1193 * the interface continues to function. 1194 */ 1195 if (adapter->hw.mac.type == e1000_82571) { 1196 e1000_set_laa_state_82571(&adapter->hw, TRUE); 1197 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 1198 E1000_RAR_ENTRIES - 1); 1199 } 1200 1201 /* Initialize the hardware */ 1202 if (em_hw_init(adapter)) { 1203 device_printf(dev, "Unable to initialize the hardware\n"); 1204 /* XXX em_stop()? */ 1205 return; 1206 } 1207 em_update_link_status(adapter); 1208 1209 /* Setup VLAN support, basic and offload if available */ 1210 E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN); 1211 1212 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) { 1213 uint32_t ctrl; 1214 1215 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL); 1216 ctrl |= E1000_CTRL_VME; 1217 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl); 1218 } 1219 1220 /* Set hardware offload abilities */ 1221 if (ifp->if_capenable & IFCAP_TXCSUM) 1222 ifp->if_hwassist = EM_CSUM_FEATURES; 1223 else 1224 ifp->if_hwassist = 0; 1225 1226 /* Configure for OS presence */ 1227 em_get_mgmt(adapter); 1228 1229 /* Prepare transmit descriptors and buffers */ 1230 em_init_tx_ring(adapter); 1231 em_init_tx_unit(adapter); 1232 1233 /* Setup Multicast table */ 1234 em_set_multi(adapter); 1235 1236 /* Prepare receive descriptors and buffers */ 1237 if (em_init_rx_ring(adapter)) { 1238 device_printf(dev, "Could not setup receive structures\n"); 1239 em_stop(adapter); 1240 return; 1241 } 1242 em_init_rx_unit(adapter); 1243 1244 /* Don't lose promiscuous settings */ 1245 em_set_promisc(adapter); 1246 1247 ifp->if_flags |= IFF_RUNNING; 1248 ifp->if_flags &= ~IFF_OACTIVE; 1249 1250 callout_reset(&adapter->timer, hz, em_timer, adapter); 1251 e1000_clear_hw_cntrs_base_generic(&adapter->hw); 1252 1253 /* MSI/X configuration for 82574 */ 1254 if (adapter->hw.mac.type == e1000_82574) { 1255 int tmp; 1256 1257 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT); 1258 tmp |= E1000_CTRL_EXT_PBA_CLR; 1259 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp); 1260 /* 1261 * Set the IVAR - interrupt vector routing. 1262 * Each nibble represents a vector, high bit 1263 * is enable, other 3 bits are the MSIX table 1264 * entry, we map RXQ0 to 0, TXQ0 to 1, and 1265 * Link (other) to 2, hence the magic number. 1266 */ 1267 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908); 1268 } 1269 1270 #ifdef DEVICE_POLLING 1271 /* 1272 * Only enable interrupts if we are not polling, make sure 1273 * they are off otherwise. 1274 */ 1275 if (ifp->if_flags & IFF_POLLING) 1276 em_disable_intr(adapter); 1277 else 1278 #endif /* DEVICE_POLLING */ 1279 em_enable_intr(adapter); 1280 1281 /* Don't reset the phy next time init gets called */ 1282 adapter->hw.phy.reset_disable = TRUE; 1283 } 1284 1285 #ifdef DEVICE_POLLING 1286 1287 static void 1288 em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) 1289 { 1290 struct adapter *adapter = ifp->if_softc; 1291 uint32_t reg_icr; 1292 1293 ASSERT_SERIALIZED(ifp->if_serializer); 1294 1295 switch (cmd) { 1296 case POLL_REGISTER: 1297 em_disable_intr(adapter); 1298 break; 1299 1300 case POLL_DEREGISTER: 1301 em_enable_intr(adapter); 1302 break; 1303 1304 case POLL_AND_CHECK_STATUS: 1305 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR); 1306 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { 1307 callout_stop(&adapter->timer); 1308 adapter->hw.mac.get_link_status = 1; 1309 em_update_link_status(adapter); 1310 callout_reset(&adapter->timer, hz, em_timer, adapter); 1311 } 1312 /* FALL THROUGH */ 1313 case POLL_ONLY: 1314 if (ifp->if_flags & IFF_RUNNING) { 1315 em_rxeof(adapter, count); 1316 em_txeof(adapter); 1317 1318 if (!ifq_is_empty(&ifp->if_snd)) 1319 if_devstart(ifp); 1320 } 1321 break; 1322 } 1323 } 1324 1325 #endif /* DEVICE_POLLING */ 1326 1327 static void 1328 em_intr(void *xsc) 1329 { 1330 struct adapter *adapter = xsc; 1331 struct ifnet *ifp = &adapter->arpcom.ac_if; 1332 uint32_t reg_icr; 1333 1334 logif(intr_beg); 1335 ASSERT_SERIALIZED(ifp->if_serializer); 1336 1337 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR); 1338 1339 if ((adapter->hw.mac.type >= e1000_82571 && 1340 (reg_icr & E1000_ICR_INT_ASSERTED) == 0) || 1341 reg_icr == 0) { 1342 logif(intr_end); 1343 return; 1344 } 1345 1346 /* 1347 * XXX: some laptops trigger several spurious interrupts 1348 * on em(4) when in the resume cycle. The ICR register 1349 * reports all-ones value in this case. Processing such 1350 * interrupts would lead to a freeze. I don't know why. 1351 */ 1352 if (reg_icr == 0xffffffff) { 1353 logif(intr_end); 1354 return; 1355 } 1356 1357 if (ifp->if_flags & IFF_RUNNING) { 1358 if (reg_icr & 1359 (E1000_ICR_RXT0 | E1000_ICR_RXDMT0 | E1000_ICR_RXO)) 1360 em_rxeof(adapter, -1); 1361 if (reg_icr & E1000_ICR_TXDW) { 1362 em_txeof(adapter); 1363 if (!ifq_is_empty(&ifp->if_snd)) 1364 if_devstart(ifp); 1365 } 1366 } 1367 1368 /* Link status change */ 1369 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { 1370 callout_stop(&adapter->timer); 1371 adapter->hw.mac.get_link_status = 1; 1372 em_update_link_status(adapter); 1373 1374 /* Deal with TX cruft when link lost */ 1375 em_tx_purge(adapter); 1376 1377 callout_reset(&adapter->timer, hz, em_timer, adapter); 1378 } 1379 1380 if (reg_icr & E1000_ICR_RXO) 1381 adapter->rx_overruns++; 1382 1383 logif(intr_end); 1384 } 1385 1386 static void 1387 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 1388 { 1389 struct adapter *adapter = ifp->if_softc; 1390 u_char fiber_type = IFM_1000_SX; 1391 1392 ASSERT_SERIALIZED(ifp->if_serializer); 1393 1394 em_update_link_status(adapter); 1395 1396 ifmr->ifm_status = IFM_AVALID; 1397 ifmr->ifm_active = IFM_ETHER; 1398 1399 if (!adapter->link_active) 1400 return; 1401 1402 ifmr->ifm_status |= IFM_ACTIVE; 1403 1404 if (adapter->hw.phy.media_type == e1000_media_type_fiber || 1405 adapter->hw.phy.media_type == e1000_media_type_internal_serdes) { 1406 if (adapter->hw.mac.type == e1000_82545) 1407 fiber_type = IFM_1000_LX; 1408 ifmr->ifm_active |= fiber_type | IFM_FDX; 1409 } else { 1410 switch (adapter->link_speed) { 1411 case 10: 1412 ifmr->ifm_active |= IFM_10_T; 1413 break; 1414 case 100: 1415 ifmr->ifm_active |= IFM_100_TX; 1416 break; 1417 1418 case 1000: 1419 ifmr->ifm_active |= IFM_1000_T; 1420 break; 1421 } 1422 if (adapter->link_duplex == FULL_DUPLEX) 1423 ifmr->ifm_active |= IFM_FDX; 1424 else 1425 ifmr->ifm_active |= IFM_HDX; 1426 } 1427 } 1428 1429 static int 1430 em_media_change(struct ifnet *ifp) 1431 { 1432 struct adapter *adapter = ifp->if_softc; 1433 struct ifmedia *ifm = &adapter->media; 1434 1435 ASSERT_SERIALIZED(ifp->if_serializer); 1436 1437 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1438 return (EINVAL); 1439 1440 switch (IFM_SUBTYPE(ifm->ifm_media)) { 1441 case IFM_AUTO: 1442 adapter->hw.mac.autoneg = DO_AUTO_NEG; 1443 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT; 1444 break; 1445 1446 case IFM_1000_LX: 1447 case IFM_1000_SX: 1448 case IFM_1000_T: 1449 adapter->hw.mac.autoneg = DO_AUTO_NEG; 1450 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL; 1451 break; 1452 1453 case IFM_100_TX: 1454 adapter->hw.mac.autoneg = FALSE; 1455 adapter->hw.phy.autoneg_advertised = 0; 1456 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1457 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL; 1458 else 1459 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF; 1460 break; 1461 1462 case IFM_10_T: 1463 adapter->hw.mac.autoneg = FALSE; 1464 adapter->hw.phy.autoneg_advertised = 0; 1465 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1466 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL; 1467 else 1468 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF; 1469 break; 1470 1471 default: 1472 if_printf(ifp, "Unsupported media type\n"); 1473 break; 1474 } 1475 1476 /* 1477 * As the speed/duplex settings my have changed we need to 1478 * reset the PHY. 1479 */ 1480 adapter->hw.phy.reset_disable = FALSE; 1481 1482 em_init(adapter); 1483 1484 return (0); 1485 } 1486 1487 static int 1488 em_encap(struct adapter *adapter, struct mbuf **m_headp) 1489 { 1490 bus_dma_segment_t segs[EM_MAX_SCATTER]; 1491 bus_dmamap_t map; 1492 struct em_buffer *tx_buffer, *tx_buffer_mapped; 1493 struct e1000_tx_desc *ctxd = NULL; 1494 struct mbuf *m_head = *m_headp; 1495 uint32_t txd_upper, txd_lower, txd_used, cmd = 0; 1496 int maxsegs, nsegs, i, j, first, last = 0, error; 1497 1498 if (m_head->m_len < EM_TXCSUM_MINHL && 1499 (m_head->m_flags & EM_CSUM_FEATURES)) { 1500 /* 1501 * Make sure that ethernet header and ip.ip_hl are in 1502 * contiguous memory, since if TXCSUM is enabled, later 1503 * TX context descriptor's setup need to access ip.ip_hl. 1504 */ 1505 error = em_txcsum_pullup(adapter, m_headp); 1506 if (error) { 1507 KKASSERT(*m_headp == NULL); 1508 return error; 1509 } 1510 m_head = *m_headp; 1511 } 1512 1513 txd_upper = txd_lower = 0; 1514 txd_used = 0; 1515 1516 /* 1517 * Capture the first descriptor index, this descriptor 1518 * will have the index of the EOP which is the only one 1519 * that now gets a DONE bit writeback. 1520 */ 1521 first = adapter->next_avail_tx_desc; 1522 tx_buffer = &adapter->tx_buffer_area[first]; 1523 tx_buffer_mapped = tx_buffer; 1524 map = tx_buffer->map; 1525 1526 maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED; 1527 KASSERT(maxsegs >= adapter->spare_tx_desc, 1528 ("not enough spare TX desc\n")); 1529 if (adapter->pcix_82544) { 1530 /* Half it; see the comment in em_attach() */ 1531 maxsegs >>= 1; 1532 } 1533 if (maxsegs > EM_MAX_SCATTER) 1534 maxsegs = EM_MAX_SCATTER; 1535 1536 error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp, 1537 segs, maxsegs, &nsegs, BUS_DMA_NOWAIT); 1538 if (error) { 1539 if (error == ENOBUFS) 1540 adapter->mbuf_alloc_failed++; 1541 else 1542 adapter->no_tx_dma_setup++; 1543 1544 m_freem(*m_headp); 1545 *m_headp = NULL; 1546 return error; 1547 } 1548 bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE); 1549 1550 m_head = *m_headp; 1551 adapter->tx_nsegs += nsegs; 1552 1553 if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) { 1554 /* TX csum offloading will consume one TX desc */ 1555 adapter->tx_nsegs += em_txcsum(adapter, m_head, 1556 &txd_upper, &txd_lower); 1557 } 1558 i = adapter->next_avail_tx_desc; 1559 1560 /* Set up our transmit descriptors */ 1561 for (j = 0; j < nsegs; j++) { 1562 /* If adapter is 82544 and on PCIX bus */ 1563 if(adapter->pcix_82544) { 1564 DESC_ARRAY desc_array; 1565 uint32_t array_elements, counter; 1566 1567 /* 1568 * Check the Address and Length combination and 1569 * split the data accordingly 1570 */ 1571 array_elements = em_82544_fill_desc(segs[j].ds_addr, 1572 segs[j].ds_len, &desc_array); 1573 for (counter = 0; counter < array_elements; counter++) { 1574 KKASSERT(txd_used < adapter->num_tx_desc_avail); 1575 1576 tx_buffer = &adapter->tx_buffer_area[i]; 1577 ctxd = &adapter->tx_desc_base[i]; 1578 1579 ctxd->buffer_addr = htole64( 1580 desc_array.descriptor[counter].address); 1581 ctxd->lower.data = htole32( 1582 E1000_TXD_CMD_IFCS | txd_lower | 1583 desc_array.descriptor[counter].length); 1584 ctxd->upper.data = htole32(txd_upper); 1585 1586 last = i; 1587 if (++i == adapter->num_tx_desc) 1588 i = 0; 1589 1590 txd_used++; 1591 } 1592 } else { 1593 tx_buffer = &adapter->tx_buffer_area[i]; 1594 ctxd = &adapter->tx_desc_base[i]; 1595 1596 ctxd->buffer_addr = htole64(segs[j].ds_addr); 1597 ctxd->lower.data = htole32(E1000_TXD_CMD_IFCS | 1598 txd_lower | segs[j].ds_len); 1599 ctxd->upper.data = htole32(txd_upper); 1600 1601 last = i; 1602 if (++i == adapter->num_tx_desc) 1603 i = 0; 1604 } 1605 } 1606 1607 adapter->next_avail_tx_desc = i; 1608 if (adapter->pcix_82544) { 1609 KKASSERT(adapter->num_tx_desc_avail > txd_used); 1610 adapter->num_tx_desc_avail -= txd_used; 1611 } else { 1612 KKASSERT(adapter->num_tx_desc_avail > nsegs); 1613 adapter->num_tx_desc_avail -= nsegs; 1614 } 1615 1616 /* Handle VLAN tag */ 1617 if (m_head->m_flags & M_VLANTAG) { 1618 /* Set the vlan id. */ 1619 ctxd->upper.fields.special = 1620 htole16(m_head->m_pkthdr.ether_vlantag); 1621 1622 /* Tell hardware to add tag */ 1623 ctxd->lower.data |= htole32(E1000_TXD_CMD_VLE); 1624 } 1625 1626 tx_buffer->m_head = m_head; 1627 tx_buffer_mapped->map = tx_buffer->map; 1628 tx_buffer->map = map; 1629 1630 if (adapter->tx_nsegs >= adapter->tx_int_nsegs) { 1631 adapter->tx_nsegs = 0; 1632 1633 /* 1634 * Report Status (RS) is turned on 1635 * every tx_int_nsegs descriptors. 1636 */ 1637 cmd = E1000_TXD_CMD_RS; 1638 1639 /* 1640 * Keep track of the descriptor, which will 1641 * be written back by hardware. 1642 */ 1643 adapter->tx_dd[adapter->tx_dd_tail] = last; 1644 EM_INC_TXDD_IDX(adapter->tx_dd_tail); 1645 KKASSERT(adapter->tx_dd_tail != adapter->tx_dd_head); 1646 } 1647 1648 /* 1649 * Last Descriptor of Packet needs End Of Packet (EOP) 1650 */ 1651 ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | cmd); 1652 1653 /* 1654 * Advance the Transmit Descriptor Tail (TDT), this tells the E1000 1655 * that this frame is available to transmit. 1656 */ 1657 if (adapter->hw.mac.type == e1000_82547 && 1658 adapter->link_duplex == HALF_DUPLEX) { 1659 em_82547_move_tail_serialized(adapter); 1660 } else { 1661 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i); 1662 if (adapter->hw.mac.type == e1000_82547) { 1663 em_82547_update_fifo_head(adapter, 1664 m_head->m_pkthdr.len); 1665 } 1666 } 1667 return (0); 1668 } 1669 1670 /* 1671 * 82547 workaround to avoid controller hang in half-duplex environment. 1672 * The workaround is to avoid queuing a large packet that would span 1673 * the internal Tx FIFO ring boundary. We need to reset the FIFO pointers 1674 * in this case. We do that only when FIFO is quiescent. 1675 */ 1676 static void 1677 em_82547_move_tail_serialized(struct adapter *adapter) 1678 { 1679 struct e1000_tx_desc *tx_desc; 1680 uint16_t hw_tdt, sw_tdt, length = 0; 1681 bool eop = 0; 1682 1683 ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer); 1684 1685 hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0)); 1686 sw_tdt = adapter->next_avail_tx_desc; 1687 1688 while (hw_tdt != sw_tdt) { 1689 tx_desc = &adapter->tx_desc_base[hw_tdt]; 1690 length += tx_desc->lower.flags.length; 1691 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP; 1692 if (++hw_tdt == adapter->num_tx_desc) 1693 hw_tdt = 0; 1694 1695 if (eop) { 1696 if (em_82547_fifo_workaround(adapter, length)) { 1697 adapter->tx_fifo_wrk_cnt++; 1698 callout_reset(&adapter->tx_fifo_timer, 1, 1699 em_82547_move_tail, adapter); 1700 break; 1701 } 1702 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt); 1703 em_82547_update_fifo_head(adapter, length); 1704 length = 0; 1705 } 1706 } 1707 } 1708 1709 static void 1710 em_82547_move_tail(void *xsc) 1711 { 1712 struct adapter *adapter = xsc; 1713 struct ifnet *ifp = &adapter->arpcom.ac_if; 1714 1715 lwkt_serialize_enter(ifp->if_serializer); 1716 em_82547_move_tail_serialized(adapter); 1717 lwkt_serialize_exit(ifp->if_serializer); 1718 } 1719 1720 static int 1721 em_82547_fifo_workaround(struct adapter *adapter, int len) 1722 { 1723 int fifo_space, fifo_pkt_len; 1724 1725 fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR); 1726 1727 if (adapter->link_duplex == HALF_DUPLEX) { 1728 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; 1729 1730 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) { 1731 if (em_82547_tx_fifo_reset(adapter)) 1732 return (0); 1733 else 1734 return (1); 1735 } 1736 } 1737 return (0); 1738 } 1739 1740 static void 1741 em_82547_update_fifo_head(struct adapter *adapter, int len) 1742 { 1743 int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR); 1744 1745 /* tx_fifo_head is always 16 byte aligned */ 1746 adapter->tx_fifo_head += fifo_pkt_len; 1747 if (adapter->tx_fifo_head >= adapter->tx_fifo_size) 1748 adapter->tx_fifo_head -= adapter->tx_fifo_size; 1749 } 1750 1751 static int 1752 em_82547_tx_fifo_reset(struct adapter *adapter) 1753 { 1754 uint32_t tctl; 1755 1756 if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) == 1757 E1000_READ_REG(&adapter->hw, E1000_TDH(0))) && 1758 (E1000_READ_REG(&adapter->hw, E1000_TDFT) == 1759 E1000_READ_REG(&adapter->hw, E1000_TDFH)) && 1760 (E1000_READ_REG(&adapter->hw, E1000_TDFTS) == 1761 E1000_READ_REG(&adapter->hw, E1000_TDFHS)) && 1762 (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) { 1763 /* Disable TX unit */ 1764 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL); 1765 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, 1766 tctl & ~E1000_TCTL_EN); 1767 1768 /* Reset FIFO pointers */ 1769 E1000_WRITE_REG(&adapter->hw, E1000_TDFT, 1770 adapter->tx_head_addr); 1771 E1000_WRITE_REG(&adapter->hw, E1000_TDFH, 1772 adapter->tx_head_addr); 1773 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS, 1774 adapter->tx_head_addr); 1775 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS, 1776 adapter->tx_head_addr); 1777 1778 /* Re-enable TX unit */ 1779 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl); 1780 E1000_WRITE_FLUSH(&adapter->hw); 1781 1782 adapter->tx_fifo_head = 0; 1783 adapter->tx_fifo_reset_cnt++; 1784 1785 return (TRUE); 1786 } else { 1787 return (FALSE); 1788 } 1789 } 1790 1791 static void 1792 em_set_promisc(struct adapter *adapter) 1793 { 1794 struct ifnet *ifp = &adapter->arpcom.ac_if; 1795 uint32_t reg_rctl; 1796 1797 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 1798 1799 if (ifp->if_flags & IFF_PROMISC) { 1800 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 1801 /* Turn this on if you want to see bad packets */ 1802 if (em_debug_sbp) 1803 reg_rctl |= E1000_RCTL_SBP; 1804 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 1805 } else if (ifp->if_flags & IFF_ALLMULTI) { 1806 reg_rctl |= E1000_RCTL_MPE; 1807 reg_rctl &= ~E1000_RCTL_UPE; 1808 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 1809 } 1810 } 1811 1812 static void 1813 em_disable_promisc(struct adapter *adapter) 1814 { 1815 uint32_t reg_rctl; 1816 1817 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 1818 1819 reg_rctl &= ~E1000_RCTL_UPE; 1820 reg_rctl &= ~E1000_RCTL_MPE; 1821 reg_rctl &= ~E1000_RCTL_SBP; 1822 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 1823 } 1824 1825 static void 1826 em_set_multi(struct adapter *adapter) 1827 { 1828 struct ifnet *ifp = &adapter->arpcom.ac_if; 1829 struct ifmultiaddr *ifma; 1830 uint32_t reg_rctl = 0; 1831 uint8_t mta[512]; /* Largest MTS is 4096 bits */ 1832 int mcnt = 0; 1833 1834 if (adapter->hw.mac.type == e1000_82542 && 1835 adapter->hw.revision_id == E1000_REVISION_2) { 1836 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 1837 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) 1838 e1000_pci_clear_mwi(&adapter->hw); 1839 reg_rctl |= E1000_RCTL_RST; 1840 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 1841 msec_delay(5); 1842 } 1843 1844 LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1845 if (ifma->ifma_addr->sa_family != AF_LINK) 1846 continue; 1847 1848 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES) 1849 break; 1850 1851 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 1852 &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN); 1853 mcnt++; 1854 } 1855 1856 if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) { 1857 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 1858 reg_rctl |= E1000_RCTL_MPE; 1859 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 1860 } else { 1861 e1000_update_mc_addr_list(&adapter->hw, mta, 1862 mcnt, 1, adapter->hw.mac.rar_entry_count); 1863 } 1864 1865 if (adapter->hw.mac.type == e1000_82542 && 1866 adapter->hw.revision_id == E1000_REVISION_2) { 1867 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 1868 reg_rctl &= ~E1000_RCTL_RST; 1869 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 1870 msec_delay(5); 1871 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) 1872 e1000_pci_set_mwi(&adapter->hw); 1873 } 1874 } 1875 1876 /* 1877 * This routine checks for link status and updates statistics. 1878 */ 1879 static void 1880 em_timer(void *xsc) 1881 { 1882 struct adapter *adapter = xsc; 1883 struct ifnet *ifp = &adapter->arpcom.ac_if; 1884 1885 lwkt_serialize_enter(ifp->if_serializer); 1886 1887 em_update_link_status(adapter); 1888 em_update_stats(adapter); 1889 1890 /* Reset LAA into RAR[0] on 82571 */ 1891 if (e1000_get_laa_state_82571(&adapter->hw) == TRUE) 1892 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0); 1893 1894 if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING)) 1895 em_print_hw_stats(adapter); 1896 1897 em_smartspeed(adapter); 1898 1899 callout_reset(&adapter->timer, hz, em_timer, adapter); 1900 1901 lwkt_serialize_exit(ifp->if_serializer); 1902 } 1903 1904 static void 1905 em_update_link_status(struct adapter *adapter) 1906 { 1907 struct e1000_hw *hw = &adapter->hw; 1908 struct ifnet *ifp = &adapter->arpcom.ac_if; 1909 device_t dev = adapter->dev; 1910 uint32_t link_check = 0; 1911 1912 /* Get the cached link value or read phy for real */ 1913 switch (hw->phy.media_type) { 1914 case e1000_media_type_copper: 1915 if (hw->mac.get_link_status) { 1916 /* Do the work to read phy */ 1917 e1000_check_for_link(hw); 1918 link_check = !hw->mac.get_link_status; 1919 if (link_check) /* ESB2 fix */ 1920 e1000_cfg_on_link_up(hw); 1921 } else { 1922 link_check = TRUE; 1923 } 1924 break; 1925 1926 case e1000_media_type_fiber: 1927 e1000_check_for_link(hw); 1928 link_check = 1929 E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU; 1930 break; 1931 1932 case e1000_media_type_internal_serdes: 1933 e1000_check_for_link(hw); 1934 link_check = adapter->hw.mac.serdes_has_link; 1935 break; 1936 1937 case e1000_media_type_unknown: 1938 default: 1939 break; 1940 } 1941 1942 /* Now check for a transition */ 1943 if (link_check && adapter->link_active == 0) { 1944 e1000_get_speed_and_duplex(hw, &adapter->link_speed, 1945 &adapter->link_duplex); 1946 1947 /* 1948 * Check if we should enable/disable SPEED_MODE bit on 1949 * 82571/82572 1950 */ 1951 if (hw->mac.type == e1000_82571 || 1952 hw->mac.type == e1000_82572) { 1953 int tarc0; 1954 1955 tarc0 = E1000_READ_REG(hw, E1000_TARC(0)); 1956 if (adapter->link_speed != SPEED_1000) 1957 tarc0 &= ~SPEED_MODE_BIT; 1958 else 1959 tarc0 |= SPEED_MODE_BIT; 1960 E1000_WRITE_REG(hw, E1000_TARC(0), tarc0); 1961 } 1962 if (bootverbose) { 1963 device_printf(dev, "Link is up %d Mbps %s\n", 1964 adapter->link_speed, 1965 ((adapter->link_duplex == FULL_DUPLEX) ? 1966 "Full Duplex" : "Half Duplex")); 1967 } 1968 adapter->link_active = 1; 1969 adapter->smartspeed = 0; 1970 ifp->if_baudrate = adapter->link_speed * 1000000; 1971 ifp->if_link_state = LINK_STATE_UP; 1972 if_link_state_change(ifp); 1973 } else if (!link_check && adapter->link_active == 1) { 1974 ifp->if_baudrate = adapter->link_speed = 0; 1975 adapter->link_duplex = 0; 1976 if (bootverbose) 1977 device_printf(dev, "Link is Down\n"); 1978 adapter->link_active = 0; 1979 #if 0 1980 /* Link down, disable watchdog */ 1981 if->if_timer = 0; 1982 #endif 1983 ifp->if_link_state = LINK_STATE_DOWN; 1984 if_link_state_change(ifp); 1985 } 1986 } 1987 1988 static void 1989 em_stop(struct adapter *adapter) 1990 { 1991 struct ifnet *ifp = &adapter->arpcom.ac_if; 1992 int i; 1993 1994 ASSERT_SERIALIZED(ifp->if_serializer); 1995 1996 em_disable_intr(adapter); 1997 1998 callout_stop(&adapter->timer); 1999 callout_stop(&adapter->tx_fifo_timer); 2000 2001 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2002 ifp->if_timer = 0; 2003 2004 e1000_reset_hw(&adapter->hw); 2005 if (adapter->hw.mac.type >= e1000_82544) 2006 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0); 2007 2008 for (i = 0; i < adapter->num_tx_desc; i++) { 2009 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i]; 2010 2011 if (tx_buffer->m_head != NULL) { 2012 bus_dmamap_unload(adapter->txtag, tx_buffer->map); 2013 m_freem(tx_buffer->m_head); 2014 tx_buffer->m_head = NULL; 2015 } 2016 } 2017 2018 for (i = 0; i < adapter->num_rx_desc; i++) { 2019 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i]; 2020 2021 if (rx_buffer->m_head != NULL) { 2022 bus_dmamap_unload(adapter->rxtag, rx_buffer->map); 2023 m_freem(rx_buffer->m_head); 2024 rx_buffer->m_head = NULL; 2025 } 2026 } 2027 2028 if (adapter->fmp != NULL) 2029 m_freem(adapter->fmp); 2030 adapter->fmp = NULL; 2031 adapter->lmp = NULL; 2032 2033 adapter->csum_flags = 0; 2034 adapter->csum_ehlen = 0; 2035 adapter->csum_iphlen = 0; 2036 2037 adapter->tx_dd_head = 0; 2038 adapter->tx_dd_tail = 0; 2039 adapter->tx_nsegs = 0; 2040 } 2041 2042 static int 2043 em_get_hw_info(struct adapter *adapter) 2044 { 2045 device_t dev = adapter->dev; 2046 2047 /* Save off the information about this board */ 2048 adapter->hw.vendor_id = pci_get_vendor(dev); 2049 adapter->hw.device_id = pci_get_device(dev); 2050 adapter->hw.revision_id = pci_get_revid(dev); 2051 adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev); 2052 adapter->hw.subsystem_device_id = pci_get_subdevice(dev); 2053 2054 /* Do Shared Code Init and Setup */ 2055 if (e1000_set_mac_type(&adapter->hw)) 2056 return ENXIO; 2057 return 0; 2058 } 2059 2060 static int 2061 em_alloc_pci_res(struct adapter *adapter) 2062 { 2063 device_t dev = adapter->dev; 2064 int val, rid; 2065 2066 /* Enable bus mastering */ 2067 pci_enable_busmaster(dev); 2068 2069 adapter->memory_rid = EM_BAR_MEM; 2070 adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 2071 &adapter->memory_rid, RF_ACTIVE); 2072 if (adapter->memory == NULL) { 2073 device_printf(dev, "Unable to allocate bus resource: memory\n"); 2074 return (ENXIO); 2075 } 2076 adapter->osdep.mem_bus_space_tag = 2077 rman_get_bustag(adapter->memory); 2078 adapter->osdep.mem_bus_space_handle = 2079 rman_get_bushandle(adapter->memory); 2080 2081 /* XXX This is quite goofy, it is not actually used */ 2082 adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle; 2083 2084 /* Only older adapters use IO mapping */ 2085 if (adapter->hw.mac.type > e1000_82543 && 2086 adapter->hw.mac.type < e1000_82571) { 2087 /* Figure our where our IO BAR is ? */ 2088 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) { 2089 val = pci_read_config(dev, rid, 4); 2090 if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) { 2091 adapter->io_rid = rid; 2092 break; 2093 } 2094 rid += 4; 2095 /* check for 64bit BAR */ 2096 if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT) 2097 rid += 4; 2098 } 2099 if (rid >= PCIR_CARDBUSCIS) { 2100 device_printf(dev, "Unable to locate IO BAR\n"); 2101 return (ENXIO); 2102 } 2103 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT, 2104 &adapter->io_rid, RF_ACTIVE); 2105 if (adapter->ioport == NULL) { 2106 device_printf(dev, "Unable to allocate bus resource: " 2107 "ioport\n"); 2108 return (ENXIO); 2109 } 2110 adapter->hw.io_base = 0; 2111 adapter->osdep.io_bus_space_tag = 2112 rman_get_bustag(adapter->ioport); 2113 adapter->osdep.io_bus_space_handle = 2114 rman_get_bushandle(adapter->ioport); 2115 } 2116 2117 adapter->intr_rid = 0; 2118 adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 2119 &adapter->intr_rid, 2120 RF_SHAREABLE | RF_ACTIVE); 2121 if (adapter->intr_res == NULL) { 2122 device_printf(dev, "Unable to allocate bus resource: " 2123 "interrupt\n"); 2124 return (ENXIO); 2125 } 2126 2127 adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2); 2128 adapter->hw.back = &adapter->osdep; 2129 return (0); 2130 } 2131 2132 static void 2133 em_free_pci_res(struct adapter *adapter) 2134 { 2135 device_t dev = adapter->dev; 2136 2137 if (adapter->intr_res != NULL) { 2138 bus_release_resource(dev, SYS_RES_IRQ, 2139 adapter->intr_rid, adapter->intr_res); 2140 } 2141 2142 if (adapter->memory != NULL) { 2143 bus_release_resource(dev, SYS_RES_MEMORY, 2144 adapter->memory_rid, adapter->memory); 2145 } 2146 2147 if (adapter->flash != NULL) { 2148 bus_release_resource(dev, SYS_RES_MEMORY, 2149 adapter->flash_rid, adapter->flash); 2150 } 2151 2152 if (adapter->ioport != NULL) { 2153 bus_release_resource(dev, SYS_RES_IOPORT, 2154 adapter->io_rid, adapter->ioport); 2155 } 2156 } 2157 2158 static int 2159 em_hw_init(struct adapter *adapter) 2160 { 2161 device_t dev = adapter->dev; 2162 uint16_t rx_buffer_size; 2163 2164 /* Issue a global reset */ 2165 e1000_reset_hw(&adapter->hw); 2166 2167 /* Get control from any management/hw control */ 2168 if ((adapter->hw.mac.type == e1000_82573 || 2169 adapter->hw.mac.type == e1000_ich8lan || 2170 adapter->hw.mac.type == e1000_ich10lan || 2171 adapter->hw.mac.type == e1000_ich9lan) && 2172 e1000_check_mng_mode(&adapter->hw)) 2173 em_get_hw_control(adapter); 2174 2175 /* When hardware is reset, fifo_head is also reset */ 2176 adapter->tx_fifo_head = 0; 2177 2178 /* Set up smart power down as default off on newer adapters. */ 2179 if (!em_smart_pwr_down && 2180 (adapter->hw.mac.type == e1000_82571 || 2181 adapter->hw.mac.type == e1000_82572)) { 2182 uint16_t phy_tmp = 0; 2183 2184 /* Speed up time to link by disabling smart power down. */ 2185 e1000_read_phy_reg(&adapter->hw, 2186 IGP02E1000_PHY_POWER_MGMT, &phy_tmp); 2187 phy_tmp &= ~IGP02E1000_PM_SPD; 2188 e1000_write_phy_reg(&adapter->hw, 2189 IGP02E1000_PHY_POWER_MGMT, phy_tmp); 2190 } 2191 2192 /* 2193 * These parameters control the automatic generation (Tx) and 2194 * response (Rx) to Ethernet PAUSE frames. 2195 * - High water mark should allow for at least two frames to be 2196 * received after sending an XOFF. 2197 * - Low water mark works best when it is very near the high water mark. 2198 * This allows the receiver to restart by sending XON when it has 2199 * drained a bit. Here we use an arbitary value of 1500 which will 2200 * restart after one full frame is pulled from the buffer. There 2201 * could be several smaller frames in the buffer and if so they will 2202 * not trigger the XON until their total number reduces the buffer 2203 * by 1500. 2204 * - The pause time is fairly large at 1000 x 512ns = 512 usec. 2205 */ 2206 rx_buffer_size = 2207 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10; 2208 2209 adapter->hw.fc.high_water = rx_buffer_size - 2210 roundup2(adapter->max_frame_size, 1024); 2211 adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500; 2212 2213 if (adapter->hw.mac.type == e1000_80003es2lan) 2214 adapter->hw.fc.pause_time = 0xFFFF; 2215 else 2216 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME; 2217 adapter->hw.fc.send_xon = TRUE; 2218 adapter->hw.fc.requested_mode = e1000_fc_full; 2219 2220 if (e1000_init_hw(&adapter->hw) < 0) { 2221 device_printf(dev, "Hardware Initialization Failed\n"); 2222 return (EIO); 2223 } 2224 2225 e1000_check_for_link(&adapter->hw); 2226 2227 return (0); 2228 } 2229 2230 static void 2231 em_setup_ifp(struct adapter *adapter) 2232 { 2233 struct ifnet *ifp = &adapter->arpcom.ac_if; 2234 2235 if_initname(ifp, device_get_name(adapter->dev), 2236 device_get_unit(adapter->dev)); 2237 ifp->if_softc = adapter; 2238 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 2239 ifp->if_init = em_init; 2240 ifp->if_ioctl = em_ioctl; 2241 ifp->if_start = em_start; 2242 #ifdef DEVICE_POLLING 2243 ifp->if_poll = em_poll; 2244 #endif 2245 ifp->if_watchdog = em_watchdog; 2246 ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1); 2247 ifq_set_ready(&ifp->if_snd); 2248 2249 ether_ifattach(ifp, adapter->hw.mac.addr, NULL); 2250 2251 if (adapter->hw.mac.type >= e1000_82543) 2252 ifp->if_capabilities = IFCAP_HWCSUM; 2253 2254 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 2255 ifp->if_capenable = ifp->if_capabilities; 2256 2257 if (ifp->if_capenable & IFCAP_TXCSUM) 2258 ifp->if_hwassist = EM_CSUM_FEATURES; 2259 2260 /* 2261 * Tell the upper layer(s) we support long frames. 2262 */ 2263 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 2264 2265 /* 2266 * Specify the media types supported by this adapter and register 2267 * callbacks to update media and link information 2268 */ 2269 ifmedia_init(&adapter->media, IFM_IMASK, 2270 em_media_change, em_media_status); 2271 if (adapter->hw.phy.media_type == e1000_media_type_fiber || 2272 adapter->hw.phy.media_type == e1000_media_type_internal_serdes) { 2273 u_char fiber_type = IFM_1000_SX; /* default type */ 2274 2275 if (adapter->hw.mac.type == e1000_82545) 2276 fiber_type = IFM_1000_LX; 2277 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX, 2278 0, NULL); 2279 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL); 2280 } else { 2281 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL); 2282 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX, 2283 0, NULL); 2284 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX, 2285 0, NULL); 2286 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX, 2287 0, NULL); 2288 if (adapter->hw.phy.type != e1000_phy_ife) { 2289 ifmedia_add(&adapter->media, 2290 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL); 2291 ifmedia_add(&adapter->media, 2292 IFM_ETHER | IFM_1000_T, 0, NULL); 2293 } 2294 } 2295 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL); 2296 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO); 2297 } 2298 2299 2300 /* 2301 * Workaround for SmartSpeed on 82541 and 82547 controllers 2302 */ 2303 static void 2304 em_smartspeed(struct adapter *adapter) 2305 { 2306 uint16_t phy_tmp; 2307 2308 if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp || 2309 adapter->hw.mac.autoneg == 0 || 2310 (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0) 2311 return; 2312 2313 if (adapter->smartspeed == 0) { 2314 /* 2315 * If Master/Slave config fault is asserted twice, 2316 * we assume back-to-back 2317 */ 2318 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp); 2319 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT)) 2320 return; 2321 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp); 2322 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) { 2323 e1000_read_phy_reg(&adapter->hw, 2324 PHY_1000T_CTRL, &phy_tmp); 2325 if (phy_tmp & CR_1000T_MS_ENABLE) { 2326 phy_tmp &= ~CR_1000T_MS_ENABLE; 2327 e1000_write_phy_reg(&adapter->hw, 2328 PHY_1000T_CTRL, phy_tmp); 2329 adapter->smartspeed++; 2330 if (adapter->hw.mac.autoneg && 2331 !e1000_phy_setup_autoneg(&adapter->hw) && 2332 !e1000_read_phy_reg(&adapter->hw, 2333 PHY_CONTROL, &phy_tmp)) { 2334 phy_tmp |= MII_CR_AUTO_NEG_EN | 2335 MII_CR_RESTART_AUTO_NEG; 2336 e1000_write_phy_reg(&adapter->hw, 2337 PHY_CONTROL, phy_tmp); 2338 } 2339 } 2340 } 2341 return; 2342 } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) { 2343 /* If still no link, perhaps using 2/3 pair cable */ 2344 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp); 2345 phy_tmp |= CR_1000T_MS_ENABLE; 2346 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp); 2347 if (adapter->hw.mac.autoneg && 2348 !e1000_phy_setup_autoneg(&adapter->hw) && 2349 !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) { 2350 phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG; 2351 e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp); 2352 } 2353 } 2354 2355 /* Restart process after EM_SMARTSPEED_MAX iterations */ 2356 if (adapter->smartspeed++ == EM_SMARTSPEED_MAX) 2357 adapter->smartspeed = 0; 2358 } 2359 2360 static int 2361 em_dma_malloc(struct adapter *adapter, bus_size_t size, 2362 struct em_dma_alloc *dma) 2363 { 2364 dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag, 2365 EM_DBA_ALIGN, size, BUS_DMA_WAITOK, 2366 &dma->dma_tag, &dma->dma_map, 2367 &dma->dma_paddr); 2368 if (dma->dma_vaddr == NULL) 2369 return ENOMEM; 2370 else 2371 return 0; 2372 } 2373 2374 static void 2375 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma) 2376 { 2377 if (dma->dma_tag == NULL) 2378 return; 2379 bus_dmamap_unload(dma->dma_tag, dma->dma_map); 2380 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map); 2381 bus_dma_tag_destroy(dma->dma_tag); 2382 } 2383 2384 static int 2385 em_create_tx_ring(struct adapter *adapter) 2386 { 2387 device_t dev = adapter->dev; 2388 struct em_buffer *tx_buffer; 2389 int error, i; 2390 2391 adapter->tx_buffer_area = 2392 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc, 2393 M_DEVBUF, M_WAITOK | M_ZERO); 2394 2395 /* 2396 * Create DMA tags for tx buffers 2397 */ 2398 error = bus_dma_tag_create(adapter->parent_dtag, /* parent */ 2399 1, 0, /* alignment, bounds */ 2400 BUS_SPACE_MAXADDR, /* lowaddr */ 2401 BUS_SPACE_MAXADDR, /* highaddr */ 2402 NULL, NULL, /* filter, filterarg */ 2403 EM_TSO_SIZE, /* maxsize */ 2404 EM_MAX_SCATTER, /* nsegments */ 2405 EM_MAX_SEGSIZE, /* maxsegsize */ 2406 BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW | 2407 BUS_DMA_ONEBPAGE, /* flags */ 2408 &adapter->txtag); 2409 if (error) { 2410 device_printf(dev, "Unable to allocate TX DMA tag\n"); 2411 kfree(adapter->tx_buffer_area, M_DEVBUF); 2412 adapter->tx_buffer_area = NULL; 2413 return error; 2414 } 2415 2416 /* 2417 * Create DMA maps for tx buffers 2418 */ 2419 for (i = 0; i < adapter->num_tx_desc; i++) { 2420 tx_buffer = &adapter->tx_buffer_area[i]; 2421 2422 error = bus_dmamap_create(adapter->txtag, 2423 BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE, 2424 &tx_buffer->map); 2425 if (error) { 2426 device_printf(dev, "Unable to create TX DMA map\n"); 2427 em_destroy_tx_ring(adapter, i); 2428 return error; 2429 } 2430 } 2431 return (0); 2432 } 2433 2434 static void 2435 em_init_tx_ring(struct adapter *adapter) 2436 { 2437 /* Clear the old ring contents */ 2438 bzero(adapter->tx_desc_base, 2439 (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc); 2440 2441 /* Reset state */ 2442 adapter->next_avail_tx_desc = 0; 2443 adapter->next_tx_to_clean = 0; 2444 adapter->num_tx_desc_avail = adapter->num_tx_desc; 2445 } 2446 2447 static void 2448 em_init_tx_unit(struct adapter *adapter) 2449 { 2450 uint32_t tctl, tarc, tipg = 0; 2451 uint64_t bus_addr; 2452 2453 /* Setup the Base and Length of the Tx Descriptor Ring */ 2454 bus_addr = adapter->txdma.dma_paddr; 2455 E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0), 2456 adapter->num_tx_desc * sizeof(struct e1000_tx_desc)); 2457 E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0), 2458 (uint32_t)(bus_addr >> 32)); 2459 E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0), 2460 (uint32_t)bus_addr); 2461 /* Setup the HW Tx Head and Tail descriptor pointers */ 2462 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0); 2463 E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0); 2464 2465 /* Set the default values for the Tx Inter Packet Gap timer */ 2466 switch (adapter->hw.mac.type) { 2467 case e1000_82542: 2468 tipg = DEFAULT_82542_TIPG_IPGT; 2469 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; 2470 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; 2471 break; 2472 2473 case e1000_80003es2lan: 2474 tipg = DEFAULT_82543_TIPG_IPGR1; 2475 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 << 2476 E1000_TIPG_IPGR2_SHIFT; 2477 break; 2478 2479 default: 2480 if (adapter->hw.phy.media_type == e1000_media_type_fiber || 2481 adapter->hw.phy.media_type == 2482 e1000_media_type_internal_serdes) 2483 tipg = DEFAULT_82543_TIPG_IPGT_FIBER; 2484 else 2485 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; 2486 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; 2487 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; 2488 break; 2489 } 2490 2491 E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg); 2492 2493 /* NOTE: 0 is not allowed for TIDV */ 2494 E1000_WRITE_REG(&adapter->hw, E1000_TIDV, 1); 2495 if(adapter->hw.mac.type >= e1000_82540) 2496 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 0); 2497 2498 if (adapter->hw.mac.type == e1000_82571 || 2499 adapter->hw.mac.type == e1000_82572) { 2500 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0)); 2501 tarc |= SPEED_MODE_BIT; 2502 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc); 2503 } else if (adapter->hw.mac.type == e1000_80003es2lan) { 2504 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0)); 2505 tarc |= 1; 2506 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc); 2507 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1)); 2508 tarc |= 1; 2509 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc); 2510 } 2511 2512 /* Program the Transmit Control Register */ 2513 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL); 2514 tctl &= ~E1000_TCTL_CT; 2515 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN | 2516 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); 2517 2518 if (adapter->hw.mac.type >= e1000_82571) 2519 tctl |= E1000_TCTL_MULR; 2520 2521 /* This write will effectively turn on the transmit unit. */ 2522 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl); 2523 } 2524 2525 static void 2526 em_destroy_tx_ring(struct adapter *adapter, int ndesc) 2527 { 2528 struct em_buffer *tx_buffer; 2529 int i; 2530 2531 if (adapter->tx_buffer_area == NULL) 2532 return; 2533 2534 for (i = 0; i < ndesc; i++) { 2535 tx_buffer = &adapter->tx_buffer_area[i]; 2536 2537 KKASSERT(tx_buffer->m_head == NULL); 2538 bus_dmamap_destroy(adapter->txtag, tx_buffer->map); 2539 } 2540 bus_dma_tag_destroy(adapter->txtag); 2541 2542 kfree(adapter->tx_buffer_area, M_DEVBUF); 2543 adapter->tx_buffer_area = NULL; 2544 } 2545 2546 /* 2547 * The offload context needs to be set when we transfer the first 2548 * packet of a particular protocol (TCP/UDP). This routine has been 2549 * enhanced to deal with inserted VLAN headers. 2550 * 2551 * If the new packet's ether header length, ip header length and 2552 * csum offloading type are same as the previous packet, we should 2553 * avoid allocating a new csum context descriptor; mainly to take 2554 * advantage of the pipeline effect of the TX data read request. 2555 * 2556 * This function returns number of TX descrptors allocated for 2557 * csum context. 2558 */ 2559 static int 2560 em_txcsum(struct adapter *adapter, struct mbuf *mp, 2561 uint32_t *txd_upper, uint32_t *txd_lower) 2562 { 2563 struct e1000_context_desc *TXD; 2564 struct em_buffer *tx_buffer; 2565 struct ether_vlan_header *eh; 2566 struct ip *ip; 2567 int curr_txd, ehdrlen, csum_flags; 2568 uint32_t cmd, hdr_len, ip_hlen; 2569 uint16_t etype; 2570 2571 /* 2572 * Determine where frame payload starts. 2573 * Jump over vlan headers if already present, 2574 * helpful for QinQ too. 2575 */ 2576 KASSERT(mp->m_len >= ETHER_HDR_LEN, 2577 ("em_txcsum_pullup is not called (eh)?\n")); 2578 eh = mtod(mp, struct ether_vlan_header *); 2579 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) { 2580 KASSERT(mp->m_len >= ETHER_HDR_LEN + EVL_ENCAPLEN, 2581 ("em_txcsum_pullup is not called (evh)?\n")); 2582 etype = ntohs(eh->evl_proto); 2583 ehdrlen = ETHER_HDR_LEN + EVL_ENCAPLEN; 2584 } else { 2585 etype = ntohs(eh->evl_encap_proto); 2586 ehdrlen = ETHER_HDR_LEN; 2587 } 2588 2589 /* 2590 * We only support TCP/UDP for IPv4 for the moment. 2591 * TODO: Support SCTP too when it hits the tree. 2592 */ 2593 if (etype != ETHERTYPE_IP) 2594 return 0; 2595 2596 KASSERT(mp->m_len >= ehdrlen + EM_IPVHL_SIZE, 2597 ("em_txcsum_pullup is not called (eh+ip_vhl)?\n")); 2598 2599 /* NOTE: We could only safely access ip.ip_vhl part */ 2600 ip = (struct ip *)(mp->m_data + ehdrlen); 2601 ip_hlen = ip->ip_hl << 2; 2602 2603 csum_flags = mp->m_pkthdr.csum_flags & EM_CSUM_FEATURES; 2604 2605 if (adapter->csum_ehlen == ehdrlen && 2606 adapter->csum_iphlen == ip_hlen && 2607 adapter->csum_flags == csum_flags) { 2608 /* 2609 * Same csum offload context as the previous packets; 2610 * just return. 2611 */ 2612 *txd_upper = adapter->csum_txd_upper; 2613 *txd_lower = adapter->csum_txd_lower; 2614 return 0; 2615 } 2616 2617 /* 2618 * Setup a new csum offload context. 2619 */ 2620 2621 curr_txd = adapter->next_avail_tx_desc; 2622 tx_buffer = &adapter->tx_buffer_area[curr_txd]; 2623 TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd]; 2624 2625 cmd = 0; 2626 2627 /* Setup of IP header checksum. */ 2628 if (csum_flags & CSUM_IP) { 2629 /* 2630 * Start offset for header checksum calculation. 2631 * End offset for header checksum calculation. 2632 * Offset of place to put the checksum. 2633 */ 2634 TXD->lower_setup.ip_fields.ipcss = ehdrlen; 2635 TXD->lower_setup.ip_fields.ipcse = 2636 htole16(ehdrlen + ip_hlen - 1); 2637 TXD->lower_setup.ip_fields.ipcso = 2638 ehdrlen + offsetof(struct ip, ip_sum); 2639 cmd |= E1000_TXD_CMD_IP; 2640 *txd_upper |= E1000_TXD_POPTS_IXSM << 8; 2641 } 2642 hdr_len = ehdrlen + ip_hlen; 2643 2644 if (csum_flags & CSUM_TCP) { 2645 /* 2646 * Start offset for payload checksum calculation. 2647 * End offset for payload checksum calculation. 2648 * Offset of place to put the checksum. 2649 */ 2650 TXD->upper_setup.tcp_fields.tucss = hdr_len; 2651 TXD->upper_setup.tcp_fields.tucse = htole16(0); 2652 TXD->upper_setup.tcp_fields.tucso = 2653 hdr_len + offsetof(struct tcphdr, th_sum); 2654 cmd |= E1000_TXD_CMD_TCP; 2655 *txd_upper |= E1000_TXD_POPTS_TXSM << 8; 2656 } else if (csum_flags & CSUM_UDP) { 2657 /* 2658 * Start offset for header checksum calculation. 2659 * End offset for header checksum calculation. 2660 * Offset of place to put the checksum. 2661 */ 2662 TXD->upper_setup.tcp_fields.tucss = hdr_len; 2663 TXD->upper_setup.tcp_fields.tucse = htole16(0); 2664 TXD->upper_setup.tcp_fields.tucso = 2665 hdr_len + offsetof(struct udphdr, uh_sum); 2666 *txd_upper |= E1000_TXD_POPTS_TXSM << 8; 2667 } 2668 2669 *txd_lower = E1000_TXD_CMD_DEXT | /* Extended descr type */ 2670 E1000_TXD_DTYP_D; /* Data descr */ 2671 2672 /* Save the information for this csum offloading context */ 2673 adapter->csum_ehlen = ehdrlen; 2674 adapter->csum_iphlen = ip_hlen; 2675 adapter->csum_flags = csum_flags; 2676 adapter->csum_txd_upper = *txd_upper; 2677 adapter->csum_txd_lower = *txd_lower; 2678 2679 TXD->tcp_seg_setup.data = htole32(0); 2680 TXD->cmd_and_length = 2681 htole32(E1000_TXD_CMD_IFCS | E1000_TXD_CMD_DEXT | cmd); 2682 2683 if (++curr_txd == adapter->num_tx_desc) 2684 curr_txd = 0; 2685 2686 KKASSERT(adapter->num_tx_desc_avail > 0); 2687 adapter->num_tx_desc_avail--; 2688 2689 adapter->next_avail_tx_desc = curr_txd; 2690 return 1; 2691 } 2692 2693 static int 2694 em_txcsum_pullup(struct adapter *adapter, struct mbuf **m0) 2695 { 2696 struct mbuf *m = *m0; 2697 struct ether_header *eh; 2698 int len; 2699 2700 adapter->tx_csum_try_pullup++; 2701 2702 len = ETHER_HDR_LEN + EM_IPVHL_SIZE; 2703 2704 if (__predict_false(!M_WRITABLE(m))) { 2705 if (__predict_false(m->m_len < ETHER_HDR_LEN)) { 2706 adapter->tx_csum_drop1++; 2707 m_freem(m); 2708 *m0 = NULL; 2709 return ENOBUFS; 2710 } 2711 eh = mtod(m, struct ether_header *); 2712 2713 if (eh->ether_type == htons(ETHERTYPE_VLAN)) 2714 len += EVL_ENCAPLEN; 2715 2716 if (m->m_len < len) { 2717 adapter->tx_csum_drop2++; 2718 m_freem(m); 2719 *m0 = NULL; 2720 return ENOBUFS; 2721 } 2722 return 0; 2723 } 2724 2725 if (__predict_false(m->m_len < ETHER_HDR_LEN)) { 2726 adapter->tx_csum_pullup1++; 2727 m = m_pullup(m, ETHER_HDR_LEN); 2728 if (m == NULL) { 2729 adapter->tx_csum_pullup1_failed++; 2730 *m0 = NULL; 2731 return ENOBUFS; 2732 } 2733 *m0 = m; 2734 } 2735 eh = mtod(m, struct ether_header *); 2736 2737 if (eh->ether_type == htons(ETHERTYPE_VLAN)) 2738 len += EVL_ENCAPLEN; 2739 2740 if (m->m_len < len) { 2741 adapter->tx_csum_pullup2++; 2742 m = m_pullup(m, len); 2743 if (m == NULL) { 2744 adapter->tx_csum_pullup2_failed++; 2745 *m0 = NULL; 2746 return ENOBUFS; 2747 } 2748 *m0 = m; 2749 } 2750 return 0; 2751 } 2752 2753 static void 2754 em_txeof(struct adapter *adapter) 2755 { 2756 struct ifnet *ifp = &adapter->arpcom.ac_if; 2757 struct em_buffer *tx_buffer; 2758 int first, num_avail; 2759 2760 if (adapter->tx_dd_head == adapter->tx_dd_tail) 2761 return; 2762 2763 if (adapter->num_tx_desc_avail == adapter->num_tx_desc) 2764 return; 2765 2766 num_avail = adapter->num_tx_desc_avail; 2767 first = adapter->next_tx_to_clean; 2768 2769 while (adapter->tx_dd_head != adapter->tx_dd_tail) { 2770 struct e1000_tx_desc *tx_desc; 2771 int dd_idx = adapter->tx_dd[adapter->tx_dd_head]; 2772 2773 tx_desc = &adapter->tx_desc_base[dd_idx]; 2774 if (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) { 2775 EM_INC_TXDD_IDX(adapter->tx_dd_head); 2776 2777 if (++dd_idx == adapter->num_tx_desc) 2778 dd_idx = 0; 2779 2780 while (first != dd_idx) { 2781 logif(pkt_txclean); 2782 2783 num_avail++; 2784 2785 tx_buffer = &adapter->tx_buffer_area[first]; 2786 if (tx_buffer->m_head) { 2787 ifp->if_opackets++; 2788 bus_dmamap_unload(adapter->txtag, 2789 tx_buffer->map); 2790 m_freem(tx_buffer->m_head); 2791 tx_buffer->m_head = NULL; 2792 } 2793 2794 if (++first == adapter->num_tx_desc) 2795 first = 0; 2796 } 2797 } else { 2798 break; 2799 } 2800 } 2801 adapter->next_tx_to_clean = first; 2802 adapter->num_tx_desc_avail = num_avail; 2803 2804 if (adapter->tx_dd_head == adapter->tx_dd_tail) { 2805 adapter->tx_dd_head = 0; 2806 adapter->tx_dd_tail = 0; 2807 } 2808 2809 if (!EM_IS_OACTIVE(adapter)) { 2810 ifp->if_flags &= ~IFF_OACTIVE; 2811 2812 /* All clean, turn off the timer */ 2813 if (adapter->num_tx_desc_avail == adapter->num_tx_desc) 2814 ifp->if_timer = 0; 2815 } 2816 } 2817 2818 static void 2819 em_tx_collect(struct adapter *adapter) 2820 { 2821 struct ifnet *ifp = &adapter->arpcom.ac_if; 2822 struct em_buffer *tx_buffer; 2823 int tdh, first, num_avail, dd_idx = -1; 2824 2825 if (adapter->num_tx_desc_avail == adapter->num_tx_desc) 2826 return; 2827 2828 tdh = E1000_READ_REG(&adapter->hw, E1000_TDH(0)); 2829 if (tdh == adapter->next_tx_to_clean) 2830 return; 2831 2832 if (adapter->tx_dd_head != adapter->tx_dd_tail) 2833 dd_idx = adapter->tx_dd[adapter->tx_dd_head]; 2834 2835 num_avail = adapter->num_tx_desc_avail; 2836 first = adapter->next_tx_to_clean; 2837 2838 while (first != tdh) { 2839 logif(pkt_txclean); 2840 2841 num_avail++; 2842 2843 tx_buffer = &adapter->tx_buffer_area[first]; 2844 if (tx_buffer->m_head) { 2845 ifp->if_opackets++; 2846 bus_dmamap_unload(adapter->txtag, 2847 tx_buffer->map); 2848 m_freem(tx_buffer->m_head); 2849 tx_buffer->m_head = NULL; 2850 } 2851 2852 if (first == dd_idx) { 2853 EM_INC_TXDD_IDX(adapter->tx_dd_head); 2854 if (adapter->tx_dd_head == adapter->tx_dd_tail) { 2855 adapter->tx_dd_head = 0; 2856 adapter->tx_dd_tail = 0; 2857 dd_idx = -1; 2858 } else { 2859 dd_idx = adapter->tx_dd[adapter->tx_dd_head]; 2860 } 2861 } 2862 2863 if (++first == adapter->num_tx_desc) 2864 first = 0; 2865 } 2866 adapter->next_tx_to_clean = first; 2867 adapter->num_tx_desc_avail = num_avail; 2868 2869 if (!EM_IS_OACTIVE(adapter)) { 2870 ifp->if_flags &= ~IFF_OACTIVE; 2871 2872 /* All clean, turn off the timer */ 2873 if (adapter->num_tx_desc_avail == adapter->num_tx_desc) 2874 ifp->if_timer = 0; 2875 } 2876 } 2877 2878 /* 2879 * When Link is lost sometimes there is work still in the TX ring 2880 * which will result in a watchdog, rather than allow that do an 2881 * attempted cleanup and then reinit here. Note that this has been 2882 * seens mostly with fiber adapters. 2883 */ 2884 static void 2885 em_tx_purge(struct adapter *adapter) 2886 { 2887 struct ifnet *ifp = &adapter->arpcom.ac_if; 2888 2889 if (!adapter->link_active && ifp->if_timer) { 2890 em_tx_collect(adapter); 2891 if (ifp->if_timer) { 2892 if_printf(ifp, "Link lost, TX pending, reinit\n"); 2893 ifp->if_timer = 0; 2894 em_init(adapter); 2895 } 2896 } 2897 } 2898 2899 static int 2900 em_newbuf(struct adapter *adapter, int i, int init) 2901 { 2902 struct mbuf *m; 2903 bus_dma_segment_t seg; 2904 bus_dmamap_t map; 2905 struct em_buffer *rx_buffer; 2906 int error, nseg; 2907 2908 m = m_getcl(init ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR); 2909 if (m == NULL) { 2910 adapter->mbuf_cluster_failed++; 2911 if (init) { 2912 if_printf(&adapter->arpcom.ac_if, 2913 "Unable to allocate RX mbuf\n"); 2914 } 2915 return (ENOBUFS); 2916 } 2917 m->m_len = m->m_pkthdr.len = MCLBYTES; 2918 2919 if (adapter->max_frame_size <= MCLBYTES - ETHER_ALIGN) 2920 m_adj(m, ETHER_ALIGN); 2921 2922 error = bus_dmamap_load_mbuf_segment(adapter->rxtag, 2923 adapter->rx_sparemap, m, 2924 &seg, 1, &nseg, BUS_DMA_NOWAIT); 2925 if (error) { 2926 m_freem(m); 2927 if (init) { 2928 if_printf(&adapter->arpcom.ac_if, 2929 "Unable to load RX mbuf\n"); 2930 } 2931 return (error); 2932 } 2933 2934 rx_buffer = &adapter->rx_buffer_area[i]; 2935 if (rx_buffer->m_head != NULL) 2936 bus_dmamap_unload(adapter->rxtag, rx_buffer->map); 2937 2938 map = rx_buffer->map; 2939 rx_buffer->map = adapter->rx_sparemap; 2940 adapter->rx_sparemap = map; 2941 2942 rx_buffer->m_head = m; 2943 2944 adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr); 2945 return (0); 2946 } 2947 2948 static int 2949 em_create_rx_ring(struct adapter *adapter) 2950 { 2951 device_t dev = adapter->dev; 2952 struct em_buffer *rx_buffer; 2953 int i, error; 2954 2955 adapter->rx_buffer_area = 2956 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc, 2957 M_DEVBUF, M_WAITOK | M_ZERO); 2958 2959 /* 2960 * Create DMA tag for rx buffers 2961 */ 2962 error = bus_dma_tag_create(adapter->parent_dtag, /* parent */ 2963 1, 0, /* alignment, bounds */ 2964 BUS_SPACE_MAXADDR, /* lowaddr */ 2965 BUS_SPACE_MAXADDR, /* highaddr */ 2966 NULL, NULL, /* filter, filterarg */ 2967 MCLBYTES, /* maxsize */ 2968 1, /* nsegments */ 2969 MCLBYTES, /* maxsegsize */ 2970 BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */ 2971 &adapter->rxtag); 2972 if (error) { 2973 device_printf(dev, "Unable to allocate RX DMA tag\n"); 2974 kfree(adapter->rx_buffer_area, M_DEVBUF); 2975 adapter->rx_buffer_area = NULL; 2976 return error; 2977 } 2978 2979 /* 2980 * Create spare DMA map for rx buffers 2981 */ 2982 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK, 2983 &adapter->rx_sparemap); 2984 if (error) { 2985 device_printf(dev, "Unable to create spare RX DMA map\n"); 2986 bus_dma_tag_destroy(adapter->rxtag); 2987 kfree(adapter->rx_buffer_area, M_DEVBUF); 2988 adapter->rx_buffer_area = NULL; 2989 return error; 2990 } 2991 2992 /* 2993 * Create DMA maps for rx buffers 2994 */ 2995 for (i = 0; i < adapter->num_rx_desc; i++) { 2996 rx_buffer = &adapter->rx_buffer_area[i]; 2997 2998 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK, 2999 &rx_buffer->map); 3000 if (error) { 3001 device_printf(dev, "Unable to create RX DMA map\n"); 3002 em_destroy_rx_ring(adapter, i); 3003 return error; 3004 } 3005 } 3006 return (0); 3007 } 3008 3009 static int 3010 em_init_rx_ring(struct adapter *adapter) 3011 { 3012 int i, error; 3013 3014 /* Reset descriptor ring */ 3015 bzero(adapter->rx_desc_base, 3016 (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc); 3017 3018 /* Allocate new ones. */ 3019 for (i = 0; i < adapter->num_rx_desc; i++) { 3020 error = em_newbuf(adapter, i, 1); 3021 if (error) 3022 return (error); 3023 } 3024 3025 /* Setup our descriptor pointers */ 3026 adapter->next_rx_desc_to_check = 0; 3027 3028 return (0); 3029 } 3030 3031 static void 3032 em_init_rx_unit(struct adapter *adapter) 3033 { 3034 struct ifnet *ifp = &adapter->arpcom.ac_if; 3035 uint64_t bus_addr; 3036 uint32_t rctl, rxcsum; 3037 3038 /* 3039 * Make sure receives are disabled while setting 3040 * up the descriptor ring 3041 */ 3042 rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 3043 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN); 3044 3045 if (adapter->hw.mac.type >= e1000_82540) { 3046 /* 3047 * Set the interrupt throttling rate. Value is calculated 3048 * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns) 3049 */ 3050 if (adapter->int_throttle_ceil) { 3051 E1000_WRITE_REG(&adapter->hw, E1000_ITR, 3052 1000000000 / 256 / adapter->int_throttle_ceil); 3053 } else { 3054 E1000_WRITE_REG(&adapter->hw, E1000_ITR, 0); 3055 } 3056 } 3057 3058 /* Disable accelerated ackknowledge */ 3059 if (adapter->hw.mac.type == e1000_82574) { 3060 E1000_WRITE_REG(&adapter->hw, 3061 E1000_RFCTL, E1000_RFCTL_ACK_DIS); 3062 } 3063 3064 /* Setup the Base and Length of the Rx Descriptor Ring */ 3065 bus_addr = adapter->rxdma.dma_paddr; 3066 E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0), 3067 adapter->num_rx_desc * sizeof(struct e1000_rx_desc)); 3068 E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0), 3069 (uint32_t)(bus_addr >> 32)); 3070 E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0), 3071 (uint32_t)bus_addr); 3072 3073 /* Setup the Receive Control Register */ 3074 rctl &= ~(3 << E1000_RCTL_MO_SHIFT); 3075 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO | 3076 E1000_RCTL_RDMTS_HALF | 3077 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); 3078 3079 /* Make sure VLAN Filters are off */ 3080 rctl &= ~E1000_RCTL_VFE; 3081 3082 if (e1000_tbi_sbp_enabled_82543(&adapter->hw)) 3083 rctl |= E1000_RCTL_SBP; 3084 else 3085 rctl &= ~E1000_RCTL_SBP; 3086 3087 switch (adapter->rx_buffer_len) { 3088 default: 3089 case 2048: 3090 rctl |= E1000_RCTL_SZ_2048; 3091 break; 3092 3093 case 4096: 3094 rctl |= E1000_RCTL_SZ_4096 | 3095 E1000_RCTL_BSEX | E1000_RCTL_LPE; 3096 break; 3097 3098 case 8192: 3099 rctl |= E1000_RCTL_SZ_8192 | 3100 E1000_RCTL_BSEX | E1000_RCTL_LPE; 3101 break; 3102 3103 case 16384: 3104 rctl |= E1000_RCTL_SZ_16384 | 3105 E1000_RCTL_BSEX | E1000_RCTL_LPE; 3106 break; 3107 } 3108 3109 if (ifp->if_mtu > ETHERMTU) 3110 rctl |= E1000_RCTL_LPE; 3111 else 3112 rctl &= ~E1000_RCTL_LPE; 3113 3114 /* Receive Checksum Offload for TCP and UDP */ 3115 if (ifp->if_capenable & IFCAP_RXCSUM) { 3116 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM); 3117 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL); 3118 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum); 3119 } 3120 3121 /* 3122 * XXX TEMPORARY WORKAROUND: on some systems with 82573 3123 * long latencies are observed, like Lenovo X60. This 3124 * change eliminates the problem, but since having positive 3125 * values in RDTR is a known source of problems on other 3126 * platforms another solution is being sought. 3127 */ 3128 if (em_82573_workaround && adapter->hw.mac.type == e1000_82573) { 3129 E1000_WRITE_REG(&adapter->hw, E1000_RADV, EM_RADV_82573); 3130 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, EM_RDTR_82573); 3131 } 3132 3133 /* 3134 * Setup the HW Rx Head and Tail Descriptor Pointers 3135 */ 3136 E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0); 3137 E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1); 3138 3139 /* Enable Receives */ 3140 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl); 3141 } 3142 3143 static void 3144 em_destroy_rx_ring(struct adapter *adapter, int ndesc) 3145 { 3146 struct em_buffer *rx_buffer; 3147 int i; 3148 3149 if (adapter->rx_buffer_area == NULL) 3150 return; 3151 3152 for (i = 0; i < ndesc; i++) { 3153 rx_buffer = &adapter->rx_buffer_area[i]; 3154 3155 KKASSERT(rx_buffer->m_head == NULL); 3156 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map); 3157 } 3158 bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap); 3159 bus_dma_tag_destroy(adapter->rxtag); 3160 3161 kfree(adapter->rx_buffer_area, M_DEVBUF); 3162 adapter->rx_buffer_area = NULL; 3163 } 3164 3165 static void 3166 em_rxeof(struct adapter *adapter, int count) 3167 { 3168 struct ifnet *ifp = &adapter->arpcom.ac_if; 3169 uint8_t status, accept_frame = 0, eop = 0; 3170 uint16_t len, desc_len, prev_len_adj; 3171 struct e1000_rx_desc *current_desc; 3172 struct mbuf *mp; 3173 int i; 3174 struct mbuf_chain chain[MAXCPU]; 3175 3176 i = adapter->next_rx_desc_to_check; 3177 current_desc = &adapter->rx_desc_base[i]; 3178 3179 if (!(current_desc->status & E1000_RXD_STAT_DD)) 3180 return; 3181 3182 ether_input_chain_init(chain); 3183 3184 while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) { 3185 struct mbuf *m = NULL; 3186 3187 logif(pkt_receive); 3188 3189 mp = adapter->rx_buffer_area[i].m_head; 3190 3191 /* 3192 * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT 3193 * needs to access the last received byte in the mbuf. 3194 */ 3195 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map, 3196 BUS_DMASYNC_POSTREAD); 3197 3198 accept_frame = 1; 3199 prev_len_adj = 0; 3200 desc_len = le16toh(current_desc->length); 3201 status = current_desc->status; 3202 if (status & E1000_RXD_STAT_EOP) { 3203 count--; 3204 eop = 1; 3205 if (desc_len < ETHER_CRC_LEN) { 3206 len = 0; 3207 prev_len_adj = ETHER_CRC_LEN - desc_len; 3208 } else { 3209 len = desc_len - ETHER_CRC_LEN; 3210 } 3211 } else { 3212 eop = 0; 3213 len = desc_len; 3214 } 3215 3216 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) { 3217 uint8_t last_byte; 3218 uint32_t pkt_len = desc_len; 3219 3220 if (adapter->fmp != NULL) 3221 pkt_len += adapter->fmp->m_pkthdr.len; 3222 3223 last_byte = *(mtod(mp, caddr_t) + desc_len - 1); 3224 if (TBI_ACCEPT(&adapter->hw, status, 3225 current_desc->errors, pkt_len, last_byte, 3226 adapter->min_frame_size, adapter->max_frame_size)) { 3227 e1000_tbi_adjust_stats_82543(&adapter->hw, 3228 &adapter->stats, pkt_len, 3229 adapter->hw.mac.addr, 3230 adapter->max_frame_size); 3231 if (len > 0) 3232 len--; 3233 } else { 3234 accept_frame = 0; 3235 } 3236 } 3237 3238 if (accept_frame) { 3239 if (em_newbuf(adapter, i, 0) != 0) { 3240 ifp->if_iqdrops++; 3241 goto discard; 3242 } 3243 3244 /* Assign correct length to the current fragment */ 3245 mp->m_len = len; 3246 3247 if (adapter->fmp == NULL) { 3248 mp->m_pkthdr.len = len; 3249 adapter->fmp = mp; /* Store the first mbuf */ 3250 adapter->lmp = mp; 3251 } else { 3252 /* 3253 * Chain mbuf's together 3254 */ 3255 3256 /* 3257 * Adjust length of previous mbuf in chain if 3258 * we received less than 4 bytes in the last 3259 * descriptor. 3260 */ 3261 if (prev_len_adj > 0) { 3262 adapter->lmp->m_len -= prev_len_adj; 3263 adapter->fmp->m_pkthdr.len -= 3264 prev_len_adj; 3265 } 3266 adapter->lmp->m_next = mp; 3267 adapter->lmp = adapter->lmp->m_next; 3268 adapter->fmp->m_pkthdr.len += len; 3269 } 3270 3271 if (eop) { 3272 adapter->fmp->m_pkthdr.rcvif = ifp; 3273 ifp->if_ipackets++; 3274 3275 if (ifp->if_capenable & IFCAP_RXCSUM) { 3276 em_rxcsum(adapter, current_desc, 3277 adapter->fmp); 3278 } 3279 3280 if (status & E1000_RXD_STAT_VP) { 3281 adapter->fmp->m_pkthdr.ether_vlantag = 3282 (le16toh(current_desc->special) & 3283 E1000_RXD_SPC_VLAN_MASK); 3284 adapter->fmp->m_flags |= M_VLANTAG; 3285 } 3286 m = adapter->fmp; 3287 adapter->fmp = NULL; 3288 adapter->lmp = NULL; 3289 } 3290 } else { 3291 ifp->if_ierrors++; 3292 discard: 3293 #ifdef foo 3294 /* Reuse loaded DMA map and just update mbuf chain */ 3295 mp = adapter->rx_buffer_area[i].m_head; 3296 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 3297 mp->m_data = mp->m_ext.ext_buf; 3298 mp->m_next = NULL; 3299 if (adapter->max_frame_size <= (MCLBYTES - ETHER_ALIGN)) 3300 m_adj(mp, ETHER_ALIGN); 3301 #endif 3302 if (adapter->fmp != NULL) { 3303 m_freem(adapter->fmp); 3304 adapter->fmp = NULL; 3305 adapter->lmp = NULL; 3306 } 3307 m = NULL; 3308 } 3309 3310 /* Zero out the receive descriptors status. */ 3311 current_desc->status = 0; 3312 3313 if (m != NULL) 3314 ether_input_chain(ifp, m, NULL, chain); 3315 3316 /* Advance our pointers to the next descriptor. */ 3317 if (++i == adapter->num_rx_desc) 3318 i = 0; 3319 current_desc = &adapter->rx_desc_base[i]; 3320 } 3321 adapter->next_rx_desc_to_check = i; 3322 3323 ether_input_dispatch(chain); 3324 3325 /* Advance the E1000's Receive Queue #0 "Tail Pointer". */ 3326 if (--i < 0) 3327 i = adapter->num_rx_desc - 1; 3328 E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i); 3329 } 3330 3331 static void 3332 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc, 3333 struct mbuf *mp) 3334 { 3335 /* 82543 or newer only */ 3336 if (adapter->hw.mac.type < e1000_82543 || 3337 /* Ignore Checksum bit is set */ 3338 (rx_desc->status & E1000_RXD_STAT_IXSM)) 3339 return; 3340 3341 if ((rx_desc->status & E1000_RXD_STAT_IPCS) && 3342 !(rx_desc->errors & E1000_RXD_ERR_IPE)) { 3343 /* IP Checksum Good */ 3344 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID; 3345 } 3346 3347 if ((rx_desc->status & E1000_RXD_STAT_TCPCS) && 3348 !(rx_desc->errors & E1000_RXD_ERR_TCPE)) { 3349 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID | 3350 CSUM_PSEUDO_HDR | 3351 CSUM_FRAG_NOT_CHECKED; 3352 mp->m_pkthdr.csum_data = htons(0xffff); 3353 } 3354 } 3355 3356 static void 3357 em_enable_intr(struct adapter *adapter) 3358 { 3359 lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer); 3360 E1000_WRITE_REG(&adapter->hw, E1000_IMS, IMS_ENABLE_MASK); 3361 } 3362 3363 static void 3364 em_disable_intr(struct adapter *adapter) 3365 { 3366 uint32_t clear = 0xffffffff; 3367 3368 /* 3369 * The first version of 82542 had an errata where when link was forced 3370 * it would stay up even up even if the cable was disconnected. 3371 * Sequence errors were used to detect the disconnect and then the 3372 * driver would unforce the link. This code in the in the ISR. For 3373 * this to work correctly the Sequence error interrupt had to be 3374 * enabled all the time. 3375 */ 3376 if (adapter->hw.mac.type == e1000_82542 && 3377 adapter->hw.revision_id == E1000_REVISION_2) 3378 clear &= ~E1000_IMC_RXSEQ; 3379 3380 E1000_WRITE_REG(&adapter->hw, E1000_IMC, clear); 3381 3382 lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer); 3383 } 3384 3385 /* 3386 * Bit of a misnomer, what this really means is 3387 * to enable OS management of the system... aka 3388 * to disable special hardware management features 3389 */ 3390 static void 3391 em_get_mgmt(struct adapter *adapter) 3392 { 3393 /* A shared code workaround */ 3394 #define E1000_82542_MANC2H E1000_MANC2H 3395 if (adapter->has_manage) { 3396 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H); 3397 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC); 3398 3399 /* disable hardware interception of ARP */ 3400 manc &= ~(E1000_MANC_ARP_EN); 3401 3402 /* enable receiving management packets to the host */ 3403 if (adapter->hw.mac.type >= e1000_82571) { 3404 manc |= E1000_MANC_EN_MNG2HOST; 3405 #define E1000_MNG2HOST_PORT_623 (1 << 5) 3406 #define E1000_MNG2HOST_PORT_664 (1 << 6) 3407 manc2h |= E1000_MNG2HOST_PORT_623; 3408 manc2h |= E1000_MNG2HOST_PORT_664; 3409 E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h); 3410 } 3411 3412 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc); 3413 } 3414 } 3415 3416 /* 3417 * Give control back to hardware management 3418 * controller if there is one. 3419 */ 3420 static void 3421 em_rel_mgmt(struct adapter *adapter) 3422 { 3423 if (adapter->has_manage) { 3424 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC); 3425 3426 /* re-enable hardware interception of ARP */ 3427 manc |= E1000_MANC_ARP_EN; 3428 3429 if (adapter->hw.mac.type >= e1000_82571) 3430 manc &= ~E1000_MANC_EN_MNG2HOST; 3431 3432 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc); 3433 } 3434 } 3435 3436 /* 3437 * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit. 3438 * For ASF and Pass Through versions of f/w this means that 3439 * the driver is loaded. For AMT version (only with 82573) 3440 * of the f/w this means that the network i/f is open. 3441 */ 3442 static void 3443 em_get_hw_control(struct adapter *adapter) 3444 { 3445 uint32_t ctrl_ext, swsm; 3446 3447 /* Let firmware know the driver has taken over */ 3448 switch (adapter->hw.mac.type) { 3449 case e1000_82573: 3450 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM); 3451 E1000_WRITE_REG(&adapter->hw, E1000_SWSM, 3452 swsm | E1000_SWSM_DRV_LOAD); 3453 break; 3454 case e1000_82571: 3455 case e1000_82572: 3456 case e1000_80003es2lan: 3457 case e1000_ich8lan: 3458 case e1000_ich9lan: 3459 case e1000_ich10lan: 3460 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT); 3461 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, 3462 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); 3463 break; 3464 default: 3465 break; 3466 } 3467 } 3468 3469 /* 3470 * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit. 3471 * For ASF and Pass Through versions of f/w this means that the 3472 * driver is no longer loaded. For AMT version (only with 82573) 3473 * of the f/w this means that the network i/f is closed. 3474 */ 3475 static void 3476 em_rel_hw_control(struct adapter *adapter) 3477 { 3478 uint32_t ctrl_ext, swsm; 3479 3480 /* Let firmware taken over control of h/w */ 3481 switch (adapter->hw.mac.type) { 3482 case e1000_82573: 3483 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM); 3484 E1000_WRITE_REG(&adapter->hw, E1000_SWSM, 3485 swsm & ~E1000_SWSM_DRV_LOAD); 3486 break; 3487 3488 case e1000_82571: 3489 case e1000_82572: 3490 case e1000_80003es2lan: 3491 case e1000_ich8lan: 3492 case e1000_ich9lan: 3493 case e1000_ich10lan: 3494 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT); 3495 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, 3496 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); 3497 break; 3498 3499 default: 3500 break; 3501 } 3502 } 3503 3504 static int 3505 em_is_valid_eaddr(const uint8_t *addr) 3506 { 3507 char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 }; 3508 3509 if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN)) 3510 return (FALSE); 3511 3512 return (TRUE); 3513 } 3514 3515 /* 3516 * Enable PCI Wake On Lan capability 3517 */ 3518 void 3519 em_enable_wol(device_t dev) 3520 { 3521 uint16_t cap, status; 3522 uint8_t id; 3523 3524 /* First find the capabilities pointer*/ 3525 cap = pci_read_config(dev, PCIR_CAP_PTR, 2); 3526 3527 /* Read the PM Capabilities */ 3528 id = pci_read_config(dev, cap, 1); 3529 if (id != PCIY_PMG) /* Something wrong */ 3530 return; 3531 3532 /* 3533 * OK, we have the power capabilities, 3534 * so now get the status register 3535 */ 3536 cap += PCIR_POWER_STATUS; 3537 status = pci_read_config(dev, cap, 2); 3538 status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE; 3539 pci_write_config(dev, cap, status, 2); 3540 } 3541 3542 3543 /* 3544 * 82544 Coexistence issue workaround. 3545 * There are 2 issues. 3546 * 1. Transmit Hang issue. 3547 * To detect this issue, following equation can be used... 3548 * SIZE[3:0] + ADDR[2:0] = SUM[3:0]. 3549 * If SUM[3:0] is in between 1 to 4, we will have this issue. 3550 * 3551 * 2. DAC issue. 3552 * To detect this issue, following equation can be used... 3553 * SIZE[3:0] + ADDR[2:0] = SUM[3:0]. 3554 * If SUM[3:0] is in between 9 to c, we will have this issue. 3555 * 3556 * WORKAROUND: 3557 * Make sure we do not have ending address 3558 * as 1,2,3,4(Hang) or 9,a,b,c (DAC) 3559 */ 3560 static uint32_t 3561 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array) 3562 { 3563 uint32_t safe_terminator; 3564 3565 /* 3566 * Since issue is sensitive to length and address. 3567 * Let us first check the address... 3568 */ 3569 if (length <= 4) { 3570 desc_array->descriptor[0].address = address; 3571 desc_array->descriptor[0].length = length; 3572 desc_array->elements = 1; 3573 return (desc_array->elements); 3574 } 3575 3576 safe_terminator = 3577 (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF); 3578 3579 /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */ 3580 if (safe_terminator == 0 || 3581 (safe_terminator > 4 && safe_terminator < 9) || 3582 (safe_terminator > 0xC && safe_terminator <= 0xF)) { 3583 desc_array->descriptor[0].address = address; 3584 desc_array->descriptor[0].length = length; 3585 desc_array->elements = 1; 3586 return (desc_array->elements); 3587 } 3588 3589 desc_array->descriptor[0].address = address; 3590 desc_array->descriptor[0].length = length - 4; 3591 desc_array->descriptor[1].address = address + (length - 4); 3592 desc_array->descriptor[1].length = 4; 3593 desc_array->elements = 2; 3594 return (desc_array->elements); 3595 } 3596 3597 static void 3598 em_update_stats(struct adapter *adapter) 3599 { 3600 struct ifnet *ifp = &adapter->arpcom.ac_if; 3601 3602 if (adapter->hw.phy.media_type == e1000_media_type_copper || 3603 (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) { 3604 adapter->stats.symerrs += 3605 E1000_READ_REG(&adapter->hw, E1000_SYMERRS); 3606 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC); 3607 } 3608 adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS); 3609 adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC); 3610 adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC); 3611 adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL); 3612 3613 adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC); 3614 adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL); 3615 adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC); 3616 adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC); 3617 adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC); 3618 adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC); 3619 adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC); 3620 adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC); 3621 adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC); 3622 adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC); 3623 adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64); 3624 adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127); 3625 adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255); 3626 adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511); 3627 adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023); 3628 adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522); 3629 adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC); 3630 adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC); 3631 adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC); 3632 adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC); 3633 3634 /* For the 64-bit byte counters the low dword must be read first. */ 3635 /* Both registers clear on the read of the high dword */ 3636 3637 adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH); 3638 adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH); 3639 3640 adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC); 3641 adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC); 3642 adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC); 3643 adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC); 3644 adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC); 3645 3646 adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH); 3647 adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH); 3648 3649 adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR); 3650 adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT); 3651 adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64); 3652 adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127); 3653 adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255); 3654 adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511); 3655 adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023); 3656 adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522); 3657 adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC); 3658 adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC); 3659 3660 if (adapter->hw.mac.type >= e1000_82543) { 3661 adapter->stats.algnerrc += 3662 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC); 3663 adapter->stats.rxerrc += 3664 E1000_READ_REG(&adapter->hw, E1000_RXERRC); 3665 adapter->stats.tncrs += 3666 E1000_READ_REG(&adapter->hw, E1000_TNCRS); 3667 adapter->stats.cexterr += 3668 E1000_READ_REG(&adapter->hw, E1000_CEXTERR); 3669 adapter->stats.tsctc += 3670 E1000_READ_REG(&adapter->hw, E1000_TSCTC); 3671 adapter->stats.tsctfc += 3672 E1000_READ_REG(&adapter->hw, E1000_TSCTFC); 3673 } 3674 3675 ifp->if_collisions = adapter->stats.colc; 3676 3677 /* Rx Errors */ 3678 ifp->if_ierrors = 3679 adapter->dropped_pkts + adapter->stats.rxerrc + 3680 adapter->stats.crcerrs + adapter->stats.algnerrc + 3681 adapter->stats.ruc + adapter->stats.roc + 3682 adapter->stats.mpc + adapter->stats.cexterr; 3683 3684 /* Tx Errors */ 3685 ifp->if_oerrors = 3686 adapter->stats.ecol + adapter->stats.latecol + 3687 adapter->watchdog_events; 3688 } 3689 3690 static void 3691 em_print_debug_info(struct adapter *adapter) 3692 { 3693 device_t dev = adapter->dev; 3694 uint8_t *hw_addr = adapter->hw.hw_addr; 3695 3696 device_printf(dev, "Adapter hardware address = %p \n", hw_addr); 3697 device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n", 3698 E1000_READ_REG(&adapter->hw, E1000_CTRL), 3699 E1000_READ_REG(&adapter->hw, E1000_RCTL)); 3700 device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n", 3701 ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\ 3702 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) ); 3703 device_printf(dev, "Flow control watermarks high = %d low = %d\n", 3704 adapter->hw.fc.high_water, 3705 adapter->hw.fc.low_water); 3706 device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n", 3707 E1000_READ_REG(&adapter->hw, E1000_TIDV), 3708 E1000_READ_REG(&adapter->hw, E1000_TADV)); 3709 device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n", 3710 E1000_READ_REG(&adapter->hw, E1000_RDTR), 3711 E1000_READ_REG(&adapter->hw, E1000_RADV)); 3712 device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n", 3713 (long long)adapter->tx_fifo_wrk_cnt, 3714 (long long)adapter->tx_fifo_reset_cnt); 3715 device_printf(dev, "hw tdh = %d, hw tdt = %d\n", 3716 E1000_READ_REG(&adapter->hw, E1000_TDH(0)), 3717 E1000_READ_REG(&adapter->hw, E1000_TDT(0))); 3718 device_printf(dev, "hw rdh = %d, hw rdt = %d\n", 3719 E1000_READ_REG(&adapter->hw, E1000_RDH(0)), 3720 E1000_READ_REG(&adapter->hw, E1000_RDT(0))); 3721 device_printf(dev, "Num Tx descriptors avail = %d\n", 3722 adapter->num_tx_desc_avail); 3723 device_printf(dev, "Tx Descriptors not avail1 = %ld\n", 3724 adapter->no_tx_desc_avail1); 3725 device_printf(dev, "Tx Descriptors not avail2 = %ld\n", 3726 adapter->no_tx_desc_avail2); 3727 device_printf(dev, "Std mbuf failed = %ld\n", 3728 adapter->mbuf_alloc_failed); 3729 device_printf(dev, "Std mbuf cluster failed = %ld\n", 3730 adapter->mbuf_cluster_failed); 3731 device_printf(dev, "Driver dropped packets = %ld\n", 3732 adapter->dropped_pkts); 3733 device_printf(dev, "Driver tx dma failure in encap = %ld\n", 3734 adapter->no_tx_dma_setup); 3735 3736 device_printf(dev, "TXCSUM try pullup = %lu\n", 3737 adapter->tx_csum_try_pullup); 3738 device_printf(dev, "TXCSUM m_pullup(eh) called = %lu\n", 3739 adapter->tx_csum_pullup1); 3740 device_printf(dev, "TXCSUM m_pullup(eh) failed = %lu\n", 3741 adapter->tx_csum_pullup1_failed); 3742 device_printf(dev, "TXCSUM m_pullup(eh+ip) called = %lu\n", 3743 adapter->tx_csum_pullup2); 3744 device_printf(dev, "TXCSUM m_pullup(eh+ip) failed = %lu\n", 3745 adapter->tx_csum_pullup2_failed); 3746 device_printf(dev, "TXCSUM non-writable(eh) droped = %lu\n", 3747 adapter->tx_csum_drop1); 3748 device_printf(dev, "TXCSUM non-writable(eh+ip) droped = %lu\n", 3749 adapter->tx_csum_drop2); 3750 } 3751 3752 static void 3753 em_print_hw_stats(struct adapter *adapter) 3754 { 3755 device_t dev = adapter->dev; 3756 3757 device_printf(dev, "Excessive collisions = %lld\n", 3758 (long long)adapter->stats.ecol); 3759 #if (DEBUG_HW > 0) /* Dont output these errors normally */ 3760 device_printf(dev, "Symbol errors = %lld\n", 3761 (long long)adapter->stats.symerrs); 3762 #endif 3763 device_printf(dev, "Sequence errors = %lld\n", 3764 (long long)adapter->stats.sec); 3765 device_printf(dev, "Defer count = %lld\n", 3766 (long long)adapter->stats.dc); 3767 device_printf(dev, "Missed Packets = %lld\n", 3768 (long long)adapter->stats.mpc); 3769 device_printf(dev, "Receive No Buffers = %lld\n", 3770 (long long)adapter->stats.rnbc); 3771 /* RLEC is inaccurate on some hardware, calculate our own. */ 3772 device_printf(dev, "Receive Length Errors = %lld\n", 3773 ((long long)adapter->stats.roc + (long long)adapter->stats.ruc)); 3774 device_printf(dev, "Receive errors = %lld\n", 3775 (long long)adapter->stats.rxerrc); 3776 device_printf(dev, "Crc errors = %lld\n", 3777 (long long)adapter->stats.crcerrs); 3778 device_printf(dev, "Alignment errors = %lld\n", 3779 (long long)adapter->stats.algnerrc); 3780 device_printf(dev, "Collision/Carrier extension errors = %lld\n", 3781 (long long)adapter->stats.cexterr); 3782 device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns); 3783 device_printf(dev, "watchdog timeouts = %ld\n", 3784 adapter->watchdog_events); 3785 device_printf(dev, "XON Rcvd = %lld\n", 3786 (long long)adapter->stats.xonrxc); 3787 device_printf(dev, "XON Xmtd = %lld\n", 3788 (long long)adapter->stats.xontxc); 3789 device_printf(dev, "XOFF Rcvd = %lld\n", 3790 (long long)adapter->stats.xoffrxc); 3791 device_printf(dev, "XOFF Xmtd = %lld\n", 3792 (long long)adapter->stats.xofftxc); 3793 device_printf(dev, "Good Packets Rcvd = %lld\n", 3794 (long long)adapter->stats.gprc); 3795 device_printf(dev, "Good Packets Xmtd = %lld\n", 3796 (long long)adapter->stats.gptc); 3797 } 3798 3799 static void 3800 em_print_nvm_info(struct adapter *adapter) 3801 { 3802 uint16_t eeprom_data; 3803 int i, j, row = 0; 3804 3805 /* Its a bit crude, but it gets the job done */ 3806 kprintf("\nInterface EEPROM Dump:\n"); 3807 kprintf("Offset\n0x0000 "); 3808 for (i = 0, j = 0; i < 32; i++, j++) { 3809 if (j == 8) { /* Make the offset block */ 3810 j = 0; ++row; 3811 kprintf("\n0x00%x0 ",row); 3812 } 3813 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data); 3814 kprintf("%04x ", eeprom_data); 3815 } 3816 kprintf("\n"); 3817 } 3818 3819 static int 3820 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS) 3821 { 3822 struct adapter *adapter; 3823 struct ifnet *ifp; 3824 int error, result; 3825 3826 result = -1; 3827 error = sysctl_handle_int(oidp, &result, 0, req); 3828 if (error || !req->newptr) 3829 return (error); 3830 3831 adapter = (struct adapter *)arg1; 3832 ifp = &adapter->arpcom.ac_if; 3833 3834 lwkt_serialize_enter(ifp->if_serializer); 3835 3836 if (result == 1) 3837 em_print_debug_info(adapter); 3838 3839 /* 3840 * This value will cause a hex dump of the 3841 * first 32 16-bit words of the EEPROM to 3842 * the screen. 3843 */ 3844 if (result == 2) 3845 em_print_nvm_info(adapter); 3846 3847 lwkt_serialize_exit(ifp->if_serializer); 3848 3849 return (error); 3850 } 3851 3852 static int 3853 em_sysctl_stats(SYSCTL_HANDLER_ARGS) 3854 { 3855 int error, result; 3856 3857 result = -1; 3858 error = sysctl_handle_int(oidp, &result, 0, req); 3859 if (error || !req->newptr) 3860 return (error); 3861 3862 if (result == 1) { 3863 struct adapter *adapter = (struct adapter *)arg1; 3864 struct ifnet *ifp = &adapter->arpcom.ac_if; 3865 3866 lwkt_serialize_enter(ifp->if_serializer); 3867 em_print_hw_stats(adapter); 3868 lwkt_serialize_exit(ifp->if_serializer); 3869 } 3870 return (error); 3871 } 3872 3873 static void 3874 em_add_sysctl(struct adapter *adapter) 3875 { 3876 #ifdef PROFILE_SERIALIZER 3877 struct ifnet *ifp = &adapter->arpcom.ac_if; 3878 #endif 3879 3880 sysctl_ctx_init(&adapter->sysctl_ctx); 3881 adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx, 3882 SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO, 3883 device_get_nameunit(adapter->dev), 3884 CTLFLAG_RD, 0, ""); 3885 if (adapter->sysctl_tree == NULL) { 3886 device_printf(adapter->dev, "can't add sysctl node\n"); 3887 } else { 3888 SYSCTL_ADD_PROC(&adapter->sysctl_ctx, 3889 SYSCTL_CHILDREN(adapter->sysctl_tree), 3890 OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0, 3891 em_sysctl_debug_info, "I", "Debug Information"); 3892 3893 SYSCTL_ADD_PROC(&adapter->sysctl_ctx, 3894 SYSCTL_CHILDREN(adapter->sysctl_tree), 3895 OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0, 3896 em_sysctl_stats, "I", "Statistics"); 3897 3898 SYSCTL_ADD_INT(&adapter->sysctl_ctx, 3899 SYSCTL_CHILDREN(adapter->sysctl_tree), 3900 OID_AUTO, "rxd", CTLFLAG_RD, 3901 &adapter->num_rx_desc, 0, NULL); 3902 SYSCTL_ADD_INT(&adapter->sysctl_ctx, 3903 SYSCTL_CHILDREN(adapter->sysctl_tree), 3904 OID_AUTO, "txd", CTLFLAG_RD, 3905 &adapter->num_tx_desc, 0, NULL); 3906 3907 #ifdef PROFILE_SERIALIZER 3908 SYSCTL_ADD_UINT(&adapter->sysctl_ctx, 3909 SYSCTL_CHILDREN(adapter->sysctl_tree), 3910 OID_AUTO, "serializer_sleep", CTLFLAG_RW, 3911 &ifp->if_serializer->sleep_cnt, 0, NULL); 3912 SYSCTL_ADD_UINT(&adapter->sysctl_ctx, 3913 SYSCTL_CHILDREN(adapter->sysctl_tree), 3914 OID_AUTO, "serializer_tryfail", CTLFLAG_RW, 3915 &ifp->if_serializer->tryfail_cnt, 0, NULL); 3916 SYSCTL_ADD_UINT(&adapter->sysctl_ctx, 3917 SYSCTL_CHILDREN(adapter->sysctl_tree), 3918 OID_AUTO, "serializer_enter", CTLFLAG_RW, 3919 &ifp->if_serializer->enter_cnt, 0, NULL); 3920 SYSCTL_ADD_UINT(&adapter->sysctl_ctx, 3921 SYSCTL_CHILDREN(adapter->sysctl_tree), 3922 OID_AUTO, "serializer_try", CTLFLAG_RW, 3923 &ifp->if_serializer->try_cnt, 0, NULL); 3924 #endif 3925 if (adapter->hw.mac.type >= e1000_82540) { 3926 SYSCTL_ADD_PROC(&adapter->sysctl_ctx, 3927 SYSCTL_CHILDREN(adapter->sysctl_tree), 3928 OID_AUTO, "int_throttle_ceil", 3929 CTLTYPE_INT|CTLFLAG_RW, adapter, 0, 3930 em_sysctl_int_throttle, "I", 3931 "interrupt throttling rate"); 3932 } 3933 SYSCTL_ADD_PROC(&adapter->sysctl_ctx, 3934 SYSCTL_CHILDREN(adapter->sysctl_tree), 3935 OID_AUTO, "int_tx_nsegs", 3936 CTLTYPE_INT|CTLFLAG_RW, adapter, 0, 3937 em_sysctl_int_tx_nsegs, "I", 3938 "# segments per TX interrupt"); 3939 } 3940 } 3941 3942 static int 3943 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS) 3944 { 3945 struct adapter *adapter = (void *)arg1; 3946 struct ifnet *ifp = &adapter->arpcom.ac_if; 3947 int error, throttle; 3948 3949 throttle = adapter->int_throttle_ceil; 3950 error = sysctl_handle_int(oidp, &throttle, 0, req); 3951 if (error || req->newptr == NULL) 3952 return error; 3953 if (throttle < 0 || throttle > 1000000000 / 256) 3954 return EINVAL; 3955 3956 if (throttle) { 3957 /* 3958 * Set the interrupt throttling rate in 256ns increments, 3959 * recalculate sysctl value assignment to get exact frequency. 3960 */ 3961 throttle = 1000000000 / 256 / throttle; 3962 3963 /* Upper 16bits of ITR is reserved and should be zero */ 3964 if (throttle & 0xffff0000) 3965 return EINVAL; 3966 } 3967 3968 lwkt_serialize_enter(ifp->if_serializer); 3969 3970 if (throttle) 3971 adapter->int_throttle_ceil = 1000000000 / 256 / throttle; 3972 else 3973 adapter->int_throttle_ceil = 0; 3974 3975 if (ifp->if_flags & IFF_RUNNING) 3976 E1000_WRITE_REG(&adapter->hw, E1000_ITR, throttle); 3977 3978 lwkt_serialize_exit(ifp->if_serializer); 3979 3980 if (bootverbose) { 3981 if_printf(ifp, "Interrupt moderation set to %d/sec\n", 3982 adapter->int_throttle_ceil); 3983 } 3984 return 0; 3985 } 3986 3987 static int 3988 em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS) 3989 { 3990 struct adapter *adapter = (void *)arg1; 3991 struct ifnet *ifp = &adapter->arpcom.ac_if; 3992 int error, segs; 3993 3994 segs = adapter->tx_int_nsegs; 3995 error = sysctl_handle_int(oidp, &segs, 0, req); 3996 if (error || req->newptr == NULL) 3997 return error; 3998 if (segs <= 0) 3999 return EINVAL; 4000 4001 lwkt_serialize_enter(ifp->if_serializer); 4002 4003 /* 4004 * Don't allow int_tx_nsegs to become: 4005 * o Less the oact_tx_desc 4006 * o Too large that no TX desc will cause TX interrupt to 4007 * be generated (OACTIVE will never recover) 4008 * o Too small that will cause tx_dd[] overflow 4009 */ 4010 if (segs < adapter->oact_tx_desc || 4011 segs >= adapter->num_tx_desc - adapter->oact_tx_desc || 4012 segs < adapter->num_tx_desc / EM_TXDD_SAFE) { 4013 error = EINVAL; 4014 } else { 4015 error = 0; 4016 adapter->tx_int_nsegs = segs; 4017 } 4018 4019 lwkt_serialize_exit(ifp->if_serializer); 4020 4021 return error; 4022 } 4023