1 /************************************************************************** 2 3 Copyright (c) 2001-2003, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ***************************************************************************/ 33 34 /*$FreeBSD: src/sys/dev/em/if_em.h,v 1.1.2.13 2003/06/09 21:43:41 pdeuskar Exp $*/ 35 /*$DragonFly: src/sys/dev/netif/em/if_em.h,v 1.7 2004/06/04 16:32:11 joerg Exp $*/ 36 37 #ifndef _EM_H_DEFINED_ 38 #define _EM_H_DEFINED_ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/mbuf.h> 43 #include <sys/protosw.h> 44 #include <sys/socket.h> 45 #include <sys/malloc.h> 46 #include <sys/kernel.h> 47 #include <sys/sockio.h> 48 #include <sys/endian.h> 49 50 #include <net/if.h> 51 #include <net/if_arp.h> 52 #include <net/ethernet.h> 53 #include <net/if_dl.h> 54 #include <net/if_media.h> 55 56 #include <net/bpf.h> 57 #include <net/if_types.h> 58 #include <net/vlan/if_vlan_var.h> 59 60 #include <netinet/in_systm.h> 61 #include <netinet/in.h> 62 #include <netinet/ip.h> 63 #include <netinet/tcp.h> 64 #include <netinet/udp.h> 65 66 #include <sys/bus.h> 67 #include <machine/bus.h> 68 #include <sys/rman.h> 69 #include <machine/resource.h> 70 #include <vm/vm.h> 71 #include <vm/pmap.h> 72 #include <machine/clock.h> 73 #include <bus/pci/pcivar.h> 74 #include <bus/pci/pcireg.h> 75 #include <sys/proc.h> 76 #include <sys/sysctl.h> 77 #include "opt_bdg.h" 78 79 #include <dev/netif/em/if_em_hw.h> 80 81 /* Tunables */ 82 83 /* 84 * EM_MAX_TXD: Maximum number of Transmit Descriptors 85 * Valid Range: 80-256 for 82542 and 82543-based adapters 86 * 80-4096 for others 87 * Default Value: 256 88 * This value is the number of transmit descriptors allocated by the driver. 89 * Increasing this value allows the driver to queue more transmits. Each 90 * descriptor is 16 bytes. 91 */ 92 #define EM_MAX_TXD 256 93 94 /* 95 * EM_MAX_RXD - Maximum number of receive Descriptors 96 * Valid Range: 80-256 for 82542 and 82543-based adapters 97 * 80-4096 for others 98 * Default Value: 256 99 * This value is the number of receive descriptors allocated by the driver. 100 * Increasing this value allows the driver to buffer more incoming packets. 101 * Each descriptor is 16 bytes. A receive buffer is also allocated for each 102 * descriptor. The maximum MTU size is 16110. 103 * 104 */ 105 #define EM_MAX_RXD 256 106 107 /* 108 * EM_TIDV - Transmit Interrupt Delay Value 109 * Valid Range: 0-65535 (0=off) 110 * Default Value: 64 111 * This value delays the generation of transmit interrupts in units of 112 * 1.024 microseconds. Transmit interrupt reduction can improve CPU 113 * efficiency if properly tuned for specific network traffic. If the 114 * system is reporting dropped transmits, this value may be set too high 115 * causing the driver to run out of available transmit descriptors. 116 */ 117 #define EM_TIDV 64 118 119 /* 120 * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544) 121 * Valid Range: 0-65535 (0=off) 122 * Default Value: 64 123 * This value, in units of 1.024 microseconds, limits the delay in which a 124 * transmit interrupt is generated. Useful only if EM_TIDV is non-zero, 125 * this value ensures that an interrupt is generated after the initial 126 * packet is sent on the wire within the set amount of time. Proper tuning, 127 * along with EM_TIDV, may improve traffic throughput in specific 128 * network conditions. 129 */ 130 #define EM_TADV 64 131 132 /* 133 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer) 134 * Valid Range: 0-65535 (0=off) 135 * Default Value: 0 136 * This value delays the generation of receive interrupts in units of 1.024 137 * microseconds. Receive interrupt reduction can improve CPU efficiency if 138 * properly tuned for specific network traffic. Increasing this value adds 139 * extra latency to frame reception and can end up decreasing the throughput 140 * of TCP traffic. If the system is reporting dropped receives, this value 141 * may be set too high, causing the driver to run out of available receive 142 * descriptors. 143 * 144 * CAUTION: When setting EM_RDTR to a value other than 0, adapters 145 * may hang (stop transmitting) under certain network conditions. 146 * If this occurs a WATCHDOG message is logged in the system event log. 147 * In addition, the controller is automatically reset, restoring the 148 * network connection. To eliminate the potential for the hang 149 * ensure that EM_RDTR is set to 0. 150 */ 151 #define EM_RDTR 0 152 153 /* 154 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544) 155 * Valid Range: 0-65535 (0=off) 156 * Default Value: 64 157 * This value, in units of 1.024 microseconds, limits the delay in which a 158 * receive interrupt is generated. Useful only if EM_RDTR is non-zero, 159 * this value ensures that an interrupt is generated after the initial 160 * packet is received within the set amount of time. Proper tuning, 161 * along with EM_RDTR, may improve traffic throughput in specific network 162 * conditions. 163 */ 164 #define EM_RADV 64 165 166 167 /* 168 * This parameter controls the maximum no of times the driver will loop 169 * in the isr. 170 * Minimum Value = 1 171 */ 172 #define EM_MAX_INTR 3 173 174 /* 175 * Inform the stack about transmit checksum offload capabilities. 176 */ 177 #define EM_CHECKSUM_FEATURES (CSUM_TCP | CSUM_UDP) 178 179 /* 180 * This parameter controls the duration of transmit watchdog timer. 181 */ 182 #define EM_TX_TIMEOUT 5 /* set to 5 seconds */ 183 184 /* 185 * This parameter controls when the driver calls the routine to reclaim 186 * transmit descriptors. 187 */ 188 #define EM_TX_CLEANUP_THRESHOLD EM_MAX_TXD / 8 189 190 /* 191 * This parameter controls whether or not autonegotation is enabled. 192 * 0 - Disable autonegotiation 193 * 1 - Enable autonegotiation 194 */ 195 #define DO_AUTO_NEG 1 196 197 /* 198 * This parameter control whether or not the driver will wait for 199 * autonegotiation to complete. 200 * 1 - Wait for autonegotiation to complete 201 * 0 - Don't wait for autonegotiation to complete 202 */ 203 #define WAIT_FOR_AUTO_NEG_DEFAULT 0 204 205 /* 206 * EM_MASTER_SLAVE is only defined to enable a workaround for a known 207 * compatibility issue with 82541/82547 devices and some switches. 208 * See the "Known Limitations" section of the README file for a complete 209 * description and a list of affected switches. 210 * 211 * 0 = Hardware default 212 * 1 = Master mode 213 * 2 = Slave mode 214 * 3 = Auto master/slave 215 */ 216 /* #define EM_MASTER_SLAVE 2 */ 217 218 /* Tunables -- End */ 219 220 #define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ 221 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ 222 ADVERTISE_1000_FULL) 223 224 #define EM_VENDOR_ID 0x8086 225 #define EM_MMBA 0x0010 /* Mem base address */ 226 #define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1)) 227 228 #define EM_JUMBO_PBA 0x00000028 229 #define EM_DEFAULT_PBA 0x00000030 230 #define EM_SMARTSPEED_DOWNSHIFT 3 231 #define EM_SMARTSPEED_MAX 15 232 233 234 #define MAX_NUM_MULTICAST_ADDRESSES 128 235 #define PCI_ANY_ID (~0U) 236 #define ETHER_ALIGN 2 237 238 /* Defines for printing debug information */ 239 #define DEBUG_INIT 0 240 #define DEBUG_IOCTL 0 241 #define DEBUG_HW 0 242 243 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 244 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 245 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 246 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 247 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 248 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 249 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 250 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 251 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 252 253 254 /* Supported RX Buffer Sizes */ 255 #define EM_RXBUFFER_2048 2048 256 #define EM_RXBUFFER_4096 4096 257 #define EM_RXBUFFER_8192 8192 258 #define EM_RXBUFFER_16384 16384 259 260 #define EM_MAX_SCATTER 64 261 262 /* ****************************************************************************** 263 * vendor_info_array 264 * 265 * This array contains the list of Subvendor/Subdevice IDs on which the driver 266 * should load. 267 * 268 * ******************************************************************************/ 269 typedef struct _em_vendor_info_t { 270 unsigned int vendor_id; 271 unsigned int device_id; 272 unsigned int subvendor_id; 273 unsigned int subdevice_id; 274 unsigned int index; 275 } em_vendor_info_t; 276 277 278 struct em_buffer { 279 struct mbuf *m_head; 280 bus_dmamap_t map; /* bus_dma map for packet */ 281 }; 282 283 struct em_q { 284 bus_dmamap_t map; /* bus_dma map for packet */ 285 int nsegs; /* # of segments/descriptors */ 286 bus_dma_segment_t segs[EM_MAX_SCATTER]; 287 }; 288 289 /* 290 * Bus dma allocation structure used by 291 * em_dma_malloc and em_dma_free. 292 */ 293 struct em_dma_alloc { 294 bus_addr_t dma_paddr; 295 caddr_t dma_vaddr; 296 bus_dma_tag_t dma_tag; 297 bus_dmamap_t dma_map; 298 bus_dma_segment_t dma_seg; 299 bus_size_t dma_size; 300 int dma_nseg; 301 }; 302 303 typedef enum _XSUM_CONTEXT_T { 304 OFFLOAD_NONE, 305 OFFLOAD_TCP_IP, 306 OFFLOAD_UDP_IP 307 } XSUM_CONTEXT_T; 308 309 struct adapter; 310 struct em_int_delay_info { 311 struct adapter *adapter; /* Back-pointer to the adapter struct */ 312 int offset; /* Register offset to read/write */ 313 int value; /* Current value in usecs */ 314 }; 315 316 /* For 82544 PCIX Workaround */ 317 typedef struct _ADDRESS_LENGTH_PAIR 318 { 319 u_int64_t address; 320 u_int32_t length; 321 } ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR; 322 323 typedef struct _DESCRIPTOR_PAIR 324 { 325 ADDRESS_LENGTH_PAIR descriptor[4]; 326 u_int32_t elements; 327 } DESC_ARRAY, *PDESC_ARRAY; 328 329 /* Our adapter structure */ 330 struct adapter { 331 struct arpcom interface_data; 332 struct em_hw hw; 333 334 /* FreeBSD operating-system-specific structures */ 335 struct em_osdep osdep; 336 struct device *dev; 337 struct resource *res_memory; 338 struct resource *res_ioport; 339 struct resource *res_interrupt; 340 void *int_handler_tag; 341 struct ifmedia media; 342 struct callout timer; 343 struct callout tx_fifo_timer; 344 int io_rid; 345 346 /* Info about the board itself */ 347 u_int32_t part_num; 348 u_int8_t link_active; 349 u_int16_t link_speed; 350 u_int16_t link_duplex; 351 u_int32_t smartspeed; 352 struct em_int_delay_info tx_int_delay; 353 struct em_int_delay_info tx_abs_int_delay; 354 struct em_int_delay_info rx_int_delay; 355 struct em_int_delay_info rx_abs_int_delay; 356 357 XSUM_CONTEXT_T active_checksum_context; 358 359 /* 360 * Transmit definitions 361 * 362 * We have an array of num_tx_desc descriptors (handled 363 * by the controller) paired with an array of tx_buffers 364 * (at tx_buffer_area). 365 * The index of the next available descriptor is next_avail_tx_desc. 366 * The number of remaining tx_desc is num_tx_desc_avail. 367 */ 368 struct em_dma_alloc txdma; /* bus_dma glue for tx desc */ 369 struct em_tx_desc *tx_desc_base; 370 u_int32_t next_avail_tx_desc; 371 u_int32_t oldest_used_tx_desc; 372 volatile u_int16_t num_tx_desc_avail; 373 u_int16_t num_tx_desc; 374 u_int32_t txd_cmd; 375 struct em_buffer *tx_buffer_area; 376 bus_dma_tag_t txtag; /* dma tag for tx */ 377 378 /* 379 * Receive definitions 380 * 381 * we have an array of num_rx_desc rx_desc (handled by the 382 * controller), and paired with an array of rx_buffers 383 * (at rx_buffer_area). 384 * The next pair to check on receive is at offset next_rx_desc_to_check 385 */ 386 struct em_dma_alloc rxdma; /* bus_dma glue for rx desc */ 387 struct em_rx_desc *rx_desc_base; 388 u_int32_t next_rx_desc_to_check; 389 u_int16_t num_rx_desc; 390 u_int32_t rx_buffer_len; 391 struct em_buffer *rx_buffer_area; 392 bus_dma_tag_t rxtag; 393 394 /* Jumbo frame */ 395 struct mbuf *fmp; 396 struct mbuf *lmp; 397 398 u_int16_t tx_fifo_head; 399 400 struct sysctl_ctx_list sysctl_ctx; 401 struct sysctl_oid *sysctl_tree; 402 403 /* Misc stats maintained by the driver */ 404 unsigned long dropped_pkts; 405 unsigned long mbuf_alloc_failed; 406 unsigned long mbuf_cluster_failed; 407 unsigned long no_tx_desc_avail1; 408 unsigned long no_tx_desc_avail2; 409 unsigned long no_tx_map_avail; 410 unsigned long no_tx_dma_setup; 411 u_int64_t tx_fifo_reset; 412 u_int64_t tx_fifo_wrk; 413 414 /* For 82544 PCIX Workaround */ 415 boolean_t pcix_82544; 416 boolean_t in_detach; 417 418 #ifdef DBG_STATS 419 unsigned long no_pkts_avail; 420 unsigned long clean_tx_interrupts; 421 422 #endif 423 struct em_hw_stats stats; 424 }; 425 426 #endif /* _EM_H_DEFINED_ */ 427