1 /************************************************************************** 2 3 Copyright (c) 2001-2003, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ***************************************************************************/ 33 34 /*$FreeBSD: src/sys/dev/em/if_em.h,v 1.1.2.13 2003/06/09 21:43:41 pdeuskar Exp $*/ 35 /*$DragonFly: src/sys/dev/netif/em/if_em.h,v 1.8 2004/11/22 00:46:14 dillon Exp $*/ 36 37 #ifndef _EM_H_DEFINED_ 38 #define _EM_H_DEFINED_ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/mbuf.h> 43 #include <sys/protosw.h> 44 #include <sys/socket.h> 45 #include <sys/malloc.h> 46 #include <sys/kernel.h> 47 #include <sys/sockio.h> 48 #include <sys/endian.h> 49 50 #include <net/if.h> 51 #include <net/if_arp.h> 52 #include <net/ethernet.h> 53 #include <net/if_dl.h> 54 #include <net/if_media.h> 55 56 #include <net/bpf.h> 57 #include <net/if_types.h> 58 #include <net/vlan/if_vlan_var.h> 59 60 #include <netinet/in_systm.h> 61 #include <netinet/in.h> 62 #include <netinet/ip.h> 63 #include <netinet/tcp.h> 64 #include <netinet/udp.h> 65 66 #include <sys/bus.h> 67 #include <machine/bus.h> 68 #include <sys/rman.h> 69 #include <machine/resource.h> 70 #include <vm/vm.h> 71 #include <vm/pmap.h> 72 #include <machine/clock.h> 73 #include <bus/pci/pcivar.h> 74 #include <bus/pci/pcireg.h> 75 #include <sys/proc.h> 76 #include <sys/sysctl.h> 77 #include <sys/thread2.h> 78 #include "opt_bdg.h" 79 80 #include <dev/netif/em/if_em_hw.h> 81 82 /* Tunables */ 83 84 /* 85 * EM_MAX_TXD: Maximum number of Transmit Descriptors 86 * Valid Range: 80-256 for 82542 and 82543-based adapters 87 * 80-4096 for others 88 * Default Value: 256 89 * This value is the number of transmit descriptors allocated by the driver. 90 * Increasing this value allows the driver to queue more transmits. Each 91 * descriptor is 16 bytes. 92 */ 93 #define EM_MAX_TXD 256 94 95 /* 96 * EM_MAX_RXD - Maximum number of receive Descriptors 97 * Valid Range: 80-256 for 82542 and 82543-based adapters 98 * 80-4096 for others 99 * Default Value: 256 100 * This value is the number of receive descriptors allocated by the driver. 101 * Increasing this value allows the driver to buffer more incoming packets. 102 * Each descriptor is 16 bytes. A receive buffer is also allocated for each 103 * descriptor. The maximum MTU size is 16110. 104 * 105 */ 106 #define EM_MAX_RXD 256 107 108 /* 109 * EM_TIDV - Transmit Interrupt Delay Value 110 * Valid Range: 0-65535 (0=off) 111 * Default Value: 64 112 * This value delays the generation of transmit interrupts in units of 113 * 1.024 microseconds. Transmit interrupt reduction can improve CPU 114 * efficiency if properly tuned for specific network traffic. If the 115 * system is reporting dropped transmits, this value may be set too high 116 * causing the driver to run out of available transmit descriptors. 117 */ 118 #define EM_TIDV 64 119 120 /* 121 * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544) 122 * Valid Range: 0-65535 (0=off) 123 * Default Value: 64 124 * This value, in units of 1.024 microseconds, limits the delay in which a 125 * transmit interrupt is generated. Useful only if EM_TIDV is non-zero, 126 * this value ensures that an interrupt is generated after the initial 127 * packet is sent on the wire within the set amount of time. Proper tuning, 128 * along with EM_TIDV, may improve traffic throughput in specific 129 * network conditions. 130 */ 131 #define EM_TADV 64 132 133 /* 134 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer) 135 * Valid Range: 0-65535 (0=off) 136 * Default Value: 0 137 * This value delays the generation of receive interrupts in units of 1.024 138 * microseconds. Receive interrupt reduction can improve CPU efficiency if 139 * properly tuned for specific network traffic. Increasing this value adds 140 * extra latency to frame reception and can end up decreasing the throughput 141 * of TCP traffic. If the system is reporting dropped receives, this value 142 * may be set too high, causing the driver to run out of available receive 143 * descriptors. 144 * 145 * CAUTION: When setting EM_RDTR to a value other than 0, adapters 146 * may hang (stop transmitting) under certain network conditions. 147 * If this occurs a WATCHDOG message is logged in the system event log. 148 * In addition, the controller is automatically reset, restoring the 149 * network connection. To eliminate the potential for the hang 150 * ensure that EM_RDTR is set to 0. 151 */ 152 #define EM_RDTR 0 153 154 /* 155 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544) 156 * Valid Range: 0-65535 (0=off) 157 * Default Value: 64 158 * This value, in units of 1.024 microseconds, limits the delay in which a 159 * receive interrupt is generated. Useful only if EM_RDTR is non-zero, 160 * this value ensures that an interrupt is generated after the initial 161 * packet is received within the set amount of time. Proper tuning, 162 * along with EM_RDTR, may improve traffic throughput in specific network 163 * conditions. 164 */ 165 #define EM_RADV 64 166 167 168 /* 169 * This parameter controls the maximum no of times the driver will loop 170 * in the isr. 171 * Minimum Value = 1 172 */ 173 #define EM_MAX_INTR 3 174 175 /* 176 * Inform the stack about transmit checksum offload capabilities. 177 */ 178 #define EM_CHECKSUM_FEATURES (CSUM_TCP | CSUM_UDP) 179 180 /* 181 * This parameter controls the duration of transmit watchdog timer. 182 */ 183 #define EM_TX_TIMEOUT 5 /* set to 5 seconds */ 184 185 /* 186 * This parameter controls when the driver calls the routine to reclaim 187 * transmit descriptors. 188 */ 189 #define EM_TX_CLEANUP_THRESHOLD EM_MAX_TXD / 8 190 191 /* 192 * This parameter controls whether or not autonegotation is enabled. 193 * 0 - Disable autonegotiation 194 * 1 - Enable autonegotiation 195 */ 196 #define DO_AUTO_NEG 1 197 198 /* 199 * This parameter control whether or not the driver will wait for 200 * autonegotiation to complete. 201 * 1 - Wait for autonegotiation to complete 202 * 0 - Don't wait for autonegotiation to complete 203 */ 204 #define WAIT_FOR_AUTO_NEG_DEFAULT 0 205 206 /* 207 * EM_MASTER_SLAVE is only defined to enable a workaround for a known 208 * compatibility issue with 82541/82547 devices and some switches. 209 * See the "Known Limitations" section of the README file for a complete 210 * description and a list of affected switches. 211 * 212 * 0 = Hardware default 213 * 1 = Master mode 214 * 2 = Slave mode 215 * 3 = Auto master/slave 216 */ 217 /* #define EM_MASTER_SLAVE 2 */ 218 219 /* Tunables -- End */ 220 221 #define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ 222 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ 223 ADVERTISE_1000_FULL) 224 225 #define EM_VENDOR_ID 0x8086 226 #define EM_MMBA 0x0010 /* Mem base address */ 227 #define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1)) 228 229 #define EM_JUMBO_PBA 0x00000028 230 #define EM_DEFAULT_PBA 0x00000030 231 #define EM_SMARTSPEED_DOWNSHIFT 3 232 #define EM_SMARTSPEED_MAX 15 233 234 235 #define MAX_NUM_MULTICAST_ADDRESSES 128 236 #define PCI_ANY_ID (~0U) 237 #define ETHER_ALIGN 2 238 239 /* Defines for printing debug information */ 240 #define DEBUG_INIT 0 241 #define DEBUG_IOCTL 0 242 #define DEBUG_HW 0 243 244 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 245 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 246 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 247 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 248 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 249 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 250 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 251 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 252 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 253 254 255 /* Supported RX Buffer Sizes */ 256 #define EM_RXBUFFER_2048 2048 257 #define EM_RXBUFFER_4096 4096 258 #define EM_RXBUFFER_8192 8192 259 #define EM_RXBUFFER_16384 16384 260 261 #define EM_MAX_SCATTER 64 262 263 /* ****************************************************************************** 264 * vendor_info_array 265 * 266 * This array contains the list of Subvendor/Subdevice IDs on which the driver 267 * should load. 268 * 269 * ******************************************************************************/ 270 typedef struct _em_vendor_info_t { 271 unsigned int vendor_id; 272 unsigned int device_id; 273 unsigned int subvendor_id; 274 unsigned int subdevice_id; 275 unsigned int index; 276 } em_vendor_info_t; 277 278 279 struct em_buffer { 280 struct mbuf *m_head; 281 bus_dmamap_t map; /* bus_dma map for packet */ 282 }; 283 284 struct em_q { 285 bus_dmamap_t map; /* bus_dma map for packet */ 286 int nsegs; /* # of segments/descriptors */ 287 bus_dma_segment_t segs[EM_MAX_SCATTER]; 288 }; 289 290 /* 291 * Bus dma allocation structure used by 292 * em_dma_malloc and em_dma_free. 293 */ 294 struct em_dma_alloc { 295 bus_addr_t dma_paddr; 296 caddr_t dma_vaddr; 297 bus_dma_tag_t dma_tag; 298 bus_dmamap_t dma_map; 299 bus_dma_segment_t dma_seg; 300 bus_size_t dma_size; 301 int dma_nseg; 302 }; 303 304 typedef enum _XSUM_CONTEXT_T { 305 OFFLOAD_NONE, 306 OFFLOAD_TCP_IP, 307 OFFLOAD_UDP_IP 308 } XSUM_CONTEXT_T; 309 310 struct adapter; 311 struct em_int_delay_info { 312 struct adapter *adapter; /* Back-pointer to the adapter struct */ 313 int offset; /* Register offset to read/write */ 314 int value; /* Current value in usecs */ 315 }; 316 317 /* For 82544 PCIX Workaround */ 318 typedef struct _ADDRESS_LENGTH_PAIR 319 { 320 u_int64_t address; 321 u_int32_t length; 322 } ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR; 323 324 typedef struct _DESCRIPTOR_PAIR 325 { 326 ADDRESS_LENGTH_PAIR descriptor[4]; 327 u_int32_t elements; 328 } DESC_ARRAY, *PDESC_ARRAY; 329 330 /* Our adapter structure */ 331 struct adapter { 332 struct arpcom interface_data; 333 struct em_hw hw; 334 335 /* FreeBSD operating-system-specific structures */ 336 struct em_osdep osdep; 337 struct device *dev; 338 struct resource *res_memory; 339 struct resource *res_ioport; 340 struct resource *res_interrupt; 341 void *int_handler_tag; 342 struct ifmedia media; 343 struct callout timer; 344 struct callout tx_fifo_timer; 345 int io_rid; 346 347 /* Info about the board itself */ 348 u_int32_t part_num; 349 u_int8_t link_active; 350 u_int16_t link_speed; 351 u_int16_t link_duplex; 352 u_int32_t smartspeed; 353 struct em_int_delay_info tx_int_delay; 354 struct em_int_delay_info tx_abs_int_delay; 355 struct em_int_delay_info rx_int_delay; 356 struct em_int_delay_info rx_abs_int_delay; 357 358 XSUM_CONTEXT_T active_checksum_context; 359 360 /* 361 * Transmit definitions 362 * 363 * We have an array of num_tx_desc descriptors (handled 364 * by the controller) paired with an array of tx_buffers 365 * (at tx_buffer_area). 366 * The index of the next available descriptor is next_avail_tx_desc. 367 * The number of remaining tx_desc is num_tx_desc_avail. 368 */ 369 struct em_dma_alloc txdma; /* bus_dma glue for tx desc */ 370 struct em_tx_desc *tx_desc_base; 371 u_int32_t next_avail_tx_desc; 372 u_int32_t oldest_used_tx_desc; 373 volatile u_int16_t num_tx_desc_avail; 374 u_int16_t num_tx_desc; 375 u_int32_t txd_cmd; 376 struct em_buffer *tx_buffer_area; 377 bus_dma_tag_t txtag; /* dma tag for tx */ 378 379 /* 380 * Receive definitions 381 * 382 * we have an array of num_rx_desc rx_desc (handled by the 383 * controller), and paired with an array of rx_buffers 384 * (at rx_buffer_area). 385 * The next pair to check on receive is at offset next_rx_desc_to_check 386 */ 387 struct em_dma_alloc rxdma; /* bus_dma glue for rx desc */ 388 struct em_rx_desc *rx_desc_base; 389 u_int32_t next_rx_desc_to_check; 390 u_int16_t num_rx_desc; 391 u_int32_t rx_buffer_len; 392 struct em_buffer *rx_buffer_area; 393 bus_dma_tag_t rxtag; 394 395 /* Jumbo frame */ 396 struct mbuf *fmp; 397 struct mbuf *lmp; 398 399 u_int16_t tx_fifo_head; 400 401 struct sysctl_ctx_list sysctl_ctx; 402 struct sysctl_oid *sysctl_tree; 403 404 /* Misc stats maintained by the driver */ 405 unsigned long dropped_pkts; 406 unsigned long mbuf_alloc_failed; 407 unsigned long mbuf_cluster_failed; 408 unsigned long no_tx_desc_avail1; 409 unsigned long no_tx_desc_avail2; 410 unsigned long no_tx_map_avail; 411 unsigned long no_tx_dma_setup; 412 u_int64_t tx_fifo_reset; 413 u_int64_t tx_fifo_wrk; 414 415 /* For 82544 PCIX Workaround */ 416 boolean_t pcix_82544; 417 boolean_t in_detach; 418 419 #ifdef DBG_STATS 420 unsigned long no_pkts_avail; 421 unsigned long clean_tx_interrupts; 422 423 #endif 424 struct em_hw_stats stats; 425 }; 426 427 #endif /* _EM_H_DEFINED_ */ 428