1 /* 2 * Copyright (c) 1995, David Greenman 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD: src/sys/dev/fxp/if_fxpvar.h,v 1.17.2.6 2002/11/13 20:58:31 iedowse Exp $ 28 * $DragonFly: src/sys/dev/netif/fxp/if_fxpvar.h,v 1.3 2004/01/06 03:17:23 dillon Exp $ 29 */ 30 31 /* 32 * Misc. defintions for the Intel EtherExpress Pro/100B PCI Fast 33 * Ethernet driver 34 */ 35 36 /* 37 * Number of transmit control blocks. This determines the number 38 * of transmit buffers that can be chained in the CB list. 39 * This must be a power of two. 40 */ 41 #define FXP_NTXCB 128 42 43 /* 44 * Number of completed TX commands at which point an interrupt 45 * will be generated to garbage collect the attached buffers. 46 * Must be at least one less than FXP_NTXCB, and should be 47 * enough less so that the transmitter doesn't becomes idle 48 * during the buffer rundown (which would reduce performance). 49 */ 50 #define FXP_CXINT_THRESH 120 51 52 /* 53 * TxCB list index mask. This is used to do list wrap-around. 54 */ 55 #define FXP_TXCB_MASK (FXP_NTXCB - 1) 56 57 /* 58 * Number of receive frame area buffers. These are large so chose 59 * wisely. 60 */ 61 #ifdef DEVICE_POLLING 62 #define FXP_NRFABUFS 192 63 #else 64 #define FXP_NRFABUFS 64 65 #endif 66 67 /* 68 * Maximum number of seconds that the receiver can be idle before we 69 * assume it's dead and attempt to reset it by reprogramming the 70 * multicast filter. This is part of a work-around for a bug in the 71 * NIC. See fxp_stats_update(). 72 */ 73 #define FXP_MAX_RX_IDLE 15 74 75 /* 76 * Default maximum time, in microseconds, that an interrupt may be delayed 77 * in an attempt to coalesce interrupts. This is only effective if the Intel 78 * microcode is loaded, and may be changed via either loader tunables or 79 * sysctl. See also the CPUSAVER_DWORD entry in rcvbundl.h. 80 */ 81 #define TUNABLE_INT_DELAY 1000 82 83 /* 84 * Default number of packets that will be bundled, before an interrupt is 85 * generated. This is only effective if the Intel microcode is loaded, and 86 * may be changed via either loader tunables or sysctl. This may not be 87 * present in all microcode revisions, see also the CPUSAVER_BUNDLE_MAX_DWORD 88 * entry in rcvbundl.h. 89 */ 90 #define TUNABLE_BUNDLE_MAX 6 91 92 #if __FreeBSD_version < 500000 93 #define FXP_LOCK(_sc) 94 #define FXP_UNLOCK(_sc) 95 #define mtx_init(a, b, c) 96 #define mtx_destroy(a) 97 struct mtx { int dummy; }; 98 #else 99 #define FXP_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 100 #define FXP_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 101 #endif 102 103 #ifdef __alpha__ 104 #undef vtophys 105 #define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va)) 106 #endif /* __alpha__ */ 107 108 /* 109 * NOTE: Elements are ordered for optimal cacheline behavior, and NOT 110 * for functional grouping. 111 */ 112 struct fxp_softc { 113 struct arpcom arpcom; /* per-interface network data */ 114 struct resource *mem; /* resource descriptor for registers */ 115 int rtp; /* register resource type */ 116 int rgd; /* register descriptor in use */ 117 struct resource *irq; /* resource descriptor for interrupt */ 118 void *ih; /* interrupt handler cookie */ 119 struct mtx sc_mtx; 120 bus_space_tag_t sc_st; /* bus space tag */ 121 bus_space_handle_t sc_sh; /* bus space handle */ 122 struct mbuf *rfa_headm; /* first mbuf in receive frame area */ 123 struct mbuf *rfa_tailm; /* last mbuf in receive frame area */ 124 struct fxp_cb_tx *cbl_first; /* first active TxCB in list */ 125 int tx_queued; /* # of active TxCB's */ 126 int need_mcsetup; /* multicast filter needs programming */ 127 struct fxp_cb_tx *cbl_last; /* last active TxCB in list */ 128 struct fxp_stats *fxp_stats; /* Pointer to interface stats */ 129 int rx_idle_secs; /* # of seconds RX has been idle */ 130 struct callout_handle stat_ch; /* Handle for canceling our stat timeout */ 131 struct fxp_cb_tx *cbl_base; /* base of TxCB list */ 132 struct fxp_cb_mcs *mcsp; /* Pointer to mcast setup descriptor */ 133 struct ifmedia sc_media; /* media information */ 134 device_t miibus; 135 device_t dev; 136 struct sysctl_ctx_list sysctl_ctx; 137 struct sysctl_oid *sysctl_tree; 138 int tunable_int_delay; /* interrupt delay value for ucode */ 139 int tunable_bundle_max; /* max # frames per interrupt (ucode) */ 140 int eeprom_size; /* size of serial EEPROM */ 141 int suspended; /* 0 = normal 1 = suspended (APM) */ 142 int cu_resume_bug; 143 int revision; 144 int flags; 145 u_int32_t saved_maps[5]; /* pci data */ 146 u_int32_t saved_biosaddr; 147 u_int8_t saved_intline; 148 u_int8_t saved_cachelnsz; 149 u_int8_t saved_lattimer; 150 }; 151 152 #define FXP_FLAG_MWI_ENABLE 0x0001 /* MWI enable */ 153 #define FXP_FLAG_READ_ALIGN 0x0002 /* align read access with cacheline */ 154 #define FXP_FLAG_WRITE_ALIGN 0x0004 /* end write on cacheline */ 155 #define FXP_FLAG_EXT_TXCB 0x0008 /* enable use of extended TXCB */ 156 #define FXP_FLAG_SERIAL_MEDIA 0x0010 /* 10Mbps serial interface */ 157 #define FXP_FLAG_LONG_PKT_EN 0x0020 /* enable long packet reception */ 158 #define FXP_FLAG_ALL_MCAST 0x0040 /* accept all multicast frames */ 159 #define FXP_FLAG_CU_RESUME_BUG 0x0080 /* requires workaround for CU_RESUME */ 160 #define FXP_FLAG_UCODE 0x0100 /* ucode is loaded */ 161 #define FXP_FLAG_DEFERRED_RNR 0x0200 /* DEVICE_POLLING deferred RNR */ 162 163 /* Macros to ease CSR access. */ 164 #define CSR_READ_1(sc, reg) \ 165 bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg)) 166 #define CSR_READ_2(sc, reg) \ 167 bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg)) 168 #define CSR_READ_4(sc, reg) \ 169 bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg)) 170 #define CSR_WRITE_1(sc, reg, val) \ 171 bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 172 #define CSR_WRITE_2(sc, reg, val) \ 173 bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 174 #define CSR_WRITE_4(sc, reg, val) \ 175 bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 176 177 #define sc_if arpcom.ac_if 178 179 #define FXP_UNIT(_sc) (_sc)->arpcom.ac_if.if_dunit 180