1 /*- 2 * Copyright (c) 2007-2009 Damien Bergamini <damien.bergamini@free.fr> 3 * Copyright (c) 2008 Benjamin Close <benjsc@FreeBSD.org> 4 * Copyright (c) 2008 Sam Leffler, Errno Consulting 5 * Copyright (c) 2011 Intel Corporation 6 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr> 7 * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org> 8 * 9 * Permission to use, copy, modify, and distribute this software for any 10 * purpose with or without fee is hereby granted, provided that the above 11 * copyright notice and this permission notice appear in all copies. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 * 21 * $FreeBSD: head/sys/dev/iwn/if_iwn.c 258118 2013-11-14 07:27:00Z adrian $ 22 */ 23 24 /* 25 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network 26 * adapters. 27 */ 28 29 #include "opt_wlan.h" 30 #include "opt_iwn.h" 31 32 #include <sys/param.h> 33 #include <sys/sockio.h> 34 #include <sys/sysctl.h> 35 #include <sys/mbuf.h> 36 #include <sys/kernel.h> 37 #include <sys/socket.h> 38 #include <sys/systm.h> 39 #include <sys/malloc.h> 40 #include <sys/stdbool.h> 41 #include <sys/bus.h> 42 #include <sys/rman.h> 43 #include <sys/endian.h> 44 #include <sys/firmware.h> 45 #include <sys/limits.h> 46 #include <sys/module.h> 47 #include <sys/queue.h> 48 #include <sys/taskqueue.h> 49 #include <sys/libkern.h> 50 51 #include <sys/resource.h> 52 #include <machine/clock.h> 53 54 #include <bus/pci/pcireg.h> 55 #include <bus/pci/pcivar.h> 56 57 #include <net/bpf.h> 58 #include <net/if.h> 59 #include <net/if_var.h> 60 #include <net/if_arp.h> 61 #include <net/ifq_var.h> 62 #include <net/ethernet.h> 63 #include <net/if_dl.h> 64 #include <net/if_media.h> 65 #include <net/if_types.h> 66 67 #include <netinet/in.h> 68 #include <netinet/in_systm.h> 69 #include <netinet/in_var.h> 70 #include <netinet/if_ether.h> 71 #include <netinet/ip.h> 72 73 #include <netproto/802_11/ieee80211_var.h> 74 #include <netproto/802_11/ieee80211_radiotap.h> 75 #include <netproto/802_11/ieee80211_regdomain.h> 76 #include <netproto/802_11/ieee80211_ratectl.h> 77 78 #include "if_iwnreg.h" 79 #include "if_iwnvar.h" 80 #include "if_iwn_devid.h" 81 #include "if_iwn_chip_cfg.h" 82 #include "if_iwn_debug.h" 83 #include "if_iwn_ioctl.h" 84 85 #define IWN_LOCK(sc) 86 #define IWN_UNLOCK(sc) 87 88 struct iwn_ident { 89 uint16_t vendor; 90 uint16_t device; 91 const char *name; 92 }; 93 94 static const struct iwn_ident iwn_ident_table[] = { 95 { 0x8086, IWN_DID_6x05_1, "Intel Centrino Advanced-N 6205" }, 96 { 0x8086, IWN_DID_1000_1, "Intel Centrino Wireless-N 1000" }, 97 { 0x8086, IWN_DID_1000_2, "Intel Centrino Wireless-N 1000" }, 98 { 0x8086, IWN_DID_6x05_2, "Intel Centrino Advanced-N 6205" }, 99 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" }, 100 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" }, 101 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" }, 102 { 0x8086, IWN_DID_x030_2, "Intel Centrino Wireless-N 1030" }, 103 { 0x8086, IWN_DID_x030_3, "Intel Centrino Advanced-N 6230" }, 104 { 0x8086, IWN_DID_x030_4, "Intel Centrino Advanced-N 6230" }, 105 { 0x8086, IWN_DID_6150_1, "Intel Centrino Wireless-N + WiMAX 6150" }, 106 { 0x8086, IWN_DID_6150_2, "Intel Centrino Wireless-N + WiMAX 6150" }, 107 { 0x8086, IWN_DID_2x00_1, "Intel(R) Centrino(R) Wireless-N 2200 BGN" }, 108 { 0x8086, IWN_DID_2x00_2, "Intel(R) Centrino(R) Wireless-N 2200 BGN" }, 109 /* XXX 2200D is IWN_SDID_2x00_4; there's no way to express this here! */ 110 { 0x8086, IWN_DID_2x30_1, "Intel Centrino Wireless-N 2230" }, 111 { 0x8086, IWN_DID_2x30_2, "Intel Centrino Wireless-N 2230" }, 112 { 0x8086, IWN_DID_130_1, "Intel Centrino Wireless-N 130" }, 113 { 0x8086, IWN_DID_130_2, "Intel Centrino Wireless-N 130" }, 114 { 0x8086, IWN_DID_100_1, "Intel Centrino Wireless-N 100" }, 115 { 0x8086, IWN_DID_100_2, "Intel Centrino Wireless-N 100" }, 116 { 0x8086, IWN_DID_105_1, "Intel Centrino Wireless-N 105" }, 117 { 0x8086, IWN_DID_105_2, "Intel Centrino Wireless-N 105" }, 118 { 0x8086, IWN_DID_135_1, "Intel Centrino Wireless-N 135" }, 119 { 0x8086, IWN_DID_135_2, "Intel Centrino Wireless-N 135" }, 120 { 0x8086, IWN_DID_4965_1, "Intel Wireless WiFi Link 4965" }, 121 { 0x8086, IWN_DID_6x00_1, "Intel Centrino Ultimate-N 6300" }, 122 { 0x8086, IWN_DID_6x00_2, "Intel Centrino Advanced-N 6200" }, 123 { 0x8086, IWN_DID_4965_2, "Intel Wireless WiFi Link 4965" }, 124 { 0x8086, IWN_DID_4965_3, "Intel Wireless WiFi Link 4965" }, 125 { 0x8086, IWN_DID_5x00_1, "Intel WiFi Link 5100" }, 126 { 0x8086, IWN_DID_4965_4, "Intel Wireless WiFi Link 4965" }, 127 { 0x8086, IWN_DID_5x00_3, "Intel Ultimate N WiFi Link 5300" }, 128 { 0x8086, IWN_DID_5x00_4, "Intel Ultimate N WiFi Link 5300" }, 129 { 0x8086, IWN_DID_5x00_2, "Intel WiFi Link 5100" }, 130 { 0x8086, IWN_DID_6x00_3, "Intel Centrino Ultimate-N 6300" }, 131 { 0x8086, IWN_DID_6x00_4, "Intel Centrino Advanced-N 6200" }, 132 { 0x8086, IWN_DID_5x50_1, "Intel WiMAX/WiFi Link 5350" }, 133 { 0x8086, IWN_DID_5x50_2, "Intel WiMAX/WiFi Link 5350" }, 134 { 0x8086, IWN_DID_5x50_3, "Intel WiMAX/WiFi Link 5150" }, 135 { 0x8086, IWN_DID_5x50_4, "Intel WiMAX/WiFi Link 5150" }, 136 { 0x8086, IWN_DID_6035_1, "Intel Centrino Advanced 6235" }, 137 { 0x8086, IWN_DID_6035_2, "Intel Centrino Advanced 6235" }, 138 { 0, 0, NULL } 139 }; 140 141 static int iwn_pci_probe(device_t); 142 static int iwn_pci_attach(device_t); 143 static int iwn4965_attach(struct iwn_softc *, uint16_t); 144 static int iwn5000_attach(struct iwn_softc *, uint16_t); 145 static int iwn_config_specific(struct iwn_softc *, uint16_t); 146 static void iwn_radiotap_attach(struct iwn_softc *); 147 static void iwn_sysctlattach(struct iwn_softc *); 148 static struct ieee80211vap *iwn_vap_create(struct ieee80211com *, 149 const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 150 const uint8_t [IEEE80211_ADDR_LEN], 151 const uint8_t [IEEE80211_ADDR_LEN]); 152 static void iwn_vap_delete(struct ieee80211vap *); 153 static int iwn_pci_detach(device_t); 154 static int iwn_pci_shutdown(device_t); 155 static int iwn_pci_suspend(device_t); 156 static int iwn_pci_resume(device_t); 157 static int iwn_nic_lock(struct iwn_softc *); 158 static int iwn_eeprom_lock(struct iwn_softc *); 159 static int iwn_init_otprom(struct iwn_softc *); 160 static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int); 161 static void iwn_dma_map_addr(void *, bus_dma_segment_t *, int, int); 162 static int iwn_dma_contig_alloc(struct iwn_softc *, struct iwn_dma_info *, 163 void **, bus_size_t, bus_size_t); 164 static void iwn_dma_contig_free(struct iwn_dma_info *); 165 static int iwn_alloc_sched(struct iwn_softc *); 166 static void iwn_free_sched(struct iwn_softc *); 167 static int iwn_alloc_kw(struct iwn_softc *); 168 static void iwn_free_kw(struct iwn_softc *); 169 static int iwn_alloc_ict(struct iwn_softc *); 170 static void iwn_free_ict(struct iwn_softc *); 171 static int iwn_alloc_fwmem(struct iwn_softc *); 172 static void iwn_free_fwmem(struct iwn_softc *); 173 static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *); 174 static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *); 175 static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *); 176 static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *, 177 int); 178 static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *); 179 static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *); 180 static void iwn5000_ict_reset(struct iwn_softc *); 181 static int iwn_read_eeprom(struct iwn_softc *, 182 uint8_t macaddr[IEEE80211_ADDR_LEN]); 183 static void iwn4965_read_eeprom(struct iwn_softc *); 184 #ifdef IWN_DEBUG 185 static void iwn4965_print_power_group(struct iwn_softc *, int); 186 #endif 187 static void iwn5000_read_eeprom(struct iwn_softc *); 188 static uint32_t iwn_eeprom_channel_flags(struct iwn_eeprom_chan *); 189 static void iwn_read_eeprom_band(struct iwn_softc *, int); 190 static void iwn_read_eeprom_ht40(struct iwn_softc *, int); 191 static void iwn_read_eeprom_channels(struct iwn_softc *, int, uint32_t); 192 static struct iwn_eeprom_chan *iwn_find_eeprom_channel(struct iwn_softc *, 193 struct ieee80211_channel *); 194 static int iwn_setregdomain(struct ieee80211com *, 195 struct ieee80211_regdomain *, int, 196 struct ieee80211_channel[]); 197 static void iwn_read_eeprom_enhinfo(struct iwn_softc *); 198 static struct ieee80211_node *iwn_node_alloc(struct ieee80211vap *, 199 const uint8_t mac[IEEE80211_ADDR_LEN]); 200 static void iwn_newassoc(struct ieee80211_node *, int); 201 static int iwn_media_change(struct ifnet *); 202 static int iwn_newstate(struct ieee80211vap *, enum ieee80211_state, int); 203 static void iwn_calib_timeout(void *); 204 static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *, 205 struct iwn_rx_data *); 206 static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *, 207 struct iwn_rx_data *); 208 static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *, 209 struct iwn_rx_data *); 210 static void iwn5000_rx_calib_results(struct iwn_softc *, 211 struct iwn_rx_desc *, struct iwn_rx_data *); 212 static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *, 213 struct iwn_rx_data *); 214 static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *, 215 struct iwn_rx_data *); 216 static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *, 217 struct iwn_rx_data *); 218 static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int, 219 uint8_t); 220 static void iwn_ampdu_tx_done(struct iwn_softc *, int, int, int, void *); 221 static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *); 222 static void iwn_notif_intr(struct iwn_softc *); 223 static void iwn_wakeup_intr(struct iwn_softc *); 224 static void iwn_rftoggle_intr(struct iwn_softc *); 225 static void iwn_fatal_intr(struct iwn_softc *); 226 static void iwn_intr(void *); 227 static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t, 228 uint16_t); 229 static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t, 230 uint16_t); 231 #ifdef notyet 232 static void iwn5000_reset_sched(struct iwn_softc *, int, int); 233 #endif 234 static int iwn_tx_data(struct iwn_softc *, struct mbuf *, 235 struct ieee80211_node *); 236 static int iwn_tx_data_raw(struct iwn_softc *, struct mbuf *, 237 struct ieee80211_node *, 238 const struct ieee80211_bpf_params *params); 239 static int iwn_raw_xmit(struct ieee80211_node *, struct mbuf *, 240 const struct ieee80211_bpf_params *); 241 static void iwn_start(struct ifnet *, struct ifaltq_subque *); 242 static void iwn_start_locked(struct ifnet *); 243 static void iwn_watchdog_timeout(void *); 244 static int iwn_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *); 245 static int iwn_cmd(struct iwn_softc *, int, const void *, int, int); 246 static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *, 247 int); 248 static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *, 249 int); 250 static int iwn_set_link_quality(struct iwn_softc *, 251 struct ieee80211_node *); 252 static int iwn_add_broadcast_node(struct iwn_softc *, int); 253 static int iwn_updateedca(struct ieee80211com *); 254 static void iwn_update_mcast(struct ifnet *); 255 static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t); 256 static int iwn_set_critical_temp(struct iwn_softc *); 257 static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *); 258 static void iwn4965_power_calibration(struct iwn_softc *, int); 259 static int iwn4965_set_txpower(struct iwn_softc *, 260 struct ieee80211_channel *, int); 261 static int iwn5000_set_txpower(struct iwn_softc *, 262 struct ieee80211_channel *, int); 263 static int iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *); 264 static int iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *); 265 static int iwn_get_noise(const struct iwn_rx_general_stats *); 266 static int iwn4965_get_temperature(struct iwn_softc *); 267 static int iwn5000_get_temperature(struct iwn_softc *); 268 static int iwn_init_sensitivity(struct iwn_softc *); 269 static void iwn_collect_noise(struct iwn_softc *, 270 const struct iwn_rx_general_stats *); 271 static int iwn4965_init_gains(struct iwn_softc *); 272 static int iwn5000_init_gains(struct iwn_softc *); 273 static int iwn4965_set_gains(struct iwn_softc *); 274 static int iwn5000_set_gains(struct iwn_softc *); 275 static void iwn_tune_sensitivity(struct iwn_softc *, 276 const struct iwn_rx_stats *); 277 static void iwn_save_stats_counters(struct iwn_softc *, 278 const struct iwn_stats *); 279 static int iwn_send_sensitivity(struct iwn_softc *); 280 static void iwn_check_rx_recovery(struct iwn_softc *, struct iwn_stats *); 281 static int iwn_set_pslevel(struct iwn_softc *, int, int, int); 282 static int iwn_send_btcoex(struct iwn_softc *); 283 static int iwn_send_advanced_btcoex(struct iwn_softc *); 284 static int iwn5000_runtime_calib(struct iwn_softc *); 285 static int iwn_config(struct iwn_softc *); 286 static uint8_t *ieee80211_add_ssid(uint8_t *, const uint8_t *, u_int); 287 static int iwn_scan(struct iwn_softc *, struct ieee80211vap *, 288 struct ieee80211_scan_state *, struct ieee80211_channel *); 289 static int iwn_auth(struct iwn_softc *, struct ieee80211vap *vap); 290 static int iwn_run(struct iwn_softc *, struct ieee80211vap *vap); 291 static int iwn_ampdu_rx_start(struct ieee80211_node *, 292 struct ieee80211_rx_ampdu *, int, int, int); 293 static void iwn_ampdu_rx_stop(struct ieee80211_node *, 294 struct ieee80211_rx_ampdu *); 295 static int iwn_addba_request(struct ieee80211_node *, 296 struct ieee80211_tx_ampdu *, int, int, int); 297 static int iwn_addba_response(struct ieee80211_node *, 298 struct ieee80211_tx_ampdu *, int, int, int); 299 static int iwn_ampdu_tx_start(struct ieee80211com *, 300 struct ieee80211_node *, uint8_t); 301 static void iwn_ampdu_tx_stop(struct ieee80211_node *, 302 struct ieee80211_tx_ampdu *); 303 static void iwn4965_ampdu_tx_start(struct iwn_softc *, 304 struct ieee80211_node *, int, uint8_t, uint16_t); 305 static void iwn4965_ampdu_tx_stop(struct iwn_softc *, int, 306 uint8_t, uint16_t); 307 static void iwn5000_ampdu_tx_start(struct iwn_softc *, 308 struct ieee80211_node *, int, uint8_t, uint16_t); 309 static void iwn5000_ampdu_tx_stop(struct iwn_softc *, int, 310 uint8_t, uint16_t); 311 static int iwn5000_query_calibration(struct iwn_softc *); 312 static int iwn5000_send_calibration(struct iwn_softc *); 313 static int iwn5000_send_wimax_coex(struct iwn_softc *); 314 static int iwn5000_crystal_calib(struct iwn_softc *); 315 static int iwn5000_temp_offset_calib(struct iwn_softc *); 316 static int iwn5000_temp_offset_calibv2(struct iwn_softc *); 317 static int iwn4965_post_alive(struct iwn_softc *); 318 static int iwn5000_post_alive(struct iwn_softc *); 319 static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *, 320 int); 321 static int iwn4965_load_firmware(struct iwn_softc *); 322 static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t, 323 const uint8_t *, int); 324 static int iwn5000_load_firmware(struct iwn_softc *); 325 static int iwn_read_firmware_leg(struct iwn_softc *, 326 struct iwn_fw_info *); 327 static int iwn_read_firmware_tlv(struct iwn_softc *, 328 struct iwn_fw_info *, uint16_t); 329 static int iwn_read_firmware(struct iwn_softc *); 330 static int iwn_clock_wait(struct iwn_softc *); 331 static int iwn_apm_init(struct iwn_softc *); 332 static void iwn_apm_stop_master(struct iwn_softc *); 333 static void iwn_apm_stop(struct iwn_softc *); 334 static int iwn4965_nic_config(struct iwn_softc *); 335 static int iwn5000_nic_config(struct iwn_softc *); 336 static int iwn_hw_prepare(struct iwn_softc *); 337 static int iwn_hw_init(struct iwn_softc *); 338 static void iwn_hw_stop(struct iwn_softc *); 339 static void iwn_radio_on_task(void *, int); 340 static void iwn_radio_off_task(void *, int); 341 static void iwn_panicked_task(void *, int); 342 static void iwn_init_locked(struct iwn_softc *); 343 static void iwn_init(void *); 344 static void iwn_stop_locked(struct iwn_softc *); 345 static void iwn_scan_start(struct ieee80211com *); 346 static void iwn_scan_end(struct ieee80211com *); 347 static void iwn_set_channel(struct ieee80211com *); 348 static void iwn_scan_curchan(struct ieee80211_scan_state *, unsigned long); 349 static void iwn_scan_mindwell(struct ieee80211_scan_state *); 350 static void iwn_hw_reset_task(void *, int); 351 #ifdef IWN_DEBUG 352 static char *iwn_get_csr_string(int); 353 static void iwn_debug_register(struct iwn_softc *); 354 #endif 355 356 static device_method_t iwn_methods[] = { 357 /* Device interface */ 358 DEVMETHOD(device_probe, iwn_pci_probe), 359 DEVMETHOD(device_attach, iwn_pci_attach), 360 DEVMETHOD(device_detach, iwn_pci_detach), 361 DEVMETHOD(device_shutdown, iwn_pci_shutdown), 362 DEVMETHOD(device_suspend, iwn_pci_suspend), 363 DEVMETHOD(device_resume, iwn_pci_resume), 364 365 DEVMETHOD_END 366 }; 367 368 static driver_t iwn_driver = { 369 "iwn", 370 iwn_methods, 371 sizeof(struct iwn_softc) 372 }; 373 static devclass_t iwn_devclass; 374 375 DRIVER_MODULE(iwn, pci, iwn_driver, iwn_devclass, NULL, NULL); 376 377 MODULE_VERSION(iwn, 1); 378 379 MODULE_DEPEND(iwn, firmware, 1, 1, 1); 380 MODULE_DEPEND(iwn, pci, 1, 1, 1); 381 MODULE_DEPEND(iwn, wlan, 1, 1, 1); 382 MODULE_DEPEND(iwn, wlan_amrr, 1, 1, 1); 383 384 static int 385 iwn_pci_probe(device_t dev) 386 { 387 const struct iwn_ident *ident; 388 389 /* no wlan serializer needed */ 390 for (ident = iwn_ident_table; ident->name != NULL; ident++) { 391 if (pci_get_vendor(dev) == ident->vendor && 392 pci_get_device(dev) == ident->device) { 393 device_set_desc(dev, ident->name); 394 return (BUS_PROBE_DEFAULT); 395 } 396 } 397 return ENXIO; 398 } 399 400 static int 401 iwn_pci_attach(device_t dev) 402 { 403 struct iwn_softc *sc = (struct iwn_softc *)device_get_softc(dev); 404 struct ieee80211com *ic; 405 struct ifnet *ifp; 406 int i, error, rid; 407 uint8_t macaddr[IEEE80211_ADDR_LEN]; 408 char ethstr[ETHER_ADDRSTRLEN + 1]; 409 410 wlan_serialize_enter(); 411 412 sc->sc_dev = dev; 413 sc->sc_dmat = NULL; 414 415 if (bus_dma_tag_create(sc->sc_dmat, 416 1, 0, 417 BUS_SPACE_MAXADDR_32BIT, 418 BUS_SPACE_MAXADDR, 419 NULL, NULL, 420 BUS_SPACE_MAXSIZE, 421 IWN_MAX_SCATTER, 422 BUS_SPACE_MAXSIZE, 423 BUS_DMA_ALLOCNOW, 424 &sc->sc_dmat)) { 425 device_printf(dev, "cannot allocate DMA tag\n"); 426 error = ENOMEM; 427 goto fail; 428 } 429 430 #ifdef IWN_DEBUG 431 error = resource_int_value(device_get_name(sc->sc_dev), 432 device_get_unit(sc->sc_dev), "debug", &(sc->sc_debug)); 433 if (error != 0) 434 sc->sc_debug = 0; 435 #else 436 sc->sc_debug = 0; 437 #endif 438 439 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: begin\n",__func__); 440 441 /* 442 * Get the offset of the PCI Express Capability Structure in PCI 443 * Configuration Space. 444 */ 445 error = pci_find_extcap(dev, PCIY_EXPRESS, &sc->sc_cap_off); 446 if (error != 0) { 447 device_printf(dev, "PCIe capability structure not found!\n"); 448 goto fail2; 449 } 450 451 /* Clear device-specific "PCI retry timeout" register (41h). */ 452 pci_write_config(dev, 0x41, 0, 1); 453 454 /* Enable bus-mastering. */ 455 pci_enable_busmaster(dev); 456 457 rid = PCIR_BAR(0); 458 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 459 RF_ACTIVE); 460 if (sc->mem == NULL) { 461 device_printf(dev, "can't map mem space\n"); 462 error = ENOMEM; 463 goto fail2; 464 } 465 sc->sc_st = rman_get_bustag(sc->mem); 466 sc->sc_sh = rman_get_bushandle(sc->mem); 467 468 rid = 0; 469 #ifdef OLD_MSI 470 i = 1; 471 if (pci_alloc_msi(dev, &i) == 0) 472 rid = 1; 473 #endif 474 /* Install interrupt handler. */ 475 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | 476 (rid != 0 ? 0 : RF_SHAREABLE)); 477 if (sc->irq == NULL) { 478 device_printf(dev, "can't map interrupt\n"); 479 error = ENOMEM; 480 goto fail; 481 } 482 483 /* Read hardware revision and attach. */ 484 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> IWN_HW_REV_TYPE_SHIFT) 485 & IWN_HW_REV_TYPE_MASK; 486 sc->subdevice_id = pci_get_subdevice(dev); 487 /* 488 * 4965 versus 5000 and later have different methods. 489 * Let's set those up first. 490 */ 491 if (sc->hw_type == IWN_HW_REV_TYPE_4965) 492 error = iwn4965_attach(sc, pci_get_device(dev)); 493 else 494 error = iwn5000_attach(sc, pci_get_device(dev)); 495 if (error != 0) { 496 device_printf(dev, "could not attach device, error %d\n", 497 error); 498 goto fail; 499 } 500 501 /* 502 * Next, let's setup the various parameters of each NIC. 503 */ 504 error = iwn_config_specific(sc, pci_get_device(dev)); 505 if (error != 0) { 506 device_printf(dev, "could not attach device, error %d\n", 507 error); 508 goto fail; 509 } 510 511 if ((error = iwn_hw_prepare(sc)) != 0) { 512 device_printf(dev, "hardware not ready, error %d\n", error); 513 goto fail; 514 } 515 516 /* Allocate DMA memory for firmware transfers. */ 517 if ((error = iwn_alloc_fwmem(sc)) != 0) { 518 device_printf(dev, 519 "could not allocate memory for firmware, error %d\n", 520 error); 521 goto fail; 522 } 523 524 /* Allocate "Keep Warm" page. */ 525 if ((error = iwn_alloc_kw(sc)) != 0) { 526 device_printf(dev, 527 "could not allocate keep warm page, error %d\n", error); 528 goto fail; 529 } 530 531 /* Allocate ICT table for 5000 Series. */ 532 if (sc->hw_type != IWN_HW_REV_TYPE_4965 && 533 (error = iwn_alloc_ict(sc)) != 0) { 534 device_printf(dev, "could not allocate ICT table, error %d\n", 535 error); 536 goto fail; 537 } 538 539 /* Allocate TX scheduler "rings". */ 540 if ((error = iwn_alloc_sched(sc)) != 0) { 541 device_printf(dev, 542 "could not allocate TX scheduler rings, error %d\n", error); 543 goto fail; 544 } 545 546 /* Allocate TX rings (16 on 4965AGN, 20 on >=5000). */ 547 for (i = 0; i < sc->ntxqs; i++) { 548 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) { 549 device_printf(dev, 550 "could not allocate TX ring %d, error %d\n", i, 551 error); 552 goto fail; 553 } 554 } 555 556 /* Allocate RX ring. */ 557 if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) { 558 device_printf(dev, "could not allocate RX ring, error %d\n", 559 error); 560 goto fail; 561 } 562 563 /* Clear pending interrupts. */ 564 IWN_WRITE(sc, IWN_INT, 0xffffffff); 565 566 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 567 if (ifp == NULL) { 568 device_printf(dev, "can not allocate ifnet structure\n"); 569 goto fail; 570 } 571 572 ic = ifp->if_l2com; 573 ic->ic_ifp = ifp; 574 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 575 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 576 577 /* Set device capabilities. */ 578 ic->ic_caps = 579 IEEE80211_C_STA /* station mode supported */ 580 | IEEE80211_C_MONITOR /* monitor mode supported */ 581 | IEEE80211_C_BGSCAN /* background scanning */ 582 | IEEE80211_C_TXPMGT /* tx power management */ 583 | IEEE80211_C_SHSLOT /* short slot time supported */ 584 | IEEE80211_C_WPA 585 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 586 #if 0 587 | IEEE80211_C_IBSS /* ibss/adhoc mode */ 588 #endif 589 | IEEE80211_C_WME /* WME */ 590 | IEEE80211_C_PMGT /* Station-side power mgmt */ 591 ; 592 593 /* Read MAC address, channels, etc from EEPROM. */ 594 if ((error = iwn_read_eeprom(sc, macaddr)) != 0) { 595 device_printf(dev, "could not read EEPROM, error %d\n", 596 error); 597 goto fail; 598 } 599 600 /* Count the number of available chains. */ 601 sc->ntxchains = 602 ((sc->txchainmask >> 2) & 1) + 603 ((sc->txchainmask >> 1) & 1) + 604 ((sc->txchainmask >> 0) & 1); 605 sc->nrxchains = 606 ((sc->rxchainmask >> 2) & 1) + 607 ((sc->rxchainmask >> 1) & 1) + 608 ((sc->rxchainmask >> 0) & 1); 609 if (bootverbose) { 610 device_printf(dev, "MIMO %dT%dR, %.4s, address %s\n", 611 sc->ntxchains, sc->nrxchains, sc->eeprom_domain, 612 kether_ntoa(macaddr, ethstr)); 613 } 614 615 if (sc->sc_flags & IWN_FLAG_HAS_11N) { 616 #ifdef notyet 617 ic->ic_rxstream = sc->nrxchains; 618 ic->ic_txstream = sc->ntxchains; 619 #endif 620 621 /* 622 * The NICs we currently support cap out at 2x2 support 623 * separate from the chains being used. 624 * 625 * This is a total hack to work around that until some 626 * per-device method is implemented to return the 627 * actual stream support. 628 * 629 * XXX Note: the 5350 is a 3x3 device; so we shouldn't 630 * cap this! But, anything that touches rates in the 631 * driver needs to be audited first before 3x3 is enabled. 632 */ 633 #ifdef notyet 634 if (ic->ic_rxstream > 2) 635 ic->ic_rxstream = 2; 636 if (ic->ic_txstream > 2) 637 ic->ic_txstream = 2; 638 #endif 639 640 ic->ic_htcaps = 641 IEEE80211_HTCAP_SMPS_OFF /* SMPS mode disabled */ 642 | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */ 643 | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width*/ 644 | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */ 645 #ifdef notyet 646 | IEEE80211_HTCAP_GREENFIELD 647 #if IWN_RBUF_SIZE == 8192 648 | IEEE80211_HTCAP_MAXAMSDU_7935 /* max A-MSDU length */ 649 #else 650 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */ 651 #endif 652 #endif 653 /* s/w capabilities */ 654 | IEEE80211_HTC_HT /* HT operation */ 655 | IEEE80211_HTC_AMPDU /* tx A-MPDU */ 656 #ifdef notyet 657 | IEEE80211_HTC_AMSDU /* tx A-MSDU */ 658 #endif 659 ; 660 } 661 662 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 663 ifp->if_softc = sc; 664 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 665 ifp->if_init = iwn_init; 666 ifp->if_ioctl = iwn_ioctl; 667 ifp->if_start = iwn_start; 668 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN); 669 #ifdef notyet 670 ifq_set_ready(&ifp->if_snd); 671 #endif 672 673 ieee80211_ifattach(ic, macaddr); 674 ic->ic_vap_create = iwn_vap_create; 675 ic->ic_vap_delete = iwn_vap_delete; 676 ic->ic_raw_xmit = iwn_raw_xmit; 677 ic->ic_node_alloc = iwn_node_alloc; 678 sc->sc_ampdu_rx_start = ic->ic_ampdu_rx_start; 679 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start; 680 sc->sc_ampdu_rx_stop = ic->ic_ampdu_rx_stop; 681 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop; 682 sc->sc_addba_request = ic->ic_addba_request; 683 ic->ic_addba_request = iwn_addba_request; 684 sc->sc_addba_response = ic->ic_addba_response; 685 ic->ic_addba_response = iwn_addba_response; 686 sc->sc_addba_stop = ic->ic_addba_stop; 687 ic->ic_addba_stop = iwn_ampdu_tx_stop; 688 ic->ic_newassoc = iwn_newassoc; 689 ic->ic_wme.wme_update = iwn_updateedca; 690 ic->ic_update_mcast = iwn_update_mcast; 691 ic->ic_scan_start = iwn_scan_start; 692 ic->ic_scan_end = iwn_scan_end; 693 ic->ic_set_channel = iwn_set_channel; 694 ic->ic_scan_curchan = iwn_scan_curchan; 695 ic->ic_scan_mindwell = iwn_scan_mindwell; 696 ic->ic_setregdomain = iwn_setregdomain; 697 698 iwn_radiotap_attach(sc); 699 700 callout_init(&sc->calib_to); 701 callout_init(&sc->watchdog_to); 702 TASK_INIT(&sc->sc_reinit_task, 0, iwn_hw_reset_task, sc); 703 TASK_INIT(&sc->sc_radioon_task, 0, iwn_radio_on_task, sc); 704 TASK_INIT(&sc->sc_radiooff_task, 0, iwn_radio_off_task, sc); 705 TASK_INIT(&sc->sc_panic_task, 0, iwn_panicked_task, sc); 706 707 sc->sc_tq = taskqueue_create("iwn_taskq", M_WAITOK, 708 taskqueue_thread_enqueue, &sc->sc_tq); 709 error = taskqueue_start_threads(&sc->sc_tq, 1, TDPRI_KERN_DAEMON, -1, 710 "iwn_taskq"); 711 if (error != 0) { 712 device_printf(dev, "can't start threads, error %d\n", error); 713 goto fail; 714 } 715 716 iwn_sysctlattach(sc); 717 718 /* 719 * Hook our interrupt after all initialization is complete. 720 */ 721 error = bus_setup_intr(dev, sc->irq, INTR_MPSAFE, 722 iwn_intr, sc, &sc->sc_ih, 723 &wlan_global_serializer); 724 if (error != 0) { 725 device_printf(dev, "can't establish interrupt, error %d\n", 726 error); 727 goto fail; 728 } 729 730 #if 0 731 device_printf(sc->sc_dev, "%s: rx_stats=%d, rx_stats_bt=%d\n", 732 __func__, 733 sizeof(struct iwn_stats), 734 sizeof(struct iwn_stats_bt)); 735 #endif 736 737 if (bootverbose) 738 ieee80211_announce(ic); 739 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 740 wlan_serialize_exit(); 741 return 0; 742 fail: 743 wlan_serialize_exit(); 744 iwn_pci_detach(dev); 745 wlan_serialize_enter(); 746 fail2: 747 wlan_serialize_exit(); 748 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__); 749 return error; 750 } 751 752 /* 753 * Define specific configuration based on device id and subdevice id 754 * pid : PCI device id 755 */ 756 static int 757 iwn_config_specific(struct iwn_softc *sc, uint16_t pid) 758 { 759 760 switch (pid) { 761 /* 4965 series */ 762 case IWN_DID_4965_1: 763 case IWN_DID_4965_2: 764 case IWN_DID_4965_3: 765 case IWN_DID_4965_4: 766 sc->base_params = &iwn4965_base_params; 767 sc->limits = &iwn4965_sensitivity_limits; 768 sc->fwname = "iwn4965fw"; 769 /* Override chains masks, ROM is known to be broken. */ 770 sc->txchainmask = IWN_ANT_AB; 771 sc->rxchainmask = IWN_ANT_ABC; 772 /* Enable normal btcoex */ 773 sc->sc_flags |= IWN_FLAG_BTCOEX; 774 break; 775 /* 1000 Series */ 776 case IWN_DID_1000_1: 777 case IWN_DID_1000_2: 778 switch(sc->subdevice_id) { 779 case IWN_SDID_1000_1: 780 case IWN_SDID_1000_2: 781 case IWN_SDID_1000_3: 782 case IWN_SDID_1000_4: 783 case IWN_SDID_1000_5: 784 case IWN_SDID_1000_6: 785 case IWN_SDID_1000_7: 786 case IWN_SDID_1000_8: 787 case IWN_SDID_1000_9: 788 case IWN_SDID_1000_10: 789 case IWN_SDID_1000_11: 790 case IWN_SDID_1000_12: 791 sc->limits = &iwn1000_sensitivity_limits; 792 sc->base_params = &iwn1000_base_params; 793 sc->fwname = "iwn1000fw"; 794 break; 795 default: 796 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" 797 "0x%04x rev %d not supported (subdevice)\n", pid, 798 sc->subdevice_id,sc->hw_type); 799 return ENOTSUP; 800 } 801 break; 802 /* 6x00 Series */ 803 case IWN_DID_6x00_2: 804 case IWN_DID_6x00_4: 805 case IWN_DID_6x00_1: 806 case IWN_DID_6x00_3: 807 sc->fwname = "iwn6000fw"; 808 sc->limits = &iwn6000_sensitivity_limits; 809 switch(sc->subdevice_id) { 810 case IWN_SDID_6x00_1: 811 case IWN_SDID_6x00_2: 812 case IWN_SDID_6x00_8: 813 //iwl6000_3agn_cfg 814 sc->base_params = &iwn_6000_base_params; 815 break; 816 case IWN_SDID_6x00_3: 817 case IWN_SDID_6x00_6: 818 case IWN_SDID_6x00_9: 819 ////iwl6000i_2agn 820 case IWN_SDID_6x00_4: 821 case IWN_SDID_6x00_7: 822 case IWN_SDID_6x00_10: 823 //iwl6000i_2abg_cfg 824 case IWN_SDID_6x00_5: 825 //iwl6000i_2bg_cfg 826 sc->base_params = &iwn_6000i_base_params; 827 sc->sc_flags |= IWN_FLAG_INTERNAL_PA; 828 sc->txchainmask = IWN_ANT_BC; 829 sc->rxchainmask = IWN_ANT_BC; 830 break; 831 default: 832 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" 833 "0x%04x rev %d not supported (subdevice)\n", pid, 834 sc->subdevice_id,sc->hw_type); 835 return ENOTSUP; 836 } 837 break; 838 /* 6x05 Series */ 839 case IWN_DID_6x05_1: 840 case IWN_DID_6x05_2: 841 switch(sc->subdevice_id) { 842 case IWN_SDID_6x05_1: 843 case IWN_SDID_6x05_4: 844 case IWN_SDID_6x05_6: 845 //iwl6005_2agn_cfg 846 case IWN_SDID_6x05_2: 847 case IWN_SDID_6x05_5: 848 case IWN_SDID_6x05_7: 849 //iwl6005_2abg_cfg 850 case IWN_SDID_6x05_3: 851 //iwl6005_2bg_cfg 852 case IWN_SDID_6x05_8: 853 case IWN_SDID_6x05_9: 854 //iwl6005_2agn_sff_cfg 855 case IWN_SDID_6x05_10: 856 //iwl6005_2agn_d_cfg 857 case IWN_SDID_6x05_11: 858 //iwl6005_2agn_mow1_cfg 859 case IWN_SDID_6x05_12: 860 //iwl6005_2agn_mow2_cfg 861 sc->fwname = "iwn6000g2afw"; 862 sc->limits = &iwn6000_sensitivity_limits; 863 sc->base_params = &iwn_6000g2_base_params; 864 break; 865 default: 866 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" 867 "0x%04x rev %d not supported (subdevice)\n", pid, 868 sc->subdevice_id,sc->hw_type); 869 return ENOTSUP; 870 } 871 break; 872 /* 6x35 Series */ 873 case IWN_DID_6035_1: 874 case IWN_DID_6035_2: 875 switch(sc->subdevice_id) { 876 case IWN_SDID_6035_1: 877 case IWN_SDID_6035_2: 878 case IWN_SDID_6035_3: 879 case IWN_SDID_6035_4: 880 sc->fwname = "iwn6000g2bfw"; 881 sc->limits = &iwn6235_sensitivity_limits; 882 sc->base_params = &iwn_6235_base_params; 883 break; 884 default: 885 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" 886 "0x%04x rev %d not supported (subdevice)\n", pid, 887 sc->subdevice_id,sc->hw_type); 888 return ENOTSUP; 889 } 890 break; 891 /* 6x50 WiFi/WiMax Series */ 892 case IWN_DID_6050_1: 893 case IWN_DID_6050_2: 894 switch(sc->subdevice_id) { 895 case IWN_SDID_6050_1: 896 case IWN_SDID_6050_3: 897 case IWN_SDID_6050_5: 898 //iwl6050_2agn_cfg 899 case IWN_SDID_6050_2: 900 case IWN_SDID_6050_4: 901 case IWN_SDID_6050_6: 902 //iwl6050_2abg_cfg 903 sc->fwname = "iwn6050fw"; 904 sc->txchainmask = IWN_ANT_AB; 905 sc->rxchainmask = IWN_ANT_AB; 906 sc->limits = &iwn6000_sensitivity_limits; 907 sc->base_params = &iwn_6050_base_params; 908 break; 909 default: 910 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" 911 "0x%04x rev %d not supported (subdevice)\n", pid, 912 sc->subdevice_id,sc->hw_type); 913 return ENOTSUP; 914 } 915 break; 916 /* 6150 WiFi/WiMax Series */ 917 case IWN_DID_6150_1: 918 case IWN_DID_6150_2: 919 switch(sc->subdevice_id) { 920 case IWN_SDID_6150_1: 921 case IWN_SDID_6150_3: 922 case IWN_SDID_6150_5: 923 // iwl6150_bgn_cfg 924 case IWN_SDID_6150_2: 925 case IWN_SDID_6150_4: 926 case IWN_SDID_6150_6: 927 //iwl6150_bg_cfg 928 sc->fwname = "iwn6050fw"; 929 sc->limits = &iwn6000_sensitivity_limits; 930 sc->base_params = &iwn_6150_base_params; 931 break; 932 default: 933 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" 934 "0x%04x rev %d not supported (subdevice)\n", pid, 935 sc->subdevice_id,sc->hw_type); 936 return ENOTSUP; 937 } 938 break; 939 /* 6030 Series and 1030 Series */ 940 case IWN_DID_x030_1: 941 case IWN_DID_x030_2: 942 case IWN_DID_x030_3: 943 case IWN_DID_x030_4: 944 switch(sc->subdevice_id) { 945 case IWN_SDID_x030_1: 946 case IWN_SDID_x030_3: 947 case IWN_SDID_x030_5: 948 // iwl1030_bgn_cfg 949 case IWN_SDID_x030_2: 950 case IWN_SDID_x030_4: 951 case IWN_SDID_x030_6: 952 //iwl1030_bg_cfg 953 case IWN_SDID_x030_7: 954 case IWN_SDID_x030_10: 955 case IWN_SDID_x030_14: 956 //iwl6030_2agn_cfg 957 case IWN_SDID_x030_8: 958 case IWN_SDID_x030_11: 959 case IWN_SDID_x030_15: 960 // iwl6030_2bgn_cfg 961 case IWN_SDID_x030_9: 962 case IWN_SDID_x030_12: 963 case IWN_SDID_x030_16: 964 // iwl6030_2abg_cfg 965 case IWN_SDID_x030_13: 966 //iwl6030_2bg_cfg 967 sc->fwname = "iwn6000g2bfw"; 968 sc->limits = &iwn6000_sensitivity_limits; 969 sc->base_params = &iwn_6000g2b_base_params; 970 break; 971 default: 972 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" 973 "0x%04x rev %d not supported (subdevice)\n", pid, 974 sc->subdevice_id,sc->hw_type); 975 return ENOTSUP; 976 } 977 break; 978 /* 130 Series WiFi */ 979 /* XXX: This series will need adjustment for rate. 980 * see rx_with_siso_diversity in linux kernel 981 */ 982 case IWN_DID_130_1: 983 case IWN_DID_130_2: 984 switch(sc->subdevice_id) { 985 case IWN_SDID_130_1: 986 case IWN_SDID_130_3: 987 case IWN_SDID_130_5: 988 //iwl130_bgn_cfg 989 case IWN_SDID_130_2: 990 case IWN_SDID_130_4: 991 case IWN_SDID_130_6: 992 //iwl130_bg_cfg 993 sc->fwname = "iwn6000g2bfw"; 994 sc->limits = &iwn6000_sensitivity_limits; 995 sc->base_params = &iwn_6000g2b_base_params; 996 break; 997 default: 998 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" 999 "0x%04x rev %d not supported (subdevice)\n", pid, 1000 sc->subdevice_id,sc->hw_type); 1001 return ENOTSUP; 1002 } 1003 break; 1004 /* 100 Series WiFi */ 1005 case IWN_DID_100_1: 1006 case IWN_DID_100_2: 1007 switch(sc->subdevice_id) { 1008 case IWN_SDID_100_1: 1009 case IWN_SDID_100_2: 1010 case IWN_SDID_100_3: 1011 case IWN_SDID_100_4: 1012 case IWN_SDID_100_5: 1013 case IWN_SDID_100_6: 1014 sc->limits = &iwn1000_sensitivity_limits; 1015 sc->base_params = &iwn1000_base_params; 1016 sc->fwname = "iwn100fw"; 1017 break; 1018 default: 1019 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" 1020 "0x%04x rev %d not supported (subdevice)\n", pid, 1021 sc->subdevice_id,sc->hw_type); 1022 return ENOTSUP; 1023 } 1024 break; 1025 1026 /* 105 Series */ 1027 /* XXX: This series will need adjustment for rate. 1028 * see rx_with_siso_diversity in linux kernel 1029 */ 1030 case IWN_DID_105_1: 1031 case IWN_DID_105_2: 1032 switch(sc->subdevice_id) { 1033 case IWN_SDID_105_1: 1034 case IWN_SDID_105_2: 1035 case IWN_SDID_105_3: 1036 //iwl105_bgn_cfg 1037 case IWN_SDID_105_4: 1038 //iwl105_bgn_d_cfg 1039 sc->limits = &iwn2030_sensitivity_limits; 1040 sc->base_params = &iwn2000_base_params; 1041 sc->fwname = "iwn105fw"; 1042 break; 1043 default: 1044 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" 1045 "0x%04x rev %d not supported (subdevice)\n", pid, 1046 sc->subdevice_id,sc->hw_type); 1047 return ENOTSUP; 1048 } 1049 break; 1050 1051 /* 135 Series */ 1052 /* XXX: This series will need adjustment for rate. 1053 * see rx_with_siso_diversity in linux kernel 1054 */ 1055 case IWN_DID_135_1: 1056 case IWN_DID_135_2: 1057 switch(sc->subdevice_id) { 1058 case IWN_SDID_135_1: 1059 case IWN_SDID_135_2: 1060 case IWN_SDID_135_3: 1061 sc->limits = &iwn2030_sensitivity_limits; 1062 sc->base_params = &iwn2030_base_params; 1063 sc->fwname = "iwn135fw"; 1064 break; 1065 default: 1066 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" 1067 "0x%04x rev %d not supported (subdevice)\n", pid, 1068 sc->subdevice_id,sc->hw_type); 1069 return ENOTSUP; 1070 } 1071 break; 1072 1073 /* 2x00 Series */ 1074 case IWN_DID_2x00_1: 1075 case IWN_DID_2x00_2: 1076 switch(sc->subdevice_id) { 1077 case IWN_SDID_2x00_1: 1078 case IWN_SDID_2x00_2: 1079 case IWN_SDID_2x00_3: 1080 //iwl2000_2bgn_cfg 1081 case IWN_SDID_2x00_4: 1082 //iwl2000_2bgn_d_cfg 1083 sc->limits = &iwn2030_sensitivity_limits; 1084 sc->base_params = &iwn2000_base_params; 1085 sc->fwname = "iwn2000fw"; 1086 break; 1087 default: 1088 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" 1089 "0x%04x rev %d not supported (subdevice) \n", 1090 pid, sc->subdevice_id, sc->hw_type); 1091 return ENOTSUP; 1092 } 1093 break; 1094 /* 2x30 Series */ 1095 case IWN_DID_2x30_1: 1096 case IWN_DID_2x30_2: 1097 switch(sc->subdevice_id) { 1098 case IWN_SDID_2x30_1: 1099 case IWN_SDID_2x30_3: 1100 case IWN_SDID_2x30_5: 1101 //iwl100_bgn_cfg 1102 case IWN_SDID_2x30_2: 1103 case IWN_SDID_2x30_4: 1104 case IWN_SDID_2x30_6: 1105 //iwl100_bg_cfg 1106 sc->limits = &iwn2030_sensitivity_limits; 1107 sc->base_params = &iwn2030_base_params; 1108 sc->fwname = "iwn2030fw"; 1109 break; 1110 default: 1111 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" 1112 "0x%04x rev %d not supported (subdevice)\n", pid, 1113 sc->subdevice_id,sc->hw_type); 1114 return ENOTSUP; 1115 } 1116 break; 1117 /* 5x00 Series */ 1118 case IWN_DID_5x00_1: 1119 case IWN_DID_5x00_2: 1120 case IWN_DID_5x00_3: 1121 case IWN_DID_5x00_4: 1122 sc->limits = &iwn5000_sensitivity_limits; 1123 sc->base_params = &iwn5000_base_params; 1124 sc->fwname = "iwn5000fw"; 1125 switch(sc->subdevice_id) { 1126 case IWN_SDID_5x00_1: 1127 case IWN_SDID_5x00_2: 1128 case IWN_SDID_5x00_3: 1129 case IWN_SDID_5x00_4: 1130 case IWN_SDID_5x00_9: 1131 case IWN_SDID_5x00_10: 1132 case IWN_SDID_5x00_11: 1133 case IWN_SDID_5x00_12: 1134 case IWN_SDID_5x00_17: 1135 case IWN_SDID_5x00_18: 1136 case IWN_SDID_5x00_19: 1137 case IWN_SDID_5x00_20: 1138 //iwl5100_agn_cfg 1139 sc->txchainmask = IWN_ANT_B; 1140 sc->rxchainmask = IWN_ANT_AB; 1141 break; 1142 case IWN_SDID_5x00_5: 1143 case IWN_SDID_5x00_6: 1144 case IWN_SDID_5x00_13: 1145 case IWN_SDID_5x00_14: 1146 case IWN_SDID_5x00_21: 1147 case IWN_SDID_5x00_22: 1148 //iwl5100_bgn_cfg 1149 sc->txchainmask = IWN_ANT_B; 1150 sc->rxchainmask = IWN_ANT_AB; 1151 break; 1152 case IWN_SDID_5x00_7: 1153 case IWN_SDID_5x00_8: 1154 case IWN_SDID_5x00_15: 1155 case IWN_SDID_5x00_16: 1156 case IWN_SDID_5x00_23: 1157 case IWN_SDID_5x00_24: 1158 //iwl5100_abg_cfg 1159 sc->txchainmask = IWN_ANT_B; 1160 sc->rxchainmask = IWN_ANT_AB; 1161 break; 1162 case IWN_SDID_5x00_25: 1163 case IWN_SDID_5x00_26: 1164 case IWN_SDID_5x00_27: 1165 case IWN_SDID_5x00_28: 1166 case IWN_SDID_5x00_29: 1167 case IWN_SDID_5x00_30: 1168 case IWN_SDID_5x00_31: 1169 case IWN_SDID_5x00_32: 1170 case IWN_SDID_5x00_33: 1171 case IWN_SDID_5x00_34: 1172 case IWN_SDID_5x00_35: 1173 case IWN_SDID_5x00_36: 1174 //iwl5300_agn_cfg 1175 sc->txchainmask = IWN_ANT_ABC; 1176 sc->rxchainmask = IWN_ANT_ABC; 1177 break; 1178 default: 1179 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" 1180 "0x%04x rev %d not supported (subdevice)\n", pid, 1181 sc->subdevice_id,sc->hw_type); 1182 return ENOTSUP; 1183 } 1184 break; 1185 /* 5x50 Series */ 1186 case IWN_DID_5x50_1: 1187 case IWN_DID_5x50_2: 1188 case IWN_DID_5x50_3: 1189 case IWN_DID_5x50_4: 1190 sc->limits = &iwn5000_sensitivity_limits; 1191 sc->base_params = &iwn5000_base_params; 1192 sc->fwname = "iwn5000fw"; 1193 switch(sc->subdevice_id) { 1194 case IWN_SDID_5x50_1: 1195 case IWN_SDID_5x50_2: 1196 case IWN_SDID_5x50_3: 1197 //iwl5350_agn_cfg 1198 sc->limits = &iwn5000_sensitivity_limits; 1199 sc->base_params = &iwn5000_base_params; 1200 sc->fwname = "iwn5000fw"; 1201 break; 1202 case IWN_SDID_5x50_4: 1203 case IWN_SDID_5x50_5: 1204 case IWN_SDID_5x50_8: 1205 case IWN_SDID_5x50_9: 1206 case IWN_SDID_5x50_10: 1207 case IWN_SDID_5x50_11: 1208 //iwl5150_agn_cfg 1209 case IWN_SDID_5x50_6: 1210 case IWN_SDID_5x50_7: 1211 case IWN_SDID_5x50_12: 1212 case IWN_SDID_5x50_13: 1213 //iwl5150_abg_cfg 1214 sc->limits = &iwn5000_sensitivity_limits; 1215 sc->fwname = "iwn5150fw"; 1216 sc->base_params = &iwn_5x50_base_params; 1217 break; 1218 default: 1219 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" 1220 "0x%04x rev %d not supported (subdevice)\n", pid, 1221 sc->subdevice_id,sc->hw_type); 1222 return ENOTSUP; 1223 } 1224 break; 1225 default: 1226 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id : 0x%04x" 1227 "rev 0x%08x not supported (device)\n", pid, sc->subdevice_id, 1228 sc->hw_type); 1229 return ENOTSUP; 1230 } 1231 return 0; 1232 } 1233 1234 static int 1235 iwn4965_attach(struct iwn_softc *sc, uint16_t pid) 1236 { 1237 struct iwn_ops *ops = &sc->ops; 1238 1239 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 1240 ops->load_firmware = iwn4965_load_firmware; 1241 ops->read_eeprom = iwn4965_read_eeprom; 1242 ops->post_alive = iwn4965_post_alive; 1243 ops->nic_config = iwn4965_nic_config; 1244 ops->update_sched = iwn4965_update_sched; 1245 ops->get_temperature = iwn4965_get_temperature; 1246 ops->get_rssi = iwn4965_get_rssi; 1247 ops->set_txpower = iwn4965_set_txpower; 1248 ops->init_gains = iwn4965_init_gains; 1249 ops->set_gains = iwn4965_set_gains; 1250 ops->add_node = iwn4965_add_node; 1251 ops->tx_done = iwn4965_tx_done; 1252 ops->ampdu_tx_start = iwn4965_ampdu_tx_start; 1253 ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop; 1254 sc->ntxqs = IWN4965_NTXQUEUES; 1255 sc->firstaggqueue = IWN4965_FIRSTAGGQUEUE; 1256 sc->ndmachnls = IWN4965_NDMACHNLS; 1257 sc->broadcast_id = IWN4965_ID_BROADCAST; 1258 sc->rxonsz = IWN4965_RXONSZ; 1259 sc->schedsz = IWN4965_SCHEDSZ; 1260 sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ; 1261 sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ; 1262 sc->fwsz = IWN4965_FWSZ; 1263 sc->sched_txfact_addr = IWN4965_SCHED_TXFACT; 1264 sc->limits = &iwn4965_sensitivity_limits; 1265 sc->fwname = "iwn4965fw"; 1266 /* Override chains masks, ROM is known to be broken. */ 1267 sc->txchainmask = IWN_ANT_AB; 1268 sc->rxchainmask = IWN_ANT_ABC; 1269 /* Enable normal btcoex */ 1270 sc->sc_flags |= IWN_FLAG_BTCOEX; 1271 1272 DPRINTF(sc, IWN_DEBUG_TRACE, "%s: end\n",__func__); 1273 1274 return 0; 1275 } 1276 1277 static int 1278 iwn5000_attach(struct iwn_softc *sc, uint16_t pid) 1279 { 1280 struct iwn_ops *ops = &sc->ops; 1281 1282 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 1283 1284 ops->load_firmware = iwn5000_load_firmware; 1285 ops->read_eeprom = iwn5000_read_eeprom; 1286 ops->post_alive = iwn5000_post_alive; 1287 ops->nic_config = iwn5000_nic_config; 1288 ops->update_sched = iwn5000_update_sched; 1289 ops->get_temperature = iwn5000_get_temperature; 1290 ops->get_rssi = iwn5000_get_rssi; 1291 ops->set_txpower = iwn5000_set_txpower; 1292 ops->init_gains = iwn5000_init_gains; 1293 ops->set_gains = iwn5000_set_gains; 1294 ops->add_node = iwn5000_add_node; 1295 ops->tx_done = iwn5000_tx_done; 1296 ops->ampdu_tx_start = iwn5000_ampdu_tx_start; 1297 ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop; 1298 sc->ntxqs = IWN5000_NTXQUEUES; 1299 sc->firstaggqueue = IWN5000_FIRSTAGGQUEUE; 1300 sc->ndmachnls = IWN5000_NDMACHNLS; 1301 sc->broadcast_id = IWN5000_ID_BROADCAST; 1302 sc->rxonsz = IWN5000_RXONSZ; 1303 sc->schedsz = IWN5000_SCHEDSZ; 1304 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ; 1305 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ; 1306 sc->fwsz = IWN5000_FWSZ; 1307 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT; 1308 sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN; 1309 sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN; 1310 1311 return 0; 1312 } 1313 1314 /* 1315 * Attach the interface to 802.11 radiotap. 1316 */ 1317 static void 1318 iwn_radiotap_attach(struct iwn_softc *sc) 1319 { 1320 struct ifnet *ifp = sc->sc_ifp; 1321 struct ieee80211com *ic = ifp->if_l2com; 1322 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 1323 ieee80211_radiotap_attach(ic, 1324 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 1325 IWN_TX_RADIOTAP_PRESENT, 1326 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 1327 IWN_RX_RADIOTAP_PRESENT); 1328 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); 1329 } 1330 1331 static void 1332 iwn_sysctlattach(struct iwn_softc *sc) 1333 { 1334 #ifdef IWN_DEBUG 1335 struct sysctl_ctx_list *ctx; 1336 struct sysctl_oid *tree; 1337 1338 ctx = device_get_sysctl_ctx(sc->sc_dev); 1339 tree = device_get_sysctl_tree(sc->sc_dev); 1340 1341 if (tree) { 1342 device_printf(sc->sc_dev, "can't add sysctl node\n"); 1343 return; 1344 } 1345 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1346 "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug, 1347 "control debugging printfs"); 1348 #endif 1349 } 1350 1351 static struct ieee80211vap * 1352 iwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 1353 enum ieee80211_opmode opmode, int flags, 1354 const uint8_t bssid[IEEE80211_ADDR_LEN], 1355 const uint8_t mac[IEEE80211_ADDR_LEN]) 1356 { 1357 struct iwn_vap *ivp; 1358 struct ieee80211vap *vap; 1359 uint8_t mac1[IEEE80211_ADDR_LEN]; 1360 struct iwn_softc *sc = ic->ic_ifp->if_softc; 1361 1362 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 1363 return NULL; 1364 1365 IEEE80211_ADDR_COPY(mac1, mac); 1366 1367 ivp = kmalloc(sizeof(struct iwn_vap), M_80211_VAP, M_INTWAIT | M_ZERO); 1368 vap = &ivp->iv_vap; 1369 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac1); 1370 ivp->ctx = IWN_RXON_BSS_CTX; 1371 IEEE80211_ADDR_COPY(ivp->macaddr, mac1); 1372 vap->iv_bmissthreshold = 10; /* override default */ 1373 /* Override with driver methods. */ 1374 ivp->iv_newstate = vap->iv_newstate; 1375 vap->iv_newstate = iwn_newstate; 1376 sc->ivap[IWN_RXON_BSS_CTX] = vap; 1377 1378 ieee80211_ratectl_init(vap); 1379 /* Complete setup. */ 1380 ieee80211_vap_attach(vap, iwn_media_change, ieee80211_media_status); 1381 ic->ic_opmode = opmode; 1382 return vap; 1383 } 1384 1385 static void 1386 iwn_vap_delete(struct ieee80211vap *vap) 1387 { 1388 struct iwn_vap *ivp = IWN_VAP(vap); 1389 1390 ieee80211_ratectl_deinit(vap); 1391 ieee80211_vap_detach(vap); 1392 kfree(ivp, M_80211_VAP); 1393 } 1394 1395 static int 1396 iwn_pci_detach(device_t dev) 1397 { 1398 struct iwn_softc *sc = device_get_softc(dev); 1399 struct ifnet *ifp = sc->sc_ifp; 1400 struct ieee80211com *ic; 1401 int qid; 1402 1403 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 1404 1405 wlan_serialize_enter(); 1406 1407 if (ifp != NULL) { 1408 ic = ifp->if_l2com; 1409 1410 ieee80211_draintask(ic, &sc->sc_reinit_task); 1411 ieee80211_draintask(ic, &sc->sc_radioon_task); 1412 ieee80211_draintask(ic, &sc->sc_radiooff_task); 1413 1414 iwn_stop_locked(sc); 1415 1416 #if 0 1417 // We don't need this for DragonFly as our taskqueue_free() 1418 // is running all remaining tasks before terminating. 1419 taskqueue_drain_all(sc->sc_tq); 1420 #endif 1421 taskqueue_free(sc->sc_tq); 1422 1423 callout_stop(&sc->watchdog_to); 1424 callout_stop(&sc->calib_to); 1425 ieee80211_ifdetach(ic); 1426 } 1427 1428 /* Uninstall interrupt handler. */ 1429 if (sc->irq != NULL) { 1430 bus_teardown_intr(dev, sc->irq, sc->sc_ih); 1431 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq), 1432 sc->irq); 1433 pci_release_msi(dev); 1434 sc->irq = NULL; 1435 } 1436 1437 /* Free DMA resources. */ 1438 iwn_free_rx_ring(sc, &sc->rxq); 1439 for (qid = 0; qid < sc->ntxqs; qid++) 1440 iwn_free_tx_ring(sc, &sc->txq[qid]); 1441 iwn_free_sched(sc); 1442 iwn_free_kw(sc); 1443 if (sc->ict != NULL) { 1444 iwn_free_ict(sc); 1445 sc->ict = NULL; 1446 } 1447 iwn_free_fwmem(sc); 1448 1449 if (sc->mem != NULL) { 1450 bus_release_resource(dev, SYS_RES_MEMORY, 1451 rman_get_rid(sc->mem), sc->mem); 1452 sc->mem = NULL; 1453 } 1454 1455 if (ifp != NULL) { 1456 if_free(ifp); 1457 sc->sc_ifp = NULL; 1458 } 1459 1460 bus_dma_tag_destroy(sc->sc_dmat); 1461 1462 wlan_serialize_exit(); 1463 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n", __func__); 1464 return 0; 1465 } 1466 1467 static int 1468 iwn_pci_shutdown(device_t dev) 1469 { 1470 struct iwn_softc *sc = device_get_softc(dev); 1471 1472 wlan_serialize_enter(); 1473 iwn_stop_locked(sc); 1474 wlan_serialize_exit(); 1475 1476 return 0; 1477 } 1478 1479 static int 1480 iwn_pci_suspend(device_t dev) 1481 { 1482 struct iwn_softc *sc = device_get_softc(dev); 1483 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 1484 1485 ieee80211_suspend_all(ic); 1486 return 0; 1487 } 1488 1489 static int 1490 iwn_pci_resume(device_t dev) 1491 { 1492 struct iwn_softc *sc = device_get_softc(dev); 1493 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 1494 1495 /* Clear device-specific "PCI retry timeout" register (41h). */ 1496 pci_write_config(dev, 0x41, 0, 1); 1497 1498 ieee80211_resume_all(ic); 1499 return 0; 1500 } 1501 1502 static int 1503 iwn_nic_lock(struct iwn_softc *sc) 1504 { 1505 int ntries; 1506 1507 /* Request exclusive access to NIC. */ 1508 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ); 1509 1510 /* Spin until we actually get the lock. */ 1511 for (ntries = 0; ntries < 1000; ntries++) { 1512 if ((IWN_READ(sc, IWN_GP_CNTRL) & 1513 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) == 1514 IWN_GP_CNTRL_MAC_ACCESS_ENA) 1515 return 0; 1516 DELAY(10); 1517 } 1518 return ETIMEDOUT; 1519 } 1520 1521 static __inline void 1522 iwn_nic_unlock(struct iwn_softc *sc) 1523 { 1524 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ); 1525 } 1526 1527 static __inline uint32_t 1528 iwn_prph_read(struct iwn_softc *sc, uint32_t addr) 1529 { 1530 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr); 1531 IWN_BARRIER_READ_WRITE(sc); 1532 return IWN_READ(sc, IWN_PRPH_RDATA); 1533 } 1534 1535 static __inline void 1536 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data) 1537 { 1538 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr); 1539 IWN_BARRIER_WRITE(sc); 1540 IWN_WRITE(sc, IWN_PRPH_WDATA, data); 1541 } 1542 1543 static __inline void 1544 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask) 1545 { 1546 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask); 1547 } 1548 1549 static __inline void 1550 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask) 1551 { 1552 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask); 1553 } 1554 1555 static __inline void 1556 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr, 1557 const uint32_t *data, int count) 1558 { 1559 for (; count > 0; count--, data++, addr += 4) 1560 iwn_prph_write(sc, addr, *data); 1561 } 1562 1563 static __inline uint32_t 1564 iwn_mem_read(struct iwn_softc *sc, uint32_t addr) 1565 { 1566 IWN_WRITE(sc, IWN_MEM_RADDR, addr); 1567 IWN_BARRIER_READ_WRITE(sc); 1568 return IWN_READ(sc, IWN_MEM_RDATA); 1569 } 1570 1571 static __inline void 1572 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data) 1573 { 1574 IWN_WRITE(sc, IWN_MEM_WADDR, addr); 1575 IWN_BARRIER_WRITE(sc); 1576 IWN_WRITE(sc, IWN_MEM_WDATA, data); 1577 } 1578 1579 static __inline void 1580 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data) 1581 { 1582 uint32_t tmp; 1583 1584 tmp = iwn_mem_read(sc, addr & ~3); 1585 if (addr & 3) 1586 tmp = (tmp & 0x0000ffff) | data << 16; 1587 else 1588 tmp = (tmp & 0xffff0000) | data; 1589 iwn_mem_write(sc, addr & ~3, tmp); 1590 } 1591 1592 static __inline void 1593 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data, 1594 int count) 1595 { 1596 for (; count > 0; count--, addr += 4) 1597 *data++ = iwn_mem_read(sc, addr); 1598 } 1599 1600 static __inline void 1601 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val, 1602 int count) 1603 { 1604 for (; count > 0; count--, addr += 4) 1605 iwn_mem_write(sc, addr, val); 1606 } 1607 1608 static int 1609 iwn_eeprom_lock(struct iwn_softc *sc) 1610 { 1611 int i, ntries; 1612 1613 for (i = 0; i < 100; i++) { 1614 /* Request exclusive access to EEPROM. */ 1615 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, 1616 IWN_HW_IF_CONFIG_EEPROM_LOCKED); 1617 1618 /* Spin until we actually get the lock. */ 1619 for (ntries = 0; ntries < 100; ntries++) { 1620 if (IWN_READ(sc, IWN_HW_IF_CONFIG) & 1621 IWN_HW_IF_CONFIG_EEPROM_LOCKED) 1622 return 0; 1623 DELAY(10); 1624 } 1625 } 1626 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end timeout\n", __func__); 1627 return ETIMEDOUT; 1628 } 1629 1630 static __inline void 1631 iwn_eeprom_unlock(struct iwn_softc *sc) 1632 { 1633 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED); 1634 } 1635 1636 /* 1637 * Initialize access by host to One Time Programmable ROM. 1638 * NB: This kind of ROM can be found on 1000 or 6000 Series only. 1639 */ 1640 static int 1641 iwn_init_otprom(struct iwn_softc *sc) 1642 { 1643 uint16_t prev, base, next; 1644 int count, error; 1645 1646 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 1647 1648 /* Wait for clock stabilization before accessing prph. */ 1649 if ((error = iwn_clock_wait(sc)) != 0) 1650 return error; 1651 1652 if ((error = iwn_nic_lock(sc)) != 0) 1653 return error; 1654 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ); 1655 DELAY(5); 1656 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ); 1657 iwn_nic_unlock(sc); 1658 1659 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */ 1660 if (sc->base_params->shadow_ram_support) { 1661 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT, 1662 IWN_RESET_LINK_PWR_MGMT_DIS); 1663 } 1664 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER); 1665 /* Clear ECC status. */ 1666 IWN_SETBITS(sc, IWN_OTP_GP, 1667 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS); 1668 1669 /* 1670 * Find the block before last block (contains the EEPROM image) 1671 * for HW without OTP shadow RAM. 1672 */ 1673 if (! sc->base_params->shadow_ram_support) { 1674 /* Switch to absolute addressing mode. */ 1675 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS); 1676 base = prev = 0; 1677 for (count = 0; count < sc->base_params->max_ll_items; 1678 count++) { 1679 error = iwn_read_prom_data(sc, base, &next, 2); 1680 if (error != 0) 1681 return error; 1682 if (next == 0) /* End of linked-list. */ 1683 break; 1684 prev = base; 1685 base = le16toh(next); 1686 } 1687 if (count == 0 || count == sc->base_params->max_ll_items) 1688 return EIO; 1689 /* Skip "next" word. */ 1690 sc->prom_base = prev + 1; 1691 } 1692 1693 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); 1694 1695 return 0; 1696 } 1697 1698 static int 1699 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count) 1700 { 1701 uint8_t *out = data; 1702 uint32_t val, tmp; 1703 int ntries; 1704 1705 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 1706 1707 addr += sc->prom_base; 1708 for (; count > 0; count -= 2, addr++) { 1709 IWN_WRITE(sc, IWN_EEPROM, addr << 2); 1710 for (ntries = 0; ntries < 10; ntries++) { 1711 val = IWN_READ(sc, IWN_EEPROM); 1712 if (val & IWN_EEPROM_READ_VALID) 1713 break; 1714 DELAY(5); 1715 } 1716 if (ntries == 10) { 1717 device_printf(sc->sc_dev, 1718 "timeout reading ROM at 0x%x\n", addr); 1719 return ETIMEDOUT; 1720 } 1721 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) { 1722 /* OTPROM, check for ECC errors. */ 1723 tmp = IWN_READ(sc, IWN_OTP_GP); 1724 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) { 1725 device_printf(sc->sc_dev, 1726 "OTPROM ECC error at 0x%x\n", addr); 1727 return EIO; 1728 } 1729 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) { 1730 /* Correctable ECC error, clear bit. */ 1731 IWN_SETBITS(sc, IWN_OTP_GP, 1732 IWN_OTP_GP_ECC_CORR_STTS); 1733 } 1734 } 1735 *out++ = val >> 16; 1736 if (count > 1) 1737 *out++ = val >> 24; 1738 } 1739 1740 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); 1741 1742 return 0; 1743 } 1744 1745 static void 1746 iwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1747 { 1748 if (error != 0) 1749 return; 1750 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs)); 1751 *(bus_addr_t *)arg = segs[0].ds_addr; 1752 } 1753 1754 static int 1755 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma, 1756 void **kvap, bus_size_t size, bus_size_t alignment) 1757 { 1758 int error; 1759 1760 dma->tag = NULL; 1761 dma->size = size; 1762 1763 error = bus_dma_tag_create(sc->sc_dmat, alignment, 1764 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size, 1765 1, size, BUS_DMA_NOWAIT, &dma->tag); 1766 if (error != 0) 1767 goto fail; 1768 1769 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr, 1770 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map); 1771 if (error != 0) 1772 goto fail; 1773 1774 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size, 1775 iwn_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT); 1776 if (error != 0) 1777 goto fail; 1778 1779 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); 1780 1781 if (kvap != NULL) 1782 *kvap = dma->vaddr; 1783 1784 return 0; 1785 1786 fail: iwn_dma_contig_free(dma); 1787 return error; 1788 } 1789 1790 static void 1791 iwn_dma_contig_free(struct iwn_dma_info *dma) 1792 { 1793 if (dma->vaddr != NULL) { 1794 bus_dmamap_sync(dma->tag, dma->map, 1795 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1796 bus_dmamap_unload(dma->tag, dma->map); 1797 bus_dmamem_free(dma->tag, dma->vaddr, dma->map); 1798 dma->vaddr = NULL; 1799 } 1800 if (dma->tag != NULL) { 1801 bus_dma_tag_destroy(dma->tag); 1802 dma->tag = NULL; 1803 } 1804 } 1805 1806 static int 1807 iwn_alloc_sched(struct iwn_softc *sc) 1808 { 1809 /* TX scheduler rings must be aligned on a 1KB boundary. */ 1810 return iwn_dma_contig_alloc(sc, &sc->sched_dma, (void **)&sc->sched, 1811 sc->schedsz, 1024); 1812 } 1813 1814 static void 1815 iwn_free_sched(struct iwn_softc *sc) 1816 { 1817 iwn_dma_contig_free(&sc->sched_dma); 1818 } 1819 1820 static int 1821 iwn_alloc_kw(struct iwn_softc *sc) 1822 { 1823 /* "Keep Warm" page must be aligned on a 4KB boundary. */ 1824 return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096); 1825 } 1826 1827 static void 1828 iwn_free_kw(struct iwn_softc *sc) 1829 { 1830 iwn_dma_contig_free(&sc->kw_dma); 1831 } 1832 1833 static int 1834 iwn_alloc_ict(struct iwn_softc *sc) 1835 { 1836 /* ICT table must be aligned on a 4KB boundary. */ 1837 return iwn_dma_contig_alloc(sc, &sc->ict_dma, (void **)&sc->ict, 1838 IWN_ICT_SIZE, 4096); 1839 } 1840 1841 static void 1842 iwn_free_ict(struct iwn_softc *sc) 1843 { 1844 iwn_dma_contig_free(&sc->ict_dma); 1845 } 1846 1847 static int 1848 iwn_alloc_fwmem(struct iwn_softc *sc) 1849 { 1850 /* Must be aligned on a 16-byte boundary. */ 1851 return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL, sc->fwsz, 16); 1852 } 1853 1854 static void 1855 iwn_free_fwmem(struct iwn_softc *sc) 1856 { 1857 iwn_dma_contig_free(&sc->fw_dma); 1858 } 1859 1860 static int 1861 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring) 1862 { 1863 bus_size_t size; 1864 int i, error; 1865 1866 ring->cur = 0; 1867 1868 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 1869 1870 /* Allocate RX descriptors (256-byte aligned). */ 1871 size = IWN_RX_RING_COUNT * sizeof (uint32_t); 1872 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc, 1873 size, 256); 1874 if (error != 0) { 1875 device_printf(sc->sc_dev, 1876 "%s: could not allocate RX ring DMA memory, error %d\n", 1877 __func__, error); 1878 goto fail; 1879 } 1880 1881 /* Allocate RX status area (16-byte aligned). */ 1882 error = iwn_dma_contig_alloc(sc, &ring->stat_dma, (void **)&ring->stat, 1883 sizeof (struct iwn_rx_status), 16); 1884 if (error != 0) { 1885 device_printf(sc->sc_dev, 1886 "%s: could not allocate RX status DMA memory, error %d\n", 1887 __func__, error); 1888 goto fail; 1889 } 1890 1891 /* Create RX buffer DMA tag. */ 1892 error = bus_dma_tag_create(sc->sc_dmat, 1, 0, 1893 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 1894 IWN_RBUF_SIZE, 1, IWN_RBUF_SIZE, BUS_DMA_NOWAIT, &ring->data_dmat); 1895 if (error != 0) { 1896 device_printf(sc->sc_dev, 1897 "%s: could not create RX buf DMA tag, error %d\n", 1898 __func__, error); 1899 goto fail; 1900 } 1901 1902 /* 1903 * Allocate and map RX buffers. 1904 */ 1905 for (i = 0; i < IWN_RX_RING_COUNT; i++) { 1906 struct iwn_rx_data *data = &ring->data[i]; 1907 bus_addr_t paddr; 1908 1909 error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 1910 if (error != 0) { 1911 device_printf(sc->sc_dev, 1912 "%s: could not create RX buf DMA map, error %d\n", 1913 __func__, error); 1914 goto fail; 1915 } 1916 1917 data->m = m_getjcl(MB_DONTWAIT, MT_DATA, 1918 M_PKTHDR, IWN_RBUF_SIZE); 1919 if (data->m == NULL) { 1920 device_printf(sc->sc_dev, 1921 "%s: could not allocate RX mbuf\n", __func__); 1922 error = ENOBUFS; 1923 goto fail; 1924 } 1925 1926 error = bus_dmamap_load(ring->data_dmat, data->map, 1927 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr, 1928 &paddr, BUS_DMA_NOWAIT); 1929 if (error != 0 && error != EFBIG) { 1930 device_printf(sc->sc_dev, 1931 "%s: can't not map mbuf, error %d\n", __func__, 1932 error); 1933 goto fail; 1934 } 1935 1936 /* Set physical address of RX buffer (256-byte aligned). */ 1937 ring->desc[i] = htole32(paddr >> 8); 1938 } 1939 1940 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, 1941 BUS_DMASYNC_PREWRITE); 1942 1943 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 1944 1945 return 0; 1946 1947 fail: iwn_free_rx_ring(sc, ring); 1948 1949 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__); 1950 1951 return error; 1952 } 1953 1954 static void 1955 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring) 1956 { 1957 int ntries; 1958 1959 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 1960 1961 if (iwn_nic_lock(sc) == 0) { 1962 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0); 1963 for (ntries = 0; ntries < 1000; ntries++) { 1964 if (IWN_READ(sc, IWN_FH_RX_STATUS) & 1965 IWN_FH_RX_STATUS_IDLE) 1966 break; 1967 DELAY(10); 1968 } 1969 iwn_nic_unlock(sc); 1970 } 1971 ring->cur = 0; 1972 sc->last_rx_valid = 0; 1973 } 1974 1975 static void 1976 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring) 1977 { 1978 int i; 1979 1980 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__); 1981 1982 iwn_dma_contig_free(&ring->desc_dma); 1983 iwn_dma_contig_free(&ring->stat_dma); 1984 1985 for (i = 0; i < IWN_RX_RING_COUNT; i++) { 1986 struct iwn_rx_data *data = &ring->data[i]; 1987 1988 if (data->m != NULL) { 1989 bus_dmamap_sync(ring->data_dmat, data->map, 1990 BUS_DMASYNC_POSTREAD); 1991 bus_dmamap_unload(ring->data_dmat, data->map); 1992 m_freem(data->m); 1993 data->m = NULL; 1994 } 1995 if (data->map != NULL) 1996 bus_dmamap_destroy(ring->data_dmat, data->map); 1997 } 1998 if (ring->data_dmat != NULL) { 1999 bus_dma_tag_destroy(ring->data_dmat); 2000 ring->data_dmat = NULL; 2001 } 2002 } 2003 2004 static int 2005 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid) 2006 { 2007 bus_addr_t paddr; 2008 bus_size_t size; 2009 int i, error; 2010 2011 ring->qid = qid; 2012 ring->queued = 0; 2013 ring->cur = 0; 2014 2015 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 2016 2017 /* Allocate TX descriptors (256-byte aligned). */ 2018 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_desc); 2019 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc, 2020 size, 256); 2021 if (error != 0) { 2022 device_printf(sc->sc_dev, 2023 "%s: could not allocate TX ring DMA memory, error %d\n", 2024 __func__, error); 2025 goto fail; 2026 } 2027 2028 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_cmd); 2029 error = iwn_dma_contig_alloc(sc, &ring->cmd_dma, (void **)&ring->cmd, 2030 size, 4); 2031 if (error != 0) { 2032 device_printf(sc->sc_dev, 2033 "%s: could not allocate TX cmd DMA memory, error %d\n", 2034 __func__, error); 2035 goto fail; 2036 } 2037 2038 error = bus_dma_tag_create(sc->sc_dmat, 1, 0, 2039 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 2040 IWN_MAX_SCATTER - 1, MCLBYTES, BUS_DMA_NOWAIT, &ring->data_dmat); 2041 if (error != 0) { 2042 device_printf(sc->sc_dev, 2043 "%s: could not create TX buf DMA tag, error %d\n", 2044 __func__, error); 2045 goto fail; 2046 } 2047 2048 paddr = ring->cmd_dma.paddr; 2049 for (i = 0; i < IWN_TX_RING_COUNT; i++) { 2050 struct iwn_tx_data *data = &ring->data[i]; 2051 2052 data->cmd_paddr = paddr; 2053 data->scratch_paddr = paddr + 12; 2054 paddr += sizeof (struct iwn_tx_cmd); 2055 2056 error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 2057 if (error != 0) { 2058 device_printf(sc->sc_dev, 2059 "%s: could not create TX buf DMA map, error %d\n", 2060 __func__, error); 2061 goto fail; 2062 } 2063 } 2064 2065 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); 2066 2067 return 0; 2068 2069 fail: iwn_free_tx_ring(sc, ring); 2070 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__); 2071 return error; 2072 } 2073 2074 static void 2075 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring) 2076 { 2077 int i; 2078 2079 DPRINTF(sc, IWN_DEBUG_TRACE, "->doing %s \n", __func__); 2080 2081 for (i = 0; i < IWN_TX_RING_COUNT; i++) { 2082 struct iwn_tx_data *data = &ring->data[i]; 2083 2084 if (data->m != NULL) { 2085 bus_dmamap_sync(ring->data_dmat, data->map, 2086 BUS_DMASYNC_POSTWRITE); 2087 bus_dmamap_unload(ring->data_dmat, data->map); 2088 m_freem(data->m); 2089 data->m = NULL; 2090 } 2091 } 2092 /* Clear TX descriptors. */ 2093 memset(ring->desc, 0, ring->desc_dma.size); 2094 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, 2095 BUS_DMASYNC_PREWRITE); 2096 sc->qfullmsk &= ~(1 << ring->qid); 2097 ring->queued = 0; 2098 ring->cur = 0; 2099 } 2100 2101 static void 2102 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring) 2103 { 2104 int i; 2105 2106 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__); 2107 2108 iwn_dma_contig_free(&ring->desc_dma); 2109 iwn_dma_contig_free(&ring->cmd_dma); 2110 2111 for (i = 0; i < IWN_TX_RING_COUNT; i++) { 2112 struct iwn_tx_data *data = &ring->data[i]; 2113 2114 if (data->m != NULL) { 2115 bus_dmamap_sync(ring->data_dmat, data->map, 2116 BUS_DMASYNC_POSTWRITE); 2117 bus_dmamap_unload(ring->data_dmat, data->map); 2118 m_freem(data->m); 2119 } 2120 if (data->map != NULL) 2121 bus_dmamap_destroy(ring->data_dmat, data->map); 2122 } 2123 if (ring->data_dmat != NULL) { 2124 bus_dma_tag_destroy(ring->data_dmat); 2125 ring->data_dmat = NULL; 2126 } 2127 } 2128 2129 static void 2130 iwn5000_ict_reset(struct iwn_softc *sc) 2131 { 2132 /* Disable interrupts. */ 2133 IWN_WRITE(sc, IWN_INT_MASK, 0); 2134 2135 /* Reset ICT table. */ 2136 memset(sc->ict, 0, IWN_ICT_SIZE); 2137 sc->ict_cur = 0; 2138 2139 /* Set physical address of ICT table (4KB aligned). */ 2140 DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__); 2141 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE | 2142 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12); 2143 2144 /* Enable periodic RX interrupt. */ 2145 sc->int_mask |= IWN_INT_RX_PERIODIC; 2146 /* Switch to ICT interrupt mode in driver. */ 2147 sc->sc_flags |= IWN_FLAG_USE_ICT; 2148 2149 /* Re-enable interrupts. */ 2150 IWN_WRITE(sc, IWN_INT, 0xffffffff); 2151 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask); 2152 } 2153 2154 static int 2155 iwn_read_eeprom(struct iwn_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN]) 2156 { 2157 struct iwn_ops *ops = &sc->ops; 2158 uint16_t val; 2159 int error; 2160 2161 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 2162 2163 /* Check whether adapter has an EEPROM or an OTPROM. */ 2164 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 && 2165 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP)) 2166 sc->sc_flags |= IWN_FLAG_HAS_OTPROM; 2167 DPRINTF(sc, IWN_DEBUG_RESET, "%s found\n", 2168 (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM"); 2169 2170 /* Adapter has to be powered on for EEPROM access to work. */ 2171 if ((error = iwn_apm_init(sc)) != 0) { 2172 device_printf(sc->sc_dev, 2173 "%s: could not power ON adapter, error %d\n", __func__, 2174 error); 2175 return error; 2176 } 2177 2178 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) { 2179 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__); 2180 return EIO; 2181 } 2182 if ((error = iwn_eeprom_lock(sc)) != 0) { 2183 device_printf(sc->sc_dev, "%s: could not lock ROM, error %d\n", 2184 __func__, error); 2185 return error; 2186 } 2187 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) { 2188 if ((error = iwn_init_otprom(sc)) != 0) { 2189 device_printf(sc->sc_dev, 2190 "%s: could not initialize OTPROM, error %d\n", 2191 __func__, error); 2192 return error; 2193 } 2194 } 2195 2196 iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2); 2197 DPRINTF(sc, IWN_DEBUG_RESET, "SKU capabilities=0x%04x\n", le16toh(val)); 2198 /* Check if HT support is bonded out. */ 2199 if (val & htole16(IWN_EEPROM_SKU_CAP_11N)) 2200 sc->sc_flags |= IWN_FLAG_HAS_11N; 2201 2202 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2); 2203 sc->rfcfg = le16toh(val); 2204 DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg); 2205 /* Read Tx/Rx chains from ROM unless it's known to be broken. */ 2206 if (sc->txchainmask == 0) 2207 sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg); 2208 if (sc->rxchainmask == 0) 2209 sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg); 2210 2211 /* Read MAC address. */ 2212 iwn_read_prom_data(sc, IWN_EEPROM_MAC, macaddr, 6); 2213 2214 /* Read adapter-specific information from EEPROM. */ 2215 ops->read_eeprom(sc); 2216 2217 iwn_apm_stop(sc); /* Power OFF adapter. */ 2218 2219 iwn_eeprom_unlock(sc); 2220 2221 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); 2222 2223 return 0; 2224 } 2225 2226 static void 2227 iwn4965_read_eeprom(struct iwn_softc *sc) 2228 { 2229 uint32_t addr; 2230 uint16_t val; 2231 int i; 2232 2233 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 2234 2235 /* Read regulatory domain (4 ASCII characters). */ 2236 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4); 2237 2238 /* Read the list of authorized channels (20MHz ones only). */ 2239 for (i = 0; i < IWN_NBANDS - 1; i++) { 2240 addr = iwn4965_regulatory_bands[i]; 2241 iwn_read_eeprom_channels(sc, i, addr); 2242 } 2243 2244 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */ 2245 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2); 2246 sc->maxpwr2GHz = val & 0xff; 2247 sc->maxpwr5GHz = val >> 8; 2248 /* Check that EEPROM values are within valid range. */ 2249 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50) 2250 sc->maxpwr5GHz = 38; 2251 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50) 2252 sc->maxpwr2GHz = 38; 2253 DPRINTF(sc, IWN_DEBUG_RESET, "maxpwr 2GHz=%d 5GHz=%d\n", 2254 sc->maxpwr2GHz, sc->maxpwr5GHz); 2255 2256 /* Read samples for each TX power group. */ 2257 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands, 2258 sizeof sc->bands); 2259 2260 /* Read voltage at which samples were taken. */ 2261 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2); 2262 sc->eeprom_voltage = (int16_t)le16toh(val); 2263 DPRINTF(sc, IWN_DEBUG_RESET, "voltage=%d (in 0.3V)\n", 2264 sc->eeprom_voltage); 2265 2266 #ifdef IWN_DEBUG 2267 /* Print samples. */ 2268 if (sc->sc_debug & IWN_DEBUG_ANY) { 2269 for (i = 0; i < IWN_NBANDS - 1; i++) 2270 iwn4965_print_power_group(sc, i); 2271 } 2272 #endif 2273 2274 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); 2275 } 2276 2277 #ifdef IWN_DEBUG 2278 static void 2279 iwn4965_print_power_group(struct iwn_softc *sc, int i) 2280 { 2281 struct iwn4965_eeprom_band *band = &sc->bands[i]; 2282 struct iwn4965_eeprom_chan_samples *chans = band->chans; 2283 int j, c; 2284 2285 kprintf("===band %d===\n", i); 2286 kprintf("chan lo=%d, chan hi=%d\n", band->lo, band->hi); 2287 kprintf("chan1 num=%d\n", chans[0].num); 2288 for (c = 0; c < 2; c++) { 2289 for (j = 0; j < IWN_NSAMPLES; j++) { 2290 kprintf("chain %d, sample %d: temp=%d gain=%d " 2291 "power=%d pa_det=%d\n", c, j, 2292 chans[0].samples[c][j].temp, 2293 chans[0].samples[c][j].gain, 2294 chans[0].samples[c][j].power, 2295 chans[0].samples[c][j].pa_det); 2296 } 2297 } 2298 kprintf("chan2 num=%d\n", chans[1].num); 2299 for (c = 0; c < 2; c++) { 2300 for (j = 0; j < IWN_NSAMPLES; j++) { 2301 kprintf("chain %d, sample %d: temp=%d gain=%d " 2302 "power=%d pa_det=%d\n", c, j, 2303 chans[1].samples[c][j].temp, 2304 chans[1].samples[c][j].gain, 2305 chans[1].samples[c][j].power, 2306 chans[1].samples[c][j].pa_det); 2307 } 2308 } 2309 } 2310 #endif 2311 2312 static void 2313 iwn5000_read_eeprom(struct iwn_softc *sc) 2314 { 2315 struct iwn5000_eeprom_calib_hdr hdr; 2316 int32_t volt; 2317 uint32_t base, addr; 2318 uint16_t val; 2319 int i; 2320 2321 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 2322 2323 /* Read regulatory domain (4 ASCII characters). */ 2324 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2); 2325 base = le16toh(val); 2326 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN, 2327 sc->eeprom_domain, 4); 2328 2329 /* Read the list of authorized channels (20MHz ones only). */ 2330 for (i = 0; i < IWN_NBANDS - 1; i++) { 2331 addr = base + sc->base_params->regulatory_bands[i]; 2332 iwn_read_eeprom_channels(sc, i, addr); 2333 } 2334 2335 /* Read enhanced TX power information for 6000 Series. */ 2336 if (sc->base_params->enhanced_TX_power) 2337 iwn_read_eeprom_enhinfo(sc); 2338 2339 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2); 2340 base = le16toh(val); 2341 iwn_read_prom_data(sc, base, &hdr, sizeof hdr); 2342 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 2343 "%s: calib version=%u pa type=%u voltage=%u\n", __func__, 2344 hdr.version, hdr.pa_type, le16toh(hdr.volt)); 2345 sc->calib_ver = hdr.version; 2346 2347 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) { 2348 sc->eeprom_voltage = le16toh(hdr.volt); 2349 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2); 2350 sc->eeprom_temp_high=le16toh(val); 2351 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2); 2352 sc->eeprom_temp = le16toh(val); 2353 } 2354 2355 if (sc->hw_type == IWN_HW_REV_TYPE_5150) { 2356 /* Compute temperature offset. */ 2357 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2); 2358 sc->eeprom_temp = le16toh(val); 2359 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2); 2360 volt = le16toh(val); 2361 sc->temp_off = sc->eeprom_temp - (volt / -5); 2362 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n", 2363 sc->eeprom_temp, volt, sc->temp_off); 2364 } else { 2365 /* Read crystal calibration. */ 2366 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL, 2367 &sc->eeprom_crystal, sizeof (uint32_t)); 2368 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "crystal calibration 0x%08x\n", 2369 le32toh(sc->eeprom_crystal)); 2370 } 2371 2372 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); 2373 2374 } 2375 2376 /* 2377 * Translate EEPROM flags to net80211. 2378 */ 2379 static uint32_t 2380 iwn_eeprom_channel_flags(struct iwn_eeprom_chan *channel) 2381 { 2382 uint32_t nflags; 2383 2384 nflags = 0; 2385 if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0) 2386 nflags |= IEEE80211_CHAN_PASSIVE; 2387 if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0) 2388 nflags |= IEEE80211_CHAN_NOADHOC; 2389 if (channel->flags & IWN_EEPROM_CHAN_RADAR) { 2390 nflags |= IEEE80211_CHAN_DFS; 2391 /* XXX apparently IBSS may still be marked */ 2392 nflags |= IEEE80211_CHAN_NOADHOC; 2393 } 2394 2395 return nflags; 2396 } 2397 2398 static void 2399 iwn_read_eeprom_band(struct iwn_softc *sc, int n) 2400 { 2401 struct ifnet *ifp = sc->sc_ifp; 2402 struct ieee80211com *ic = ifp->if_l2com; 2403 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n]; 2404 const struct iwn_chan_band *band = &iwn_bands[n]; 2405 struct ieee80211_channel *c; 2406 uint8_t chan; 2407 int i, nflags; 2408 2409 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 2410 2411 for (i = 0; i < band->nchan; i++) { 2412 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) { 2413 DPRINTF(sc, IWN_DEBUG_RESET, 2414 "skip chan %d flags 0x%x maxpwr %d\n", 2415 band->chan[i], channels[i].flags, 2416 channels[i].maxpwr); 2417 continue; 2418 } 2419 chan = band->chan[i]; 2420 nflags = iwn_eeprom_channel_flags(&channels[i]); 2421 2422 c = &ic->ic_channels[ic->ic_nchans++]; 2423 c->ic_ieee = chan; 2424 c->ic_maxregpower = channels[i].maxpwr; 2425 c->ic_maxpower = 2*c->ic_maxregpower; 2426 2427 if (n == 0) { /* 2GHz band */ 2428 c->ic_freq = ieee80211_ieee2mhz(chan, IEEE80211_CHAN_G); 2429 /* G =>'s B is supported */ 2430 c->ic_flags = IEEE80211_CHAN_B | nflags; 2431 c = &ic->ic_channels[ic->ic_nchans++]; 2432 c[0] = c[-1]; 2433 c->ic_flags = IEEE80211_CHAN_G | nflags; 2434 } else { /* 5GHz band */ 2435 c->ic_freq = ieee80211_ieee2mhz(chan, IEEE80211_CHAN_A); 2436 c->ic_flags = IEEE80211_CHAN_A | nflags; 2437 } 2438 2439 /* Save maximum allowed TX power for this channel. */ 2440 sc->maxpwr[chan] = channels[i].maxpwr; 2441 2442 DPRINTF(sc, IWN_DEBUG_RESET, 2443 "add chan %d flags 0x%x maxpwr %d\n", chan, 2444 channels[i].flags, channels[i].maxpwr); 2445 2446 if (sc->sc_flags & IWN_FLAG_HAS_11N) { 2447 /* add HT20, HT40 added separately */ 2448 c = &ic->ic_channels[ic->ic_nchans++]; 2449 c[0] = c[-1]; 2450 c->ic_flags |= IEEE80211_CHAN_HT20; 2451 } 2452 } 2453 2454 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); 2455 2456 } 2457 2458 static void 2459 iwn_read_eeprom_ht40(struct iwn_softc *sc, int n) 2460 { 2461 struct ifnet *ifp = sc->sc_ifp; 2462 struct ieee80211com *ic = ifp->if_l2com; 2463 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n]; 2464 const struct iwn_chan_band *band = &iwn_bands[n]; 2465 struct ieee80211_channel *c, *cent, *extc; 2466 uint8_t chan; 2467 int i, nflags; 2468 2469 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s start\n", __func__); 2470 2471 if (!(sc->sc_flags & IWN_FLAG_HAS_11N)) { 2472 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end no 11n\n", __func__); 2473 return; 2474 } 2475 2476 for (i = 0; i < band->nchan; i++) { 2477 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) { 2478 DPRINTF(sc, IWN_DEBUG_RESET, 2479 "skip chan %d flags 0x%x maxpwr %d\n", 2480 band->chan[i], channels[i].flags, 2481 channels[i].maxpwr); 2482 continue; 2483 } 2484 chan = band->chan[i]; 2485 nflags = iwn_eeprom_channel_flags(&channels[i]); 2486 2487 /* 2488 * Each entry defines an HT40 channel pair; find the 2489 * center channel, then the extension channel above. 2490 */ 2491 cent = ieee80211_find_channel_byieee(ic, chan, 2492 (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A)); 2493 if (cent == NULL) { /* XXX shouldn't happen */ 2494 device_printf(sc->sc_dev, 2495 "%s: no entry for channel %d\n", __func__, chan); 2496 continue; 2497 } 2498 extc = ieee80211_find_channel(ic, cent->ic_freq+20, 2499 (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A)); 2500 if (extc == NULL) { 2501 DPRINTF(sc, IWN_DEBUG_RESET, 2502 "%s: skip chan %d, extension channel not found\n", 2503 __func__, chan); 2504 continue; 2505 } 2506 2507 DPRINTF(sc, IWN_DEBUG_RESET, 2508 "add ht40 chan %d flags 0x%x maxpwr %d\n", 2509 chan, channels[i].flags, channels[i].maxpwr); 2510 2511 c = &ic->ic_channels[ic->ic_nchans++]; 2512 c[0] = cent[0]; 2513 c->ic_extieee = extc->ic_ieee; 2514 c->ic_flags &= ~IEEE80211_CHAN_HT; 2515 c->ic_flags |= IEEE80211_CHAN_HT40U | nflags; 2516 c = &ic->ic_channels[ic->ic_nchans++]; 2517 c[0] = extc[0]; 2518 c->ic_extieee = cent->ic_ieee; 2519 c->ic_flags &= ~IEEE80211_CHAN_HT; 2520 c->ic_flags |= IEEE80211_CHAN_HT40D | nflags; 2521 } 2522 2523 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); 2524 2525 } 2526 2527 static void 2528 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr) 2529 { 2530 struct ifnet *ifp = sc->sc_ifp; 2531 struct ieee80211com *ic = ifp->if_l2com; 2532 2533 iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n], 2534 iwn_bands[n].nchan * sizeof (struct iwn_eeprom_chan)); 2535 2536 if (n < 5) 2537 iwn_read_eeprom_band(sc, n); 2538 else 2539 iwn_read_eeprom_ht40(sc, n); 2540 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans); 2541 } 2542 2543 static struct iwn_eeprom_chan * 2544 iwn_find_eeprom_channel(struct iwn_softc *sc, struct ieee80211_channel *c) 2545 { 2546 int band, chan, i, j; 2547 2548 if (IEEE80211_IS_CHAN_HT40(c)) { 2549 band = IEEE80211_IS_CHAN_5GHZ(c) ? 6 : 5; 2550 if (IEEE80211_IS_CHAN_HT40D(c)) 2551 chan = c->ic_extieee; 2552 else 2553 chan = c->ic_ieee; 2554 for (i = 0; i < iwn_bands[band].nchan; i++) { 2555 if (iwn_bands[band].chan[i] == chan) 2556 return &sc->eeprom_channels[band][i]; 2557 } 2558 } else { 2559 for (j = 0; j < 5; j++) { 2560 for (i = 0; i < iwn_bands[j].nchan; i++) { 2561 if (iwn_bands[j].chan[i] == c->ic_ieee) 2562 return &sc->eeprom_channels[j][i]; 2563 } 2564 } 2565 } 2566 return NULL; 2567 } 2568 2569 /* 2570 * Enforce flags read from EEPROM. 2571 */ 2572 static int 2573 iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd, 2574 int nchan, struct ieee80211_channel chans[]) 2575 { 2576 struct iwn_softc *sc = ic->ic_ifp->if_softc; 2577 int i; 2578 2579 for (i = 0; i < nchan; i++) { 2580 struct ieee80211_channel *c = &chans[i]; 2581 struct iwn_eeprom_chan *channel; 2582 2583 channel = iwn_find_eeprom_channel(sc, c); 2584 if (channel == NULL) { 2585 if_printf(ic->ic_ifp, 2586 "%s: invalid channel %u freq %u/0x%x\n", 2587 __func__, c->ic_ieee, c->ic_freq, c->ic_flags); 2588 return EINVAL; 2589 } 2590 c->ic_flags |= iwn_eeprom_channel_flags(channel); 2591 } 2592 2593 return 0; 2594 } 2595 2596 static void 2597 iwn_read_eeprom_enhinfo(struct iwn_softc *sc) 2598 { 2599 struct iwn_eeprom_enhinfo enhinfo[35]; 2600 struct ifnet *ifp = sc->sc_ifp; 2601 struct ieee80211com *ic = ifp->if_l2com; 2602 struct ieee80211_channel *c; 2603 uint16_t val, base; 2604 int8_t maxpwr; 2605 uint8_t flags; 2606 int i, j; 2607 2608 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 2609 2610 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2); 2611 base = le16toh(val); 2612 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO, 2613 enhinfo, sizeof enhinfo); 2614 2615 for (i = 0; i < nitems(enhinfo); i++) { 2616 flags = enhinfo[i].flags; 2617 if (!(flags & IWN_ENHINFO_VALID)) 2618 continue; /* Skip invalid entries. */ 2619 2620 maxpwr = 0; 2621 if (sc->txchainmask & IWN_ANT_A) 2622 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]); 2623 if (sc->txchainmask & IWN_ANT_B) 2624 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]); 2625 if (sc->txchainmask & IWN_ANT_C) 2626 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]); 2627 if (sc->ntxchains == 2) 2628 maxpwr = MAX(maxpwr, enhinfo[i].mimo2); 2629 else if (sc->ntxchains == 3) 2630 maxpwr = MAX(maxpwr, enhinfo[i].mimo3); 2631 2632 for (j = 0; j < ic->ic_nchans; j++) { 2633 c = &ic->ic_channels[j]; 2634 if ((flags & IWN_ENHINFO_5GHZ)) { 2635 if (!IEEE80211_IS_CHAN_A(c)) 2636 continue; 2637 } else if ((flags & IWN_ENHINFO_OFDM)) { 2638 if (!IEEE80211_IS_CHAN_G(c)) 2639 continue; 2640 } else if (!IEEE80211_IS_CHAN_B(c)) 2641 continue; 2642 if ((flags & IWN_ENHINFO_HT40)) { 2643 if (!IEEE80211_IS_CHAN_HT40(c)) 2644 continue; 2645 } else { 2646 if (IEEE80211_IS_CHAN_HT40(c)) 2647 continue; 2648 } 2649 if (enhinfo[i].chan != 0 && 2650 enhinfo[i].chan != c->ic_ieee) 2651 continue; 2652 2653 DPRINTF(sc, IWN_DEBUG_RESET, 2654 "channel %d(%x), maxpwr %d\n", c->ic_ieee, 2655 c->ic_flags, maxpwr / 2); 2656 c->ic_maxregpower = maxpwr / 2; 2657 c->ic_maxpower = maxpwr; 2658 } 2659 } 2660 2661 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); 2662 2663 } 2664 2665 static struct ieee80211_node * 2666 iwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN]) 2667 { 2668 return kmalloc(sizeof(struct iwn_node), M_80211_NODE, 2669 M_INTWAIT | M_ZERO); 2670 } 2671 2672 static __inline int 2673 rate2plcp(int rate) 2674 { 2675 switch (rate & 0xff) { 2676 case 12: return 0xd; 2677 case 18: return 0xf; 2678 case 24: return 0x5; 2679 case 36: return 0x7; 2680 case 48: return 0x9; 2681 case 72: return 0xb; 2682 case 96: return 0x1; 2683 case 108: return 0x3; 2684 case 2: return 10; 2685 case 4: return 20; 2686 case 11: return 55; 2687 case 22: return 110; 2688 } 2689 return 0; 2690 } 2691 2692 /* 2693 * Calculate the required PLCP value from the given rate, 2694 * to the given node. 2695 * 2696 * This will take the node configuration (eg 11n, rate table 2697 * setup, etc) into consideration. 2698 */ 2699 static uint32_t 2700 iwn_rate_to_plcp(struct iwn_softc *sc, struct ieee80211_node *ni, 2701 uint8_t rate) 2702 { 2703 #define RV(v) ((v) & IEEE80211_RATE_VAL) 2704 struct ieee80211com *ic = ni->ni_ic; 2705 uint8_t txant1, txant2; 2706 uint32_t plcp = 0; 2707 int ridx; 2708 2709 /* Use the first valid TX antenna. */ 2710 txant1 = IWN_LSB(sc->txchainmask); 2711 txant2 = IWN_LSB(sc->txchainmask & ~txant1); 2712 2713 /* 2714 * If it's an MCS rate, let's set the plcp correctly 2715 * and set the relevant flags based on the node config. 2716 */ 2717 if (rate & IEEE80211_RATE_MCS) { 2718 /* 2719 * Set the initial PLCP value to be between 0->31 for 2720 * MCS 0 -> MCS 31, then set the "I'm an MCS rate!" 2721 * flag. 2722 */ 2723 plcp = RV(rate) | IWN_RFLAG_MCS; 2724 2725 /* 2726 * XXX the following should only occur if both 2727 * the local configuration _and_ the remote node 2728 * advertise these capabilities. Thus this code 2729 * may need fixing! 2730 */ 2731 2732 /* 2733 * Set the channel width and guard interval. 2734 */ 2735 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) { 2736 plcp |= IWN_RFLAG_HT40; 2737 if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40) 2738 plcp |= IWN_RFLAG_SGI; 2739 } else if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20) { 2740 plcp |= IWN_RFLAG_SGI; 2741 } 2742 2743 /* 2744 * If it's a two stream rate, enable TX on both 2745 * antennas. 2746 * 2747 * XXX three stream rates? 2748 */ 2749 if (rate > 0x87) 2750 plcp |= IWN_RFLAG_ANT(txant1 | txant2); 2751 else 2752 plcp |= IWN_RFLAG_ANT(txant1); 2753 } else { 2754 /* 2755 * Set the initial PLCP - fine for both 2756 * OFDM and CCK rates. 2757 */ 2758 plcp = rate2plcp(rate); 2759 2760 /* Set CCK flag if it's CCK */ 2761 2762 /* XXX It would be nice to have a method 2763 * to map the ridx -> phy table entry 2764 * so we could just query that, rather than 2765 * this hack to check against IWN_RIDX_OFDM6. 2766 */ 2767 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt, 2768 rate & IEEE80211_RATE_VAL); 2769 if (ridx < IWN_RIDX_OFDM6 && 2770 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan)) 2771 plcp |= IWN_RFLAG_CCK; 2772 2773 /* Set antenna configuration */ 2774 plcp |= IWN_RFLAG_ANT(txant1); 2775 } 2776 2777 DPRINTF(sc, IWN_DEBUG_TXRATE, "%s: rate=0x%02x, plcp=0x%08x\n", 2778 __func__, 2779 rate, 2780 plcp); 2781 2782 return (htole32(plcp)); 2783 #undef RV 2784 } 2785 2786 static void 2787 iwn_newassoc(struct ieee80211_node *ni, int isnew) 2788 { 2789 /* Doesn't do anything at the moment */ 2790 } 2791 2792 static int 2793 iwn_media_change(struct ifnet *ifp) 2794 { 2795 int error; 2796 2797 error = ieee80211_media_change(ifp); 2798 /* NB: only the fixed rate can change and that doesn't need a reset */ 2799 return (error == ENETRESET ? 0 : error); 2800 } 2801 2802 static int 2803 iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 2804 { 2805 struct iwn_vap *ivp = IWN_VAP(vap); 2806 struct ieee80211com *ic = vap->iv_ic; 2807 struct iwn_softc *sc = ic->ic_ifp->if_softc; 2808 int error = 0; 2809 2810 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 2811 2812 DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__, 2813 ieee80211_state_name[vap->iv_state], ieee80211_state_name[nstate]); 2814 2815 callout_stop(&sc->calib_to); 2816 2817 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX]; 2818 2819 switch (nstate) { 2820 case IEEE80211_S_ASSOC: 2821 if (vap->iv_state != IEEE80211_S_RUN) 2822 break; 2823 /* FALLTHROUGH */ 2824 case IEEE80211_S_AUTH: 2825 if (vap->iv_state == IEEE80211_S_AUTH) 2826 break; 2827 2828 /* 2829 * !AUTH -> AUTH transition requires state reset to handle 2830 * reassociations correctly. 2831 */ 2832 sc->rxon->associd = 0; 2833 sc->rxon->filter &= ~htole32(IWN_FILTER_BSS); 2834 sc->calib.state = IWN_CALIB_STATE_INIT; 2835 2836 if ((error = iwn_auth(sc, vap)) != 0) { 2837 device_printf(sc->sc_dev, 2838 "%s: could not move to auth state\n", __func__); 2839 } 2840 break; 2841 2842 case IEEE80211_S_RUN: 2843 /* 2844 * RUN -> RUN transition; Just restart the timers. 2845 */ 2846 if (vap->iv_state == IEEE80211_S_RUN) { 2847 sc->calib_cnt = 0; 2848 break; 2849 } 2850 2851 /* 2852 * !RUN -> RUN requires setting the association id 2853 * which is done with a firmware cmd. We also defer 2854 * starting the timers until that work is done. 2855 */ 2856 if ((error = iwn_run(sc, vap)) != 0) { 2857 device_printf(sc->sc_dev, 2858 "%s: could not move to run state\n", __func__); 2859 } 2860 break; 2861 2862 case IEEE80211_S_INIT: 2863 sc->calib.state = IWN_CALIB_STATE_INIT; 2864 break; 2865 2866 default: 2867 break; 2868 } 2869 if (error != 0){ 2870 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__); 2871 return error; 2872 } 2873 2874 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 2875 2876 return ivp->iv_newstate(vap, nstate, arg); 2877 } 2878 2879 static void 2880 iwn_calib_timeout(void *arg) 2881 { 2882 struct iwn_softc *sc = arg; 2883 2884 wlan_serialize_enter(); 2885 2886 /* Force automatic TX power calibration every 60 secs. */ 2887 if (++sc->calib_cnt >= 120) { 2888 uint32_t flags = 0; 2889 2890 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s\n", 2891 "sending request for statistics"); 2892 (void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, 2893 sizeof flags, 1); 2894 sc->calib_cnt = 0; 2895 } 2896 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout, 2897 sc); 2898 wlan_serialize_exit(); 2899 } 2900 2901 /* 2902 * Process an RX_PHY firmware notification. This is usually immediately 2903 * followed by an MPDU_RX_DONE notification. 2904 */ 2905 static void 2906 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc, 2907 struct iwn_rx_data *data) 2908 { 2909 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1); 2910 2911 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received PHY stats\n", __func__); 2912 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD); 2913 2914 /* Save RX statistics, they will be used on MPDU_RX_DONE. */ 2915 memcpy(&sc->last_rx_stat, stat, sizeof (*stat)); 2916 sc->last_rx_valid = 1; 2917 } 2918 2919 /* 2920 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification. 2921 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one. 2922 */ 2923 static void 2924 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, 2925 struct iwn_rx_data *data) 2926 { 2927 struct iwn_ops *ops = &sc->ops; 2928 struct ifnet *ifp = sc->sc_ifp; 2929 struct ieee80211com *ic = ifp->if_l2com; 2930 struct iwn_rx_ring *ring = &sc->rxq; 2931 struct ieee80211_frame *wh; 2932 struct ieee80211_node *ni; 2933 struct mbuf *m, *m1; 2934 struct iwn_rx_stat *stat; 2935 caddr_t head; 2936 bus_addr_t paddr; 2937 uint32_t flags; 2938 int error, len, rssi, nf; 2939 2940 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 2941 2942 if (desc->type == IWN_MPDU_RX_DONE) { 2943 /* Check for prior RX_PHY notification. */ 2944 if (!sc->last_rx_valid) { 2945 DPRINTF(sc, IWN_DEBUG_ANY, 2946 "%s: missing RX_PHY\n", __func__); 2947 return; 2948 } 2949 stat = &sc->last_rx_stat; 2950 } else 2951 stat = (struct iwn_rx_stat *)(desc + 1); 2952 2953 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD); 2954 2955 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) { 2956 device_printf(sc->sc_dev, 2957 "%s: invalid RX statistic header, len %d\n", __func__, 2958 stat->cfg_phy_len); 2959 return; 2960 } 2961 if (desc->type == IWN_MPDU_RX_DONE) { 2962 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1); 2963 head = (caddr_t)(mpdu + 1); 2964 len = le16toh(mpdu->len); 2965 } else { 2966 head = (caddr_t)(stat + 1) + stat->cfg_phy_len; 2967 len = le16toh(stat->len); 2968 } 2969 2970 flags = le32toh(*(uint32_t *)(head + len)); 2971 2972 /* Discard frames with a bad FCS early. */ 2973 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) { 2974 DPRINTF(sc, IWN_DEBUG_RECV, "%s: RX flags error %x\n", 2975 __func__, flags); 2976 IFNET_STAT_INC(ifp, ierrors, 1); 2977 return; 2978 } 2979 /* Discard frames that are too short. */ 2980 if (len < sizeof (*wh)) { 2981 DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n", 2982 __func__, len); 2983 IFNET_STAT_INC(ifp, ierrors, 1); 2984 return; 2985 } 2986 2987 m1 = m_getjcl(MB_DONTWAIT, MT_DATA, M_PKTHDR, IWN_RBUF_SIZE); 2988 if (m1 == NULL) { 2989 DPRINTF(sc, IWN_DEBUG_ANY, "%s: no mbuf to restock ring\n", 2990 __func__); 2991 IFNET_STAT_INC(ifp, ierrors, 1); 2992 return; 2993 } 2994 bus_dmamap_unload(ring->data_dmat, data->map); 2995 2996 error = bus_dmamap_load(ring->data_dmat, data->map, mtod(m1, void *), 2997 IWN_RBUF_SIZE, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT); 2998 if (error != 0 && error != EFBIG) { 2999 device_printf(sc->sc_dev, 3000 "%s: bus_dmamap_load failed, error %d\n", __func__, error); 3001 m_freem(m1); 3002 3003 /* Try to reload the old mbuf. */ 3004 error = bus_dmamap_load(ring->data_dmat, data->map, 3005 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr, 3006 &paddr, BUS_DMA_NOWAIT); 3007 if (error != 0 && error != EFBIG) { 3008 panic("%s: could not load old RX mbuf", __func__); 3009 } 3010 /* Physical address may have changed. */ 3011 ring->desc[ring->cur] = htole32(paddr >> 8); 3012 bus_dmamap_sync(ring->data_dmat, ring->desc_dma.map, 3013 BUS_DMASYNC_PREWRITE); 3014 IFNET_STAT_INC(ifp, ierrors, 1); 3015 return; 3016 } 3017 3018 m = data->m; 3019 data->m = m1; 3020 /* Update RX descriptor. */ 3021 ring->desc[ring->cur] = htole32(paddr >> 8); 3022 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, 3023 BUS_DMASYNC_PREWRITE); 3024 3025 /* Finalize mbuf. */ 3026 m->m_pkthdr.rcvif = ifp; 3027 m->m_data = head; 3028 m->m_pkthdr.len = m->m_len = len; 3029 3030 /* Grab a reference to the source node. */ 3031 wh = mtod(m, struct ieee80211_frame *); 3032 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 3033 nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN && 3034 (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95; 3035 3036 rssi = ops->get_rssi(sc, stat); 3037 3038 if (ieee80211_radiotap_active(ic)) { 3039 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap; 3040 3041 tap->wr_flags = 0; 3042 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE)) 3043 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 3044 tap->wr_dbm_antsignal = (int8_t)rssi; 3045 tap->wr_dbm_antnoise = (int8_t)nf; 3046 tap->wr_tsft = stat->tstamp; 3047 switch (stat->rate) { 3048 /* CCK rates. */ 3049 case 10: tap->wr_rate = 2; break; 3050 case 20: tap->wr_rate = 4; break; 3051 case 55: tap->wr_rate = 11; break; 3052 case 110: tap->wr_rate = 22; break; 3053 /* OFDM rates. */ 3054 case 0xd: tap->wr_rate = 12; break; 3055 case 0xf: tap->wr_rate = 18; break; 3056 case 0x5: tap->wr_rate = 24; break; 3057 case 0x7: tap->wr_rate = 36; break; 3058 case 0x9: tap->wr_rate = 48; break; 3059 case 0xb: tap->wr_rate = 72; break; 3060 case 0x1: tap->wr_rate = 96; break; 3061 case 0x3: tap->wr_rate = 108; break; 3062 /* Unknown rate: should not happen. */ 3063 default: tap->wr_rate = 0; 3064 } 3065 } 3066 3067 /* Send the frame to the 802.11 layer. */ 3068 if (ni != NULL) { 3069 if (ni->ni_flags & IEEE80211_NODE_HT) 3070 m->m_flags |= M_AMPDU; 3071 (void)ieee80211_input(ni, m, rssi - nf, nf); 3072 /* Node is no longer needed. */ 3073 ieee80211_free_node(ni); 3074 } else { 3075 (void)ieee80211_input_all(ic, m, rssi - nf, nf); 3076 } 3077 3078 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 3079 3080 } 3081 3082 /* Process an incoming Compressed BlockAck. */ 3083 static void 3084 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc, 3085 struct iwn_rx_data *data) 3086 { 3087 struct iwn_ops *ops = &sc->ops; 3088 struct ifnet *ifp = sc->sc_ifp; 3089 struct iwn_node *wn; 3090 struct ieee80211_node *ni; 3091 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1); 3092 struct iwn_tx_ring *txq; 3093 struct iwn_tx_data *txdata; 3094 struct ieee80211_tx_ampdu *tap; 3095 struct mbuf *m; 3096 uint64_t bitmap; 3097 uint16_t ssn; 3098 uint8_t tid; 3099 int ackfailcnt = 0, i, lastidx, qid, *res, shift; 3100 3101 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 3102 3103 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD); 3104 3105 qid = le16toh(ba->qid); 3106 txq = &sc->txq[ba->qid]; 3107 tap = sc->qid2tap[ba->qid]; 3108 tid = tap->txa_ac; 3109 wn = (void *)tap->txa_ni; 3110 3111 res = NULL; 3112 ssn = 0; 3113 if (!IEEE80211_AMPDU_RUNNING(tap)) { 3114 res = tap->txa_private; 3115 ssn = tap->txa_start & 0xfff; 3116 } 3117 3118 for (lastidx = le16toh(ba->ssn) & 0xff; txq->read != lastidx;) { 3119 txdata = &txq->data[txq->read]; 3120 3121 /* Unmap and free mbuf. */ 3122 bus_dmamap_sync(txq->data_dmat, txdata->map, 3123 BUS_DMASYNC_POSTWRITE); 3124 bus_dmamap_unload(txq->data_dmat, txdata->map); 3125 m = txdata->m, txdata->m = NULL; 3126 ni = txdata->ni, txdata->ni = NULL; 3127 3128 KASSERT(ni != NULL, ("no node")); 3129 KASSERT(m != NULL, ("no mbuf")); 3130 3131 ieee80211_tx_complete(ni, m, 1); 3132 3133 txq->queued--; 3134 txq->read = (txq->read + 1) % IWN_TX_RING_COUNT; 3135 } 3136 3137 if (txq->queued == 0 && res != NULL) { 3138 iwn_nic_lock(sc); 3139 ops->ampdu_tx_stop(sc, qid, tid, ssn); 3140 iwn_nic_unlock(sc); 3141 sc->qid2tap[qid] = NULL; 3142 kfree(res, M_DEVBUF); 3143 return; 3144 } 3145 3146 if (wn->agg[tid].bitmap == 0) 3147 return; 3148 3149 shift = wn->agg[tid].startidx - ((le16toh(ba->seq) >> 4) & 0xff); 3150 if (shift < 0) 3151 shift += 0x100; 3152 3153 if (wn->agg[tid].nframes > (64 - shift)) 3154 return; 3155 3156 ni = tap->txa_ni; 3157 bitmap = (le64toh(ba->bitmap) >> shift) & wn->agg[tid].bitmap; 3158 for (i = 0; bitmap; i++) { 3159 if ((bitmap & 1) == 0) { 3160 IFNET_STAT_INC(ifp, oerrors, 1); 3161 ieee80211_ratectl_tx_complete(ni->ni_vap, ni, 3162 IEEE80211_RATECTL_TX_FAILURE, &ackfailcnt, NULL); 3163 } else { 3164 IFNET_STAT_INC(ifp, opackets, 1); 3165 ieee80211_ratectl_tx_complete(ni->ni_vap, ni, 3166 IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL); 3167 } 3168 bitmap >>= 1; 3169 } 3170 3171 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 3172 3173 } 3174 3175 /* 3176 * Process a CALIBRATION_RESULT notification sent by the initialization 3177 * firmware on response to a CMD_CALIB_CONFIG command (5000 only). 3178 */ 3179 static void 3180 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc, 3181 struct iwn_rx_data *data) 3182 { 3183 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1); 3184 int len, idx = -1; 3185 3186 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 3187 3188 /* Runtime firmware should not send such a notification. */ 3189 if (sc->sc_flags & IWN_FLAG_CALIB_DONE){ 3190 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received after clib done\n", 3191 __func__); 3192 return; 3193 } 3194 len = (le32toh(desc->len) & 0x3fff) - 4; 3195 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD); 3196 3197 switch (calib->code) { 3198 case IWN5000_PHY_CALIB_DC: 3199 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_DC) 3200 idx = 0; 3201 break; 3202 case IWN5000_PHY_CALIB_LO: 3203 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_LO) 3204 idx = 1; 3205 break; 3206 case IWN5000_PHY_CALIB_TX_IQ: 3207 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ) 3208 idx = 2; 3209 break; 3210 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC: 3211 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC) 3212 idx = 3; 3213 break; 3214 case IWN5000_PHY_CALIB_BASE_BAND: 3215 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_BASE_BAND) 3216 idx = 4; 3217 break; 3218 } 3219 if (idx == -1) /* Ignore other results. */ 3220 return; 3221 3222 /* Save calibration result. */ 3223 if (sc->calibcmd[idx].buf != NULL) 3224 kfree(sc->calibcmd[idx].buf, M_DEVBUF); 3225 sc->calibcmd[idx].buf = kmalloc(len, M_DEVBUF, M_INTWAIT); 3226 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 3227 "saving calibration result idx=%d, code=%d len=%d\n", idx, calib->code, len); 3228 sc->calibcmd[idx].len = len; 3229 memcpy(sc->calibcmd[idx].buf, calib, len); 3230 } 3231 3232 static void 3233 iwn_stats_update(struct iwn_softc *sc, struct iwn_calib_state *calib, 3234 struct iwn_stats *stats, int len) 3235 { 3236 struct iwn_stats_bt *stats_bt; 3237 struct iwn_stats *lstats; 3238 3239 /* 3240 * First - check whether the length is the bluetooth or normal. 3241 * 3242 * If it's normal - just copy it and bump out. 3243 * Otherwise we have to convert things. 3244 */ 3245 3246 if (len == sizeof(struct iwn_stats) + 4) { 3247 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats)); 3248 sc->last_stat_valid = 1; 3249 return; 3250 } 3251 3252 /* 3253 * If it's not the bluetooth size - log, then just copy. 3254 */ 3255 if (len != sizeof(struct iwn_stats_bt) + 4) { 3256 DPRINTF(sc, IWN_DEBUG_STATS, 3257 "%s: size of rx statistics (%d) not an expected size!\n", 3258 __func__, 3259 len); 3260 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats)); 3261 sc->last_stat_valid = 1; 3262 return; 3263 } 3264 3265 /* 3266 * Ok. Time to copy. 3267 */ 3268 stats_bt = (struct iwn_stats_bt *) stats; 3269 lstats = &sc->last_stat; 3270 3271 /* flags */ 3272 lstats->flags = stats_bt->flags; 3273 /* rx_bt */ 3274 memcpy(&lstats->rx.ofdm, &stats_bt->rx_bt.ofdm, 3275 sizeof(struct iwn_rx_phy_stats)); 3276 memcpy(&lstats->rx.cck, &stats_bt->rx_bt.cck, 3277 sizeof(struct iwn_rx_phy_stats)); 3278 memcpy(&lstats->rx.general, &stats_bt->rx_bt.general_bt.common, 3279 sizeof(struct iwn_rx_general_stats)); 3280 memcpy(&lstats->rx.ht, &stats_bt->rx_bt.ht, 3281 sizeof(struct iwn_rx_ht_phy_stats)); 3282 /* tx */ 3283 memcpy(&lstats->tx, &stats_bt->tx, 3284 sizeof(struct iwn_tx_stats)); 3285 /* general */ 3286 memcpy(&lstats->general, &stats_bt->general, 3287 sizeof(struct iwn_general_stats)); 3288 3289 /* XXX TODO: Squirrel away the extra bluetooth stats somewhere */ 3290 sc->last_stat_valid = 1; 3291 } 3292 3293 /* 3294 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification. 3295 * The latter is sent by the firmware after each received beacon. 3296 */ 3297 static void 3298 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc, 3299 struct iwn_rx_data *data) 3300 { 3301 struct iwn_ops *ops = &sc->ops; 3302 struct ifnet *ifp = sc->sc_ifp; 3303 struct ieee80211com *ic = ifp->if_l2com; 3304 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3305 struct iwn_calib_state *calib = &sc->calib; 3306 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1); 3307 struct iwn_stats *lstats; 3308 int temp; 3309 3310 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 3311 3312 /* Ignore statistics received during a scan. */ 3313 if (vap->iv_state != IEEE80211_S_RUN || 3314 (ic->ic_flags & IEEE80211_F_SCAN)){ 3315 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received during calib\n", 3316 __func__); 3317 return; 3318 } 3319 3320 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD); 3321 3322 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_STATS, 3323 "%s: received statistics, cmd %d, len %d\n", 3324 __func__, desc->type, le16toh(desc->len)); 3325 sc->calib_cnt = 0; /* Reset TX power calibration timeout. */ 3326 3327 /* 3328 * Collect/track general statistics for reporting. 3329 * 3330 * This takes care of ensuring that the bluetooth sized message 3331 * will be correctly converted to the legacy sized message. 3332 */ 3333 iwn_stats_update(sc, calib, stats, le16toh(desc->len)); 3334 3335 /* 3336 * And now, let's take a reference of it to use! 3337 */ 3338 lstats = &sc->last_stat; 3339 3340 /* Test if temperature has changed. */ 3341 if (lstats->general.temp != sc->rawtemp) { 3342 /* Convert "raw" temperature to degC. */ 3343 sc->rawtemp = stats->general.temp; 3344 temp = ops->get_temperature(sc); 3345 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d\n", 3346 __func__, temp); 3347 3348 /* Update TX power if need be (4965AGN only). */ 3349 if (sc->hw_type == IWN_HW_REV_TYPE_4965) 3350 iwn4965_power_calibration(sc, temp); 3351 } 3352 3353 if (desc->type != IWN_BEACON_STATISTICS) 3354 return; /* Reply to a statistics request. */ 3355 3356 sc->noise = iwn_get_noise(&lstats->rx.general); 3357 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise); 3358 3359 /* Test that RSSI and noise are present in stats report. */ 3360 if (le32toh(lstats->rx.general.flags) != 1) { 3361 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n", 3362 "received statistics without RSSI"); 3363 return; 3364 } 3365 3366 if (calib->state == IWN_CALIB_STATE_ASSOC) 3367 iwn_collect_noise(sc, &lstats->rx.general); 3368 else if (calib->state == IWN_CALIB_STATE_RUN) { 3369 iwn_tune_sensitivity(sc, &lstats->rx); 3370 /* 3371 * XXX TODO: Only run the RX recovery if we're associated! 3372 */ 3373 iwn_check_rx_recovery(sc, lstats); 3374 iwn_save_stats_counters(sc, lstats); 3375 } 3376 3377 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 3378 } 3379 3380 /* 3381 * Save the relevant statistic counters for the next calibration 3382 * pass. 3383 */ 3384 static void 3385 iwn_save_stats_counters(struct iwn_softc *sc, const struct iwn_stats *rs) 3386 { 3387 struct iwn_calib_state *calib = &sc->calib; 3388 3389 /* Save counters values for next call. */ 3390 calib->bad_plcp_cck = le32toh(rs->rx.cck.bad_plcp); 3391 calib->fa_cck = le32toh(rs->rx.cck.fa); 3392 calib->bad_plcp_ht = le32toh(rs->rx.ht.bad_plcp); 3393 calib->bad_plcp_ofdm = le32toh(rs->rx.ofdm.bad_plcp); 3394 calib->fa_ofdm = le32toh(rs->rx.ofdm.fa); 3395 3396 /* Last time we received these tick values */ 3397 sc->last_calib_ticks = ticks; 3398 } 3399 3400 /* 3401 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN 3402 * and 5000 adapters have different incompatible TX status formats. 3403 */ 3404 static void 3405 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, 3406 struct iwn_rx_data *data) 3407 { 3408 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1); 3409 struct iwn_tx_ring *ring; 3410 int qid; 3411 3412 qid = desc->qid & 0xf; 3413 ring = &sc->txq[qid]; 3414 3415 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: " 3416 "qid %d idx %d retries %d nkill %d rate %x duration %d status %x\n", 3417 __func__, desc->qid, desc->idx, stat->ackfailcnt, 3418 stat->btkillcnt, stat->rate, le16toh(stat->duration), 3419 le32toh(stat->status)); 3420 3421 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD); 3422 if (qid >= sc->firstaggqueue) { 3423 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes, 3424 &stat->status); 3425 } else { 3426 iwn_tx_done(sc, desc, stat->ackfailcnt, 3427 le32toh(stat->status) & 0xff); 3428 } 3429 } 3430 3431 static void 3432 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, 3433 struct iwn_rx_data *data) 3434 { 3435 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1); 3436 struct iwn_tx_ring *ring; 3437 int qid; 3438 3439 qid = desc->qid & 0xf; 3440 ring = &sc->txq[qid]; 3441 3442 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: " 3443 "qid %d idx %d retries %d nkill %d rate %x duration %d status %x\n", 3444 __func__, desc->qid, desc->idx, stat->ackfailcnt, 3445 stat->btkillcnt, stat->rate, le16toh(stat->duration), 3446 le32toh(stat->status)); 3447 3448 #ifdef notyet 3449 /* Reset TX scheduler slot. */ 3450 iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx); 3451 #endif 3452 3453 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD); 3454 if (qid >= sc->firstaggqueue) { 3455 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes, 3456 &stat->status); 3457 } else { 3458 iwn_tx_done(sc, desc, stat->ackfailcnt, 3459 le16toh(stat->status) & 0xff); 3460 } 3461 } 3462 3463 /* 3464 * Adapter-independent backend for TX_DONE firmware notifications. 3465 */ 3466 static void 3467 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int ackfailcnt, 3468 uint8_t status) 3469 { 3470 struct ifnet *ifp = sc->sc_ifp; 3471 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf]; 3472 struct iwn_tx_data *data = &ring->data[desc->idx]; 3473 struct mbuf *m; 3474 struct ieee80211_node *ni; 3475 struct ieee80211vap *vap; 3476 3477 KASSERT(data->ni != NULL, ("no node")); 3478 3479 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 3480 3481 /* Unmap and free mbuf. */ 3482 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE); 3483 bus_dmamap_unload(ring->data_dmat, data->map); 3484 m = data->m, data->m = NULL; 3485 ni = data->ni, data->ni = NULL; 3486 vap = ni->ni_vap; 3487 3488 /* 3489 * Update rate control statistics for the node. 3490 */ 3491 if (status & IWN_TX_FAIL) { 3492 IFNET_STAT_INC(ifp, oerrors, 1); 3493 ieee80211_ratectl_tx_complete(vap, ni, 3494 IEEE80211_RATECTL_TX_FAILURE, &ackfailcnt, NULL); 3495 } else { 3496 IFNET_STAT_INC(ifp, opackets, 1); 3497 ieee80211_ratectl_tx_complete(vap, ni, 3498 IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL); 3499 } 3500 3501 /* 3502 * Channels marked for "radar" require traffic to be received 3503 * to unlock before we can transmit. Until traffic is seen 3504 * any attempt to transmit is returned immediately with status 3505 * set to IWN_TX_FAIL_TX_LOCKED. Unfortunately this can easily 3506 * happen on first authenticate after scanning. To workaround 3507 * this we ignore a failure of this sort in AUTH state so the 3508 * 802.11 layer will fall back to using a timeout to wait for 3509 * the AUTH reply. This allows the firmware time to see 3510 * traffic so a subsequent retry of AUTH succeeds. It's 3511 * unclear why the firmware does not maintain state for 3512 * channels recently visited as this would allow immediate 3513 * use of the channel after a scan (where we see traffic). 3514 */ 3515 if (status == IWN_TX_FAIL_TX_LOCKED && 3516 ni->ni_vap->iv_state == IEEE80211_S_AUTH) 3517 ieee80211_tx_complete(ni, m, 0); 3518 else 3519 ieee80211_tx_complete(ni, m, 3520 (status & IWN_TX_FAIL) != 0); 3521 3522 sc->sc_tx_timer = 0; 3523 if (--ring->queued < IWN_TX_RING_LOMARK) { 3524 sc->qfullmsk &= ~(1 << ring->qid); 3525 if (sc->qfullmsk == 0 && ifq_is_oactive(&ifp->if_snd)) { 3526 ifq_clr_oactive(&ifp->if_snd); 3527 iwn_start_locked(ifp); 3528 } 3529 } 3530 3531 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 3532 3533 } 3534 3535 /* 3536 * Process a "command done" firmware notification. This is where we wakeup 3537 * processes waiting for a synchronous command completion. 3538 */ 3539 static void 3540 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc) 3541 { 3542 struct iwn_tx_ring *ring; 3543 struct iwn_tx_data *data; 3544 int cmd_queue_num; 3545 3546 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) 3547 cmd_queue_num = IWN_PAN_CMD_QUEUE; 3548 else 3549 cmd_queue_num = IWN_CMD_QUEUE_NUM; 3550 3551 if ((desc->qid & IWN_RX_DESC_QID_MSK) != cmd_queue_num) 3552 return; /* Not a command ack. */ 3553 3554 ring = &sc->txq[cmd_queue_num]; 3555 data = &ring->data[desc->idx]; 3556 3557 /* If the command was mapped in an mbuf, free it. */ 3558 if (data->m != NULL) { 3559 bus_dmamap_sync(ring->data_dmat, data->map, 3560 BUS_DMASYNC_POSTWRITE); 3561 bus_dmamap_unload(ring->data_dmat, data->map); 3562 m_freem(data->m); 3563 data->m = NULL; 3564 } 3565 wakeup(&ring->desc[desc->idx]); 3566 } 3567 3568 static void 3569 iwn_ampdu_tx_done(struct iwn_softc *sc, int qid, int idx, int nframes, 3570 void *stat) 3571 { 3572 struct iwn_ops *ops = &sc->ops; 3573 struct ifnet *ifp = sc->sc_ifp; 3574 struct iwn_tx_ring *ring = &sc->txq[qid]; 3575 struct iwn_tx_data *data; 3576 struct mbuf *m; 3577 struct iwn_node *wn; 3578 struct ieee80211_node *ni; 3579 struct ieee80211_tx_ampdu *tap; 3580 uint64_t bitmap; 3581 uint32_t *status = stat; 3582 uint16_t *aggstatus = stat; 3583 uint16_t ssn; 3584 uint8_t tid; 3585 int bit, i, lastidx, *res, seqno, shift, start; 3586 3587 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 3588 3589 if (nframes == 1) { 3590 if ((*status & 0xff) != 1 && (*status & 0xff) != 2) { 3591 #ifdef NOT_YET 3592 kprintf("ieee80211_send_bar()\n"); 3593 #endif 3594 /* 3595 * If we completely fail a transmit, make sure a 3596 * notification is pushed up to the rate control 3597 * layer. 3598 */ 3599 tap = sc->qid2tap[qid]; 3600 tid = tap->txa_ac; 3601 wn = (void *)tap->txa_ni; 3602 ni = tap->txa_ni; 3603 ieee80211_ratectl_tx_complete(ni->ni_vap, ni, 3604 IEEE80211_RATECTL_TX_FAILURE, &nframes, NULL); 3605 } 3606 } 3607 3608 bitmap = 0; 3609 start = idx; 3610 for (i = 0; i < nframes; i++) { 3611 if (le16toh(aggstatus[i * 2]) & 0xc) 3612 continue; 3613 3614 idx = le16toh(aggstatus[2*i + 1]) & 0xff; 3615 bit = idx - start; 3616 shift = 0; 3617 if (bit >= 64) { 3618 shift = 0x100 - idx + start; 3619 bit = 0; 3620 start = idx; 3621 } else if (bit <= -64) 3622 bit = 0x100 - start + idx; 3623 else if (bit < 0) { 3624 shift = start - idx; 3625 start = idx; 3626 bit = 0; 3627 } 3628 bitmap = bitmap << shift; 3629 bitmap |= 1ULL << bit; 3630 } 3631 tap = sc->qid2tap[qid]; 3632 tid = tap->txa_ac; 3633 wn = (void *)tap->txa_ni; 3634 wn->agg[tid].bitmap = bitmap; 3635 wn->agg[tid].startidx = start; 3636 wn->agg[tid].nframes = nframes; 3637 3638 res = NULL; 3639 ssn = 0; 3640 if (!IEEE80211_AMPDU_RUNNING(tap)) { 3641 res = tap->txa_private; 3642 ssn = tap->txa_start & 0xfff; 3643 } 3644 3645 seqno = le32toh(*(status + nframes)) & 0xfff; 3646 for (lastidx = (seqno & 0xff); ring->read != lastidx;) { 3647 data = &ring->data[ring->read]; 3648 3649 /* Unmap and free mbuf. */ 3650 bus_dmamap_sync(ring->data_dmat, data->map, 3651 BUS_DMASYNC_POSTWRITE); 3652 bus_dmamap_unload(ring->data_dmat, data->map); 3653 m = data->m, data->m = NULL; 3654 ni = data->ni, data->ni = NULL; 3655 3656 KASSERT(ni != NULL, ("no node")); 3657 KASSERT(m != NULL, ("no mbuf")); 3658 3659 ieee80211_tx_complete(ni, m, 1); 3660 3661 ring->queued--; 3662 ring->read = (ring->read + 1) % IWN_TX_RING_COUNT; 3663 } 3664 3665 if (ring->queued == 0 && res != NULL) { 3666 iwn_nic_lock(sc); 3667 ops->ampdu_tx_stop(sc, qid, tid, ssn); 3668 iwn_nic_unlock(sc); 3669 sc->qid2tap[qid] = NULL; 3670 kfree(res, M_DEVBUF); 3671 return; 3672 } 3673 3674 sc->sc_tx_timer = 0; 3675 if (ring->queued < IWN_TX_RING_LOMARK) { 3676 sc->qfullmsk &= ~(1 << ring->qid); 3677 if (sc->qfullmsk == 0 && ifq_is_oactive(&ifp->if_snd)) { 3678 ifq_clr_oactive(&ifp->if_snd); 3679 iwn_start_locked(ifp); 3680 } 3681 } 3682 3683 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 3684 3685 } 3686 3687 /* 3688 * Process an INT_FH_RX or INT_SW_RX interrupt. 3689 */ 3690 static void 3691 iwn_notif_intr(struct iwn_softc *sc) 3692 { 3693 struct iwn_ops *ops = &sc->ops; 3694 struct ifnet *ifp = sc->sc_ifp; 3695 struct ieee80211com *ic = ifp->if_l2com; 3696 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3697 uint16_t hw; 3698 3699 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map, 3700 BUS_DMASYNC_POSTREAD); 3701 3702 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff; 3703 while (sc->rxq.cur != hw) { 3704 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur]; 3705 struct iwn_rx_desc *desc; 3706 3707 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 3708 BUS_DMASYNC_POSTREAD); 3709 desc = mtod(data->m, struct iwn_rx_desc *); 3710 3711 DPRINTF(sc, IWN_DEBUG_RECV, 3712 "%s: cur=%d; qid %x idx %d flags %x type %d(%s) len %d\n", 3713 __func__, sc->rxq.cur, desc->qid & 0xf, desc->idx, desc->flags, 3714 desc->type, iwn_intr_str(desc->type), 3715 le16toh(desc->len)); 3716 3717 if (!(desc->qid & IWN_UNSOLICITED_RX_NOTIF)) /* Reply to a command. */ 3718 iwn_cmd_done(sc, desc); 3719 3720 switch (desc->type) { 3721 case IWN_RX_PHY: 3722 iwn_rx_phy(sc, desc, data); 3723 break; 3724 3725 case IWN_RX_DONE: /* 4965AGN only. */ 3726 case IWN_MPDU_RX_DONE: 3727 /* An 802.11 frame has been received. */ 3728 iwn_rx_done(sc, desc, data); 3729 break; 3730 3731 case IWN_RX_COMPRESSED_BA: 3732 /* A Compressed BlockAck has been received. */ 3733 iwn_rx_compressed_ba(sc, desc, data); 3734 break; 3735 3736 case IWN_TX_DONE: 3737 /* An 802.11 frame has been transmitted. */ 3738 ops->tx_done(sc, desc, data); 3739 break; 3740 3741 case IWN_RX_STATISTICS: 3742 case IWN_BEACON_STATISTICS: 3743 iwn_rx_statistics(sc, desc, data); 3744 break; 3745 3746 case IWN_BEACON_MISSED: 3747 { 3748 struct iwn_beacon_missed *miss = 3749 (struct iwn_beacon_missed *)(desc + 1); 3750 int misses; 3751 3752 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 3753 BUS_DMASYNC_POSTREAD); 3754 misses = le32toh(miss->consecutive); 3755 3756 DPRINTF(sc, IWN_DEBUG_STATE, 3757 "%s: beacons missed %d/%d\n", __func__, 3758 misses, le32toh(miss->total)); 3759 /* 3760 * If more than 5 consecutive beacons are missed, 3761 * reinitialize the sensitivity state machine. 3762 */ 3763 if (vap->iv_state == IEEE80211_S_RUN && 3764 (ic->ic_flags & IEEE80211_F_SCAN) == 0) { 3765 if (misses > 5) 3766 (void)iwn_init_sensitivity(sc); 3767 if (misses >= vap->iv_bmissthreshold) { 3768 ieee80211_beacon_miss(ic); 3769 } 3770 } 3771 break; 3772 } 3773 case IWN_UC_READY: 3774 { 3775 struct iwn_ucode_info *uc = 3776 (struct iwn_ucode_info *)(desc + 1); 3777 3778 /* The microcontroller is ready. */ 3779 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 3780 BUS_DMASYNC_POSTREAD); 3781 DPRINTF(sc, IWN_DEBUG_RESET, 3782 "microcode alive notification version=%d.%d " 3783 "subtype=%x alive=%x\n", uc->major, uc->minor, 3784 uc->subtype, le32toh(uc->valid)); 3785 3786 if (le32toh(uc->valid) != 1) { 3787 device_printf(sc->sc_dev, 3788 "microcontroller initialization failed"); 3789 break; 3790 } 3791 if (uc->subtype == IWN_UCODE_INIT) { 3792 /* Save microcontroller report. */ 3793 memcpy(&sc->ucode_info, uc, sizeof (*uc)); 3794 } 3795 /* Save the address of the error log in SRAM. */ 3796 sc->errptr = le32toh(uc->errptr); 3797 break; 3798 } 3799 case IWN_STATE_CHANGED: 3800 { 3801 /* 3802 * State change allows hardware switch change to be 3803 * noted. However, we handle this in iwn_intr as we 3804 * get both the enable/disble intr. 3805 */ 3806 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 3807 BUS_DMASYNC_POSTREAD); 3808 #ifdef IWN_DEBUG 3809 uint32_t *status = (uint32_t *)(desc + 1); 3810 DPRINTF(sc, IWN_DEBUG_INTR | IWN_DEBUG_STATE, 3811 "state changed to %x\n", 3812 le32toh(*status)); 3813 #endif 3814 break; 3815 } 3816 case IWN_START_SCAN: 3817 { 3818 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 3819 BUS_DMASYNC_POSTREAD); 3820 #ifdef IWN_DEBUG 3821 struct iwn_start_scan *scan = 3822 (struct iwn_start_scan *)(desc + 1); 3823 DPRINTF(sc, IWN_DEBUG_ANY, 3824 "%s: scanning channel %d status %x\n", 3825 __func__, scan->chan, le32toh(scan->status)); 3826 #endif 3827 break; 3828 } 3829 case IWN_STOP_SCAN: 3830 { 3831 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 3832 BUS_DMASYNC_POSTREAD); 3833 #ifdef IWN_DEBUG 3834 struct iwn_stop_scan *scan = 3835 (struct iwn_stop_scan *)(desc + 1); 3836 DPRINTF(sc, IWN_DEBUG_STATE | IWN_DEBUG_SCAN, 3837 "scan finished nchan=%d status=%d chan=%d\n", 3838 scan->nchan, scan->status, scan->chan); 3839 #endif 3840 sc->sc_is_scanning = 0; 3841 ieee80211_scan_next(vap); 3842 break; 3843 } 3844 case IWN5000_CALIBRATION_RESULT: 3845 iwn5000_rx_calib_results(sc, desc, data); 3846 break; 3847 3848 case IWN5000_CALIBRATION_DONE: 3849 sc->sc_flags |= IWN_FLAG_CALIB_DONE; 3850 wakeup(sc); 3851 break; 3852 } 3853 3854 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT; 3855 } 3856 3857 /* Tell the firmware what we have processed. */ 3858 hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1; 3859 IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7); 3860 } 3861 3862 /* 3863 * Process an INT_WAKEUP interrupt raised when the microcontroller wakes up 3864 * from power-down sleep mode. 3865 */ 3866 static void 3867 iwn_wakeup_intr(struct iwn_softc *sc) 3868 { 3869 int qid; 3870 3871 DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n", 3872 __func__); 3873 3874 /* Wakeup RX and TX rings. */ 3875 IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7); 3876 for (qid = 0; qid < sc->ntxqs; qid++) { 3877 struct iwn_tx_ring *ring = &sc->txq[qid]; 3878 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur); 3879 } 3880 } 3881 3882 static void 3883 iwn_rftoggle_intr(struct iwn_softc *sc) 3884 { 3885 struct ifnet *ifp = sc->sc_ifp; 3886 struct ieee80211com *ic = ifp->if_l2com; 3887 uint32_t tmp = IWN_READ(sc, IWN_GP_CNTRL); 3888 3889 device_printf(sc->sc_dev, "RF switch: radio %s\n", 3890 (tmp & IWN_GP_CNTRL_RFKILL) ? "enabled" : "disabled"); 3891 if (tmp & IWN_GP_CNTRL_RFKILL) 3892 ieee80211_runtask(ic, &sc->sc_radioon_task); 3893 else 3894 ieee80211_runtask(ic, &sc->sc_radiooff_task); 3895 } 3896 3897 /* 3898 * Dump the error log of the firmware when a firmware panic occurs. Although 3899 * we can't debug the firmware because it is neither open source nor free, it 3900 * can help us to identify certain classes of problems. 3901 */ 3902 static void 3903 iwn_fatal_intr(struct iwn_softc *sc) 3904 { 3905 struct iwn_fw_dump dump; 3906 int i; 3907 3908 /* Force a complete recalibration on next init. */ 3909 sc->sc_flags &= ~IWN_FLAG_CALIB_DONE; 3910 3911 /* Check that the error log address is valid. */ 3912 if (sc->errptr < IWN_FW_DATA_BASE || 3913 sc->errptr + sizeof (dump) > 3914 IWN_FW_DATA_BASE + sc->fw_data_maxsz) { 3915 kprintf("%s: bad firmware error log address 0x%08x\n", __func__, 3916 sc->errptr); 3917 return; 3918 } 3919 if (iwn_nic_lock(sc) != 0) { 3920 kprintf("%s: could not read firmware error log\n", __func__); 3921 return; 3922 } 3923 /* Read firmware error log from SRAM. */ 3924 iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump, 3925 sizeof (dump) / sizeof (uint32_t)); 3926 iwn_nic_unlock(sc); 3927 3928 if (dump.valid == 0) { 3929 kprintf("%s: firmware error log is empty\n", __func__); 3930 return; 3931 } 3932 kprintf("firmware error log:\n"); 3933 kprintf(" error type = \"%s\" (0x%08X)\n", 3934 (dump.id < nitems(iwn_fw_errmsg)) ? 3935 iwn_fw_errmsg[dump.id] : "UNKNOWN", 3936 dump.id); 3937 kprintf(" program counter = 0x%08X\n", dump.pc); 3938 kprintf(" source line = 0x%08X\n", dump.src_line); 3939 kprintf(" error data = 0x%08X%08X\n", 3940 dump.error_data[0], dump.error_data[1]); 3941 kprintf(" branch link = 0x%08X%08X\n", 3942 dump.branch_link[0], dump.branch_link[1]); 3943 kprintf(" interrupt link = 0x%08X%08X\n", 3944 dump.interrupt_link[0], dump.interrupt_link[1]); 3945 kprintf(" time = %u\n", dump.time[0]); 3946 3947 /* Dump driver status (TX and RX rings) while we're here. */ 3948 kprintf("driver status:\n"); 3949 for (i = 0; i < sc->ntxqs; i++) { 3950 struct iwn_tx_ring *ring = &sc->txq[i]; 3951 kprintf(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n", 3952 i, ring->qid, ring->cur, ring->queued); 3953 } 3954 kprintf(" rx ring: cur=%d\n", sc->rxq.cur); 3955 } 3956 3957 static void 3958 iwn_intr(void *arg) 3959 { 3960 struct iwn_softc *sc = arg; 3961 struct ifnet *ifp = sc->sc_ifp; 3962 uint32_t r1, r2, tmp; 3963 3964 /* Disable interrupts. */ 3965 IWN_WRITE(sc, IWN_INT_MASK, 0); 3966 3967 /* Read interrupts from ICT (fast) or from registers (slow). */ 3968 if (sc->sc_flags & IWN_FLAG_USE_ICT) { 3969 tmp = 0; 3970 while (sc->ict[sc->ict_cur] != 0) { 3971 tmp |= sc->ict[sc->ict_cur]; 3972 sc->ict[sc->ict_cur] = 0; /* Acknowledge. */ 3973 sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT; 3974 } 3975 tmp = le32toh(tmp); 3976 if (tmp == 0xffffffff) /* Shouldn't happen. */ 3977 tmp = 0; 3978 else if (tmp & 0xc0000) /* Workaround a HW bug. */ 3979 tmp |= 0x8000; 3980 r1 = (tmp & 0xff00) << 16 | (tmp & 0xff); 3981 r2 = 0; /* Unused. */ 3982 } else { 3983 r1 = IWN_READ(sc, IWN_INT); 3984 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0) 3985 return; /* Hardware gone! */ 3986 r2 = IWN_READ(sc, IWN_FH_INT); 3987 } 3988 3989 DPRINTF(sc, IWN_DEBUG_INTR, "interrupt reg1=0x%08x reg2=0x%08x\n" 3990 , r1, r2); 3991 3992 if (r1 == 0 && r2 == 0) 3993 goto done; /* Interrupt not for us. */ 3994 3995 /* Acknowledge interrupts. */ 3996 IWN_WRITE(sc, IWN_INT, r1); 3997 if (!(sc->sc_flags & IWN_FLAG_USE_ICT)) 3998 IWN_WRITE(sc, IWN_FH_INT, r2); 3999 4000 if (r1 & IWN_INT_RF_TOGGLED) { 4001 iwn_rftoggle_intr(sc); 4002 goto done; 4003 } 4004 if (r1 & IWN_INT_CT_REACHED) { 4005 device_printf(sc->sc_dev, "%s: critical temperature reached!\n", 4006 __func__); 4007 } 4008 if (r1 & (IWN_INT_SW_ERR | IWN_INT_HW_ERR)) { 4009 device_printf(sc->sc_dev, "%s: fatal firmware error\n", 4010 __func__); 4011 #ifdef IWN_DEBUG 4012 iwn_debug_register(sc); 4013 #endif 4014 /* Dump firmware error log and stop. */ 4015 iwn_fatal_intr(sc); 4016 4017 taskqueue_enqueue(sc->sc_tq, &sc->sc_panic_task); 4018 goto done; 4019 } 4020 if ((r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX | IWN_INT_RX_PERIODIC)) || 4021 (r2 & IWN_FH_INT_RX)) { 4022 if (sc->sc_flags & IWN_FLAG_USE_ICT) { 4023 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) 4024 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX); 4025 IWN_WRITE_1(sc, IWN_INT_PERIODIC, 4026 IWN_INT_PERIODIC_DIS); 4027 iwn_notif_intr(sc); 4028 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) { 4029 IWN_WRITE_1(sc, IWN_INT_PERIODIC, 4030 IWN_INT_PERIODIC_ENA); 4031 } 4032 } else 4033 iwn_notif_intr(sc); 4034 } 4035 4036 if ((r1 & IWN_INT_FH_TX) || (r2 & IWN_FH_INT_TX)) { 4037 if (sc->sc_flags & IWN_FLAG_USE_ICT) 4038 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX); 4039 wakeup(sc); /* FH DMA transfer completed. */ 4040 } 4041 4042 if (r1 & IWN_INT_ALIVE) 4043 wakeup(sc); /* Firmware is alive. */ 4044 4045 if (r1 & IWN_INT_WAKEUP) 4046 iwn_wakeup_intr(sc); 4047 4048 done: 4049 /* Re-enable interrupts. */ 4050 if (ifp->if_flags & IFF_UP) 4051 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask); 4052 } 4053 4054 /* 4055 * Update TX scheduler ring when transmitting an 802.11 frame (4965AGN and 4056 * 5000 adapters use a slightly different format). 4057 */ 4058 static void 4059 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id, 4060 uint16_t len) 4061 { 4062 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx]; 4063 4064 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 4065 4066 *w = htole16(len + 8); 4067 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, 4068 BUS_DMASYNC_PREWRITE); 4069 if (idx < IWN_SCHED_WINSZ) { 4070 *(w + IWN_TX_RING_COUNT) = *w; 4071 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, 4072 BUS_DMASYNC_PREWRITE); 4073 } 4074 } 4075 4076 static void 4077 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id, 4078 uint16_t len) 4079 { 4080 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx]; 4081 4082 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 4083 4084 *w = htole16(id << 12 | (len + 8)); 4085 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, 4086 BUS_DMASYNC_PREWRITE); 4087 if (idx < IWN_SCHED_WINSZ) { 4088 *(w + IWN_TX_RING_COUNT) = *w; 4089 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, 4090 BUS_DMASYNC_PREWRITE); 4091 } 4092 } 4093 4094 #ifdef notyet 4095 static void 4096 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx) 4097 { 4098 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx]; 4099 4100 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 4101 4102 *w = (*w & htole16(0xf000)) | htole16(1); 4103 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, 4104 BUS_DMASYNC_PREWRITE); 4105 if (idx < IWN_SCHED_WINSZ) { 4106 *(w + IWN_TX_RING_COUNT) = *w; 4107 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, 4108 BUS_DMASYNC_PREWRITE); 4109 } 4110 } 4111 #endif 4112 4113 /* 4114 * Check whether OFDM 11g protection will be enabled for the given rate. 4115 * 4116 * The original driver code only enabled protection for OFDM rates. 4117 * It didn't check to see whether it was operating in 11a or 11bg mode. 4118 */ 4119 static int 4120 iwn_check_rate_needs_protection(struct iwn_softc *sc, 4121 struct ieee80211vap *vap, uint8_t rate) 4122 { 4123 struct ieee80211com *ic = vap->iv_ic; 4124 4125 /* 4126 * Not in 2GHz mode? Then there's no need to enable OFDM 4127 * 11bg protection. 4128 */ 4129 if (! IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan)) { 4130 return (0); 4131 } 4132 4133 /* 4134 * 11bg protection not enabled? Then don't use it. 4135 */ 4136 if ((ic->ic_flags & IEEE80211_F_USEPROT) == 0) 4137 return (0); 4138 4139 /* 4140 * If it's an 11n rate, then for now we enable 4141 * protection. 4142 */ 4143 if (rate & IEEE80211_RATE_MCS) { 4144 return (1); 4145 } 4146 4147 /* 4148 * Do a rate table lookup. If the PHY is CCK, 4149 * don't do protection. 4150 */ 4151 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_CCK) 4152 return (0); 4153 4154 /* 4155 * Yup, enable protection. 4156 */ 4157 return (1); 4158 } 4159 4160 /* 4161 * return a value between 0 and IWN_MAX_TX_RETRIES-1 as an index into 4162 * the link quality table that reflects this particular entry. 4163 */ 4164 static int 4165 iwn_tx_rate_to_linkq_offset(struct iwn_softc *sc, struct ieee80211_node *ni, 4166 uint8_t rate) 4167 { 4168 struct ieee80211_rateset *rs; 4169 int is_11n; 4170 int nr; 4171 int i; 4172 uint8_t cmp_rate; 4173 4174 /* 4175 * Figure out if we're using 11n or not here. 4176 */ 4177 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0) 4178 is_11n = 1; 4179 else 4180 is_11n = 0; 4181 4182 /* 4183 * Use the correct rate table. 4184 */ 4185 if (is_11n) { 4186 rs = (struct ieee80211_rateset *) &ni->ni_htrates; 4187 nr = ni->ni_htrates.rs_nrates; 4188 } else { 4189 rs = &ni->ni_rates; 4190 nr = rs->rs_nrates; 4191 } 4192 4193 /* 4194 * Find the relevant link quality entry in the table. 4195 */ 4196 for (i = 0; i < nr && i < IWN_MAX_TX_RETRIES - 1 ; i++) { 4197 /* 4198 * The link quality table index starts at 0 == highest 4199 * rate, so we walk the rate table backwards. 4200 */ 4201 cmp_rate = rs->rs_rates[(nr - 1) - i]; 4202 if (rate & IEEE80211_RATE_MCS) 4203 cmp_rate |= IEEE80211_RATE_MCS; 4204 4205 #if 0 4206 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: idx %d: nr=%d, rate=0x%02x, rateentry=0x%02x\n", 4207 __func__, 4208 i, 4209 nr, 4210 rate, 4211 cmp_rate); 4212 #endif 4213 4214 if (cmp_rate == rate) 4215 return (i); 4216 } 4217 4218 /* Failed? Start at the end */ 4219 return (IWN_MAX_TX_RETRIES - 1); 4220 } 4221 4222 static int 4223 iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni) 4224 { 4225 struct iwn_ops *ops = &sc->ops; 4226 const struct ieee80211_txparam *tp; 4227 struct ieee80211vap *vap = ni->ni_vap; 4228 struct ieee80211com *ic = ni->ni_ic; 4229 struct iwn_node *wn = (void *)ni; 4230 struct iwn_tx_ring *ring; 4231 struct iwn_tx_desc *desc; 4232 struct iwn_tx_data *data; 4233 struct iwn_tx_cmd *cmd; 4234 struct iwn_cmd_data *tx; 4235 struct ieee80211_frame *wh; 4236 struct ieee80211_key *k = NULL; 4237 struct mbuf *m1; 4238 uint32_t flags; 4239 uint16_t qos; 4240 u_int hdrlen; 4241 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER]; 4242 uint8_t tid, type; 4243 int ac, i, totlen, error, pad, nsegs = 0, rate; 4244 4245 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 4246 4247 wh = mtod(m, struct ieee80211_frame *); 4248 hdrlen = ieee80211_anyhdrsize(wh); 4249 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 4250 4251 /* Select EDCA Access Category and TX ring for this frame. */ 4252 if (IEEE80211_QOS_HAS_SEQ(wh)) { 4253 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0]; 4254 tid = qos & IEEE80211_QOS_TID; 4255 } else { 4256 qos = 0; 4257 tid = 0; 4258 } 4259 ac = M_WME_GETAC(m); 4260 if (m->m_flags & M_AMPDU_MPDU) { 4261 uint16_t seqno; 4262 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[ac]; 4263 4264 if (!IEEE80211_AMPDU_RUNNING(tap)) { 4265 m_freem(m); 4266 return EINVAL; 4267 } 4268 4269 /* 4270 * Queue this frame to the hardware ring that we've 4271 * negotiated AMPDU TX on. 4272 * 4273 * Note that the sequence number must match the TX slot 4274 * being used! 4275 */ 4276 ac = *(int *)tap->txa_private; 4277 seqno = ni->ni_txseqs[tid]; 4278 *(uint16_t *)wh->i_seq = 4279 htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT); 4280 ring = &sc->txq[ac]; 4281 if ((seqno % 256) != ring->cur) { 4282 device_printf(sc->sc_dev, 4283 "%s: m=%p: seqno (%d) (%d) != ring index (%d) !\n", 4284 __func__, 4285 m, 4286 seqno, 4287 seqno % 256, 4288 ring->cur); 4289 } 4290 ni->ni_txseqs[tid]++; 4291 } 4292 ring = &sc->txq[ac]; 4293 desc = &ring->desc[ring->cur]; 4294 data = &ring->data[ring->cur]; 4295 4296 /* Choose a TX rate index. */ 4297 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 4298 if (type == IEEE80211_FC0_TYPE_MGT) 4299 rate = tp->mgmtrate; 4300 else if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 4301 rate = tp->mcastrate; 4302 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 4303 rate = tp->ucastrate; 4304 else if (m->m_flags & M_EAPOL) 4305 rate = tp->mgmtrate; 4306 else { 4307 /* XXX pass pktlen */ 4308 (void) ieee80211_ratectl_rate(ni, NULL, 0); 4309 rate = ni->ni_txrate; 4310 } 4311 4312 /* Encrypt the frame if need be. */ 4313 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 4314 /* Retrieve key for TX. */ 4315 k = ieee80211_crypto_encap(ni, m); 4316 if (k == NULL) { 4317 m_freem(m); 4318 return ENOBUFS; 4319 } 4320 /* 802.11 header may have moved. */ 4321 wh = mtod(m, struct ieee80211_frame *); 4322 } 4323 totlen = m->m_pkthdr.len; 4324 4325 if (ieee80211_radiotap_active_vap(vap)) { 4326 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap; 4327 4328 tap->wt_flags = 0; 4329 tap->wt_rate = rate; 4330 if (k != NULL) 4331 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 4332 4333 ieee80211_radiotap_tx(vap, m); 4334 } 4335 4336 /* Prepare TX firmware command. */ 4337 cmd = &ring->cmd[ring->cur]; 4338 cmd->code = IWN_CMD_TX_DATA; 4339 cmd->flags = 0; 4340 cmd->qid = ring->qid; 4341 cmd->idx = ring->cur; 4342 4343 tx = (struct iwn_cmd_data *)cmd->data; 4344 /* NB: No need to clear tx, all fields are reinitialized here. */ 4345 tx->scratch = 0; /* clear "scratch" area */ 4346 4347 flags = 0; 4348 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 4349 /* Unicast frame, check if an ACK is expected. */ 4350 if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) != 4351 IEEE80211_QOS_ACKPOLICY_NOACK) 4352 flags |= IWN_TX_NEED_ACK; 4353 } 4354 if ((wh->i_fc[0] & 4355 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 4356 (IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR)) 4357 flags |= IWN_TX_IMM_BA; /* Cannot happen yet. */ 4358 4359 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 4360 flags |= IWN_TX_MORE_FRAG; /* Cannot happen yet. */ 4361 4362 /* Check if frame must be protected using RTS/CTS or CTS-to-self. */ 4363 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 4364 /* NB: Group frames are sent using CCK in 802.11b/g. */ 4365 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) { 4366 flags |= IWN_TX_NEED_RTS; 4367 } else if (iwn_check_rate_needs_protection(sc, vap, rate)) { 4368 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) 4369 flags |= IWN_TX_NEED_CTS; 4370 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) 4371 flags |= IWN_TX_NEED_RTS; 4372 } 4373 4374 /* XXX HT protection? */ 4375 4376 if (flags & (IWN_TX_NEED_RTS | IWN_TX_NEED_CTS)) { 4377 if (sc->hw_type != IWN_HW_REV_TYPE_4965) { 4378 /* 5000 autoselects RTS/CTS or CTS-to-self. */ 4379 flags &= ~(IWN_TX_NEED_RTS | IWN_TX_NEED_CTS); 4380 flags |= IWN_TX_NEED_PROTECTION; 4381 } else 4382 flags |= IWN_TX_FULL_TXOP; 4383 } 4384 } 4385 4386 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 4387 type != IEEE80211_FC0_TYPE_DATA) 4388 tx->id = sc->broadcast_id; 4389 else 4390 tx->id = wn->id; 4391 4392 if (type == IEEE80211_FC0_TYPE_MGT) { 4393 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 4394 4395 /* Tell HW to set timestamp in probe responses. */ 4396 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 4397 flags |= IWN_TX_INSERT_TSTAMP; 4398 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ || 4399 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ) 4400 tx->timeout = htole16(3); 4401 else 4402 tx->timeout = htole16(2); 4403 } else 4404 tx->timeout = htole16(0); 4405 4406 if (hdrlen & 3) { 4407 /* First segment length must be a multiple of 4. */ 4408 flags |= IWN_TX_NEED_PADDING; 4409 pad = 4 - (hdrlen & 3); 4410 } else 4411 pad = 0; 4412 4413 tx->len = htole16(totlen); 4414 tx->tid = tid; 4415 tx->rts_ntries = 60; 4416 tx->data_ntries = 15; 4417 tx->lifetime = htole32(IWN_LIFETIME_INFINITE); 4418 tx->rate = iwn_rate_to_plcp(sc, ni, rate); 4419 if (tx->id == sc->broadcast_id) { 4420 /* Group or management frame. */ 4421 tx->linkq = 0; 4422 } else { 4423 tx->linkq = iwn_tx_rate_to_linkq_offset(sc, ni, rate); 4424 flags |= IWN_TX_LINKQ; /* enable MRR */ 4425 } 4426 4427 /* Set physical address of "scratch area". */ 4428 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr)); 4429 tx->hiaddr = IWN_HIADDR(data->scratch_paddr); 4430 4431 /* Copy 802.11 header in TX command. */ 4432 memcpy((uint8_t *)(tx + 1), wh, hdrlen); 4433 4434 /* Trim 802.11 header. */ 4435 m_adj(m, hdrlen); 4436 tx->security = 0; 4437 tx->flags = htole32(flags); 4438 4439 error = bus_dmamap_load_mbuf_segment(ring->data_dmat, data->map, 4440 m, segs, IWN_MAX_SCATTER - 1, 4441 &nsegs, BUS_DMA_NOWAIT); 4442 if (error != 0) { 4443 if (error != EFBIG) { 4444 device_printf(sc->sc_dev, 4445 "%s: can't map mbuf (error %d)\n", __func__, error); 4446 m_freem(m); 4447 return error; 4448 } 4449 /* Too many DMA segments, linearize mbuf. */ 4450 m1 = m_defrag(m, MB_DONTWAIT); 4451 if (m1 == NULL) { 4452 device_printf(sc->sc_dev, 4453 "%s: could not defrag mbuf\n", __func__); 4454 m_freem(m); 4455 return ENOBUFS; 4456 } 4457 m = m1; 4458 4459 error = bus_dmamap_load_mbuf_segment(ring->data_dmat, 4460 data->map, m, segs, 4461 IWN_MAX_SCATTER - 1, 4462 &nsegs, BUS_DMA_NOWAIT); 4463 if (error != 0) { 4464 device_printf(sc->sc_dev, 4465 "%s: can't map mbuf (error %d)\n", __func__, error); 4466 m_freem(m); 4467 return error; 4468 } 4469 } 4470 4471 data->m = m; 4472 data->ni = ni; 4473 4474 DPRINTF(sc, IWN_DEBUG_XMIT, 4475 "%s: qid %d idx %d len %d nsegs %d rate %04x plcp 0x%08x\n", 4476 __func__, 4477 ring->qid, 4478 ring->cur, 4479 m->m_pkthdr.len, 4480 nsegs, 4481 rate, 4482 tx->rate); 4483 4484 /* Fill TX descriptor. */ 4485 desc->nsegs = 1; 4486 if (m->m_len != 0) 4487 desc->nsegs += nsegs; 4488 /* First DMA segment is used by the TX command. */ 4489 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr)); 4490 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) | 4491 (4 + sizeof (*tx) + hdrlen + pad) << 4); 4492 /* Other DMA segments are for data payload. */ 4493 seg = &segs[0]; 4494 for (i = 1; i <= nsegs; i++) { 4495 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr)); 4496 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) | 4497 seg->ds_len << 4); 4498 seg++; 4499 } 4500 4501 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 4502 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map, 4503 BUS_DMASYNC_PREWRITE); 4504 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, 4505 BUS_DMASYNC_PREWRITE); 4506 4507 /* Update TX scheduler. */ 4508 if (ring->qid >= sc->firstaggqueue) 4509 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen); 4510 4511 /* Kick TX ring. */ 4512 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT; 4513 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur); 4514 4515 /* Mark TX ring as full if we reach a certain threshold. */ 4516 if (++ring->queued > IWN_TX_RING_HIMARK) 4517 sc->qfullmsk |= 1 << ring->qid; 4518 4519 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 4520 4521 return 0; 4522 } 4523 4524 static int 4525 iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m, 4526 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params) 4527 { 4528 struct iwn_ops *ops = &sc->ops; 4529 // struct ifnet *ifp = sc->sc_ifp; 4530 struct ieee80211vap *vap = ni->ni_vap; 4531 // struct ieee80211com *ic = ifp->if_l2com; 4532 struct iwn_tx_cmd *cmd; 4533 struct iwn_cmd_data *tx; 4534 struct ieee80211_frame *wh; 4535 struct iwn_tx_ring *ring; 4536 struct iwn_tx_desc *desc; 4537 struct iwn_tx_data *data; 4538 struct mbuf *m1; 4539 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER]; 4540 uint32_t flags; 4541 u_int hdrlen; 4542 int ac, totlen, error, pad, nsegs = 0, i, rate; 4543 uint8_t type; 4544 4545 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 4546 4547 wh = mtod(m, struct ieee80211_frame *); 4548 hdrlen = ieee80211_anyhdrsize(wh); 4549 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 4550 4551 ac = params->ibp_pri & 3; 4552 4553 ring = &sc->txq[ac]; 4554 desc = &ring->desc[ring->cur]; 4555 data = &ring->data[ring->cur]; 4556 4557 /* Choose a TX rate. */ 4558 rate = params->ibp_rate0; 4559 totlen = m->m_pkthdr.len; 4560 4561 /* Prepare TX firmware command. */ 4562 cmd = &ring->cmd[ring->cur]; 4563 cmd->code = IWN_CMD_TX_DATA; 4564 cmd->flags = 0; 4565 cmd->qid = ring->qid; 4566 cmd->idx = ring->cur; 4567 4568 tx = (struct iwn_cmd_data *)cmd->data; 4569 /* NB: No need to clear tx, all fields are reinitialized here. */ 4570 tx->scratch = 0; /* clear "scratch" area */ 4571 4572 flags = 0; 4573 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0) 4574 flags |= IWN_TX_NEED_ACK; 4575 if (params->ibp_flags & IEEE80211_BPF_RTS) { 4576 if (sc->hw_type != IWN_HW_REV_TYPE_4965) { 4577 /* 5000 autoselects RTS/CTS or CTS-to-self. */ 4578 flags &= ~IWN_TX_NEED_RTS; 4579 flags |= IWN_TX_NEED_PROTECTION; 4580 } else 4581 flags |= IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP; 4582 } 4583 if (params->ibp_flags & IEEE80211_BPF_CTS) { 4584 if (sc->hw_type != IWN_HW_REV_TYPE_4965) { 4585 /* 5000 autoselects RTS/CTS or CTS-to-self. */ 4586 flags &= ~IWN_TX_NEED_CTS; 4587 flags |= IWN_TX_NEED_PROTECTION; 4588 } else 4589 flags |= IWN_TX_NEED_CTS | IWN_TX_FULL_TXOP; 4590 } 4591 if (type == IEEE80211_FC0_TYPE_MGT) { 4592 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 4593 4594 /* Tell HW to set timestamp in probe responses. */ 4595 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 4596 flags |= IWN_TX_INSERT_TSTAMP; 4597 4598 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ || 4599 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ) 4600 tx->timeout = htole16(3); 4601 else 4602 tx->timeout = htole16(2); 4603 } else 4604 tx->timeout = htole16(0); 4605 4606 if (hdrlen & 3) { 4607 /* First segment length must be a multiple of 4. */ 4608 flags |= IWN_TX_NEED_PADDING; 4609 pad = 4 - (hdrlen & 3); 4610 } else 4611 pad = 0; 4612 4613 if (ieee80211_radiotap_active_vap(vap)) { 4614 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap; 4615 4616 tap->wt_flags = 0; 4617 tap->wt_rate = rate; 4618 4619 ieee80211_radiotap_tx(vap, m); 4620 } 4621 4622 tx->len = htole16(totlen); 4623 tx->tid = 0; 4624 tx->id = sc->broadcast_id; 4625 tx->rts_ntries = params->ibp_try1; 4626 tx->data_ntries = params->ibp_try0; 4627 tx->lifetime = htole32(IWN_LIFETIME_INFINITE); 4628 tx->rate = iwn_rate_to_plcp(sc, ni, rate); 4629 4630 /* Group or management frame. */ 4631 tx->linkq = 0; 4632 4633 /* Set physical address of "scratch area". */ 4634 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr)); 4635 tx->hiaddr = IWN_HIADDR(data->scratch_paddr); 4636 4637 /* Copy 802.11 header in TX command. */ 4638 memcpy((uint8_t *)(tx + 1), wh, hdrlen); 4639 4640 /* Trim 802.11 header. */ 4641 m_adj(m, hdrlen); 4642 tx->security = 0; 4643 tx->flags = htole32(flags); 4644 4645 error = bus_dmamap_load_mbuf_segment(ring->data_dmat, data->map, 4646 m, segs, 4647 IWN_MAX_SCATTER - 1, 4648 &nsegs, BUS_DMA_NOWAIT); 4649 if (error != 0) { 4650 if (error != EFBIG) { 4651 device_printf(sc->sc_dev, 4652 "%s: can't map mbuf (error %d)\n", __func__, error); 4653 m_freem(m); 4654 return error; 4655 } 4656 /* Too many DMA segments, linearize mbuf. */ 4657 m1 = m_defrag(m, M_NOWAIT); 4658 if (m1 == NULL) { 4659 device_printf(sc->sc_dev, 4660 "%s: could not defrag mbuf\n", __func__); 4661 m_freem(m); 4662 return ENOBUFS; 4663 } 4664 m = m1; 4665 4666 error = bus_dmamap_load_mbuf_segment(ring->data_dmat, 4667 data->map, m, segs, 4668 IWN_MAX_SCATTER - 1, 4669 &nsegs, BUS_DMA_NOWAIT); 4670 if (error != 0) { 4671 device_printf(sc->sc_dev, 4672 "%s: can't map mbuf (error %d)\n", __func__, error); 4673 m_freem(m); 4674 return error; 4675 } 4676 } 4677 4678 data->m = m; 4679 data->ni = ni; 4680 4681 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n", 4682 __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs); 4683 4684 /* Fill TX descriptor. */ 4685 desc->nsegs = 1; 4686 if (m->m_len != 0) 4687 desc->nsegs += nsegs; 4688 /* First DMA segment is used by the TX command. */ 4689 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr)); 4690 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) | 4691 (4 + sizeof (*tx) + hdrlen + pad) << 4); 4692 /* Other DMA segments are for data payload. */ 4693 seg = &segs[0]; 4694 for (i = 1; i <= nsegs; i++) { 4695 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr)); 4696 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) | 4697 seg->ds_len << 4); 4698 seg++; 4699 } 4700 4701 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 4702 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map, 4703 BUS_DMASYNC_PREWRITE); 4704 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, 4705 BUS_DMASYNC_PREWRITE); 4706 4707 /* Update TX scheduler. */ 4708 if (ring->qid >= sc->firstaggqueue) 4709 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen); 4710 4711 /* Kick TX ring. */ 4712 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT; 4713 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur); 4714 4715 /* Mark TX ring as full if we reach a certain threshold. */ 4716 if (++ring->queued > IWN_TX_RING_HIMARK) 4717 sc->qfullmsk |= 1 << ring->qid; 4718 4719 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 4720 4721 return 0; 4722 } 4723 4724 static int 4725 iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 4726 const struct ieee80211_bpf_params *params) 4727 { 4728 struct ieee80211com *ic = ni->ni_ic; 4729 struct ifnet *ifp = ic->ic_ifp; 4730 struct iwn_softc *sc = ifp->if_softc; 4731 int error = 0; 4732 4733 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 4734 4735 if ((ifp->if_flags & IFF_RUNNING) == 0) { 4736 ieee80211_free_node(ni); 4737 m_freem(m); 4738 return ENETDOWN; 4739 } 4740 4741 if (params == NULL) { 4742 /* 4743 * Legacy path; interpret frame contents to decide 4744 * precisely how to send the frame. 4745 */ 4746 error = iwn_tx_data(sc, m, ni); 4747 } else { 4748 /* 4749 * Caller supplied explicit parameters to use in 4750 * sending the frame. 4751 */ 4752 error = iwn_tx_data_raw(sc, m, ni, params); 4753 } 4754 if (error != 0) { 4755 /* NB: m is reclaimed on tx failure */ 4756 ieee80211_free_node(ni); 4757 IFNET_STAT_INC(ifp, oerrors, 1); 4758 } 4759 sc->sc_tx_timer = 5; 4760 4761 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 4762 4763 return error; 4764 } 4765 4766 static void 4767 iwn_start(struct ifnet *ifp, struct ifaltq_subque *ifsq) 4768 { 4769 ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq); 4770 iwn_start_locked(ifp); 4771 } 4772 4773 static void 4774 iwn_start_locked(struct ifnet *ifp) 4775 { 4776 struct iwn_softc *sc = ifp->if_softc; 4777 struct ieee80211_node *ni; 4778 struct mbuf *m; 4779 4780 wlan_assert_serialized(); 4781 4782 if ((ifp->if_flags & IFF_RUNNING) == 0 || 4783 ifq_is_oactive(&ifp->if_snd)) 4784 return; 4785 4786 for (;;) { 4787 if (sc->qfullmsk != 0) { 4788 ifq_set_oactive(&ifp->if_snd); 4789 break; 4790 } 4791 m = ifq_dequeue(&ifp->if_snd); 4792 if (m == NULL) 4793 break; 4794 KKASSERT(M_TRAILINGSPACE(m) >= 0); 4795 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 4796 if (iwn_tx_data(sc, m, ni) != 0) { 4797 ieee80211_free_node(ni); 4798 IFNET_STAT_INC(ifp, oerrors, 1); 4799 continue; 4800 } 4801 sc->sc_tx_timer = 5; 4802 } 4803 } 4804 4805 static void 4806 iwn_watchdog_timeout(void *arg) 4807 { 4808 struct iwn_softc *sc = arg; 4809 struct ifnet *ifp = sc->sc_ifp; 4810 struct ieee80211com *ic = ifp->if_l2com; 4811 4812 wlan_serialize_enter(); 4813 4814 KASSERT(ifp->if_flags & IFF_RUNNING, ("not running")); 4815 4816 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 4817 4818 if (sc->sc_tx_timer > 0) { 4819 if (--sc->sc_tx_timer == 0) { 4820 if_printf(ifp, "device timeout\n"); 4821 ieee80211_runtask(ic, &sc->sc_reinit_task); 4822 wlan_serialize_exit(); 4823 return; 4824 } 4825 } 4826 callout_reset(&sc->watchdog_to, hz, iwn_watchdog_timeout, sc); 4827 wlan_serialize_exit(); 4828 } 4829 4830 static int 4831 iwn_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *ucred) 4832 { 4833 struct iwn_softc *sc = ifp->if_softc; 4834 struct ieee80211com *ic = ifp->if_l2com; 4835 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4836 struct ifreq *ifr = (struct ifreq *) data; 4837 int error = 0, startall = 0, stop = 0; 4838 4839 wlan_assert_serialized(); 4840 4841 switch (cmd) { 4842 case SIOCGIFADDR: 4843 error = ether_ioctl(ifp, cmd, data); 4844 break; 4845 case SIOCSIFFLAGS: 4846 if (ifp->if_flags & IFF_UP) { 4847 if (!(ifp->if_flags & IFF_RUNNING)) { 4848 iwn_init_locked(sc); 4849 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL) 4850 startall = 1; 4851 else 4852 stop = 1; 4853 } 4854 } else { 4855 if (ifp->if_flags & IFF_RUNNING) 4856 iwn_stop_locked(sc); 4857 } 4858 if (startall) 4859 ieee80211_start_all(ic); 4860 else if (vap != NULL && stop) 4861 ieee80211_stop(vap); 4862 break; 4863 case SIOCGIFMEDIA: 4864 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 4865 break; 4866 case SIOCGIWNSTATS: 4867 IWN_LOCK(sc); 4868 /* XXX validate permissions/memory/etc? */ 4869 error = copyout(&sc->last_stat, ifr->ifr_data, 4870 sizeof(struct iwn_stats)); 4871 IWN_UNLOCK(sc); 4872 break; 4873 case SIOCZIWNSTATS: 4874 IWN_LOCK(sc); 4875 memset(&sc->last_stat, 0, sizeof(struct iwn_stats)); 4876 IWN_UNLOCK(sc); 4877 error = 0; 4878 break; 4879 default: 4880 error = EINVAL; 4881 break; 4882 } 4883 return error; 4884 } 4885 4886 /* 4887 * Send a command to the firmware. 4888 */ 4889 static int 4890 iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async) 4891 { 4892 struct iwn_tx_ring *ring; 4893 struct iwn_tx_desc *desc; 4894 struct iwn_tx_data *data; 4895 struct iwn_tx_cmd *cmd; 4896 struct mbuf *m; 4897 bus_addr_t paddr; 4898 int totlen, error; 4899 int cmd_queue_num; 4900 4901 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 4902 4903 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) 4904 cmd_queue_num = IWN_PAN_CMD_QUEUE; 4905 else 4906 cmd_queue_num = IWN_CMD_QUEUE_NUM; 4907 4908 ring = &sc->txq[cmd_queue_num]; 4909 desc = &ring->desc[ring->cur]; 4910 data = &ring->data[ring->cur]; 4911 totlen = 4 + size; 4912 4913 if (size > sizeof cmd->data) { 4914 /* Command is too large to fit in a descriptor. */ 4915 if (totlen > MJUMPAGESIZE) 4916 return EINVAL; 4917 m = m_getjcl(MB_DONTWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE); 4918 if (m == NULL) 4919 return ENOMEM; 4920 cmd = mtod(m, struct iwn_tx_cmd *); 4921 error = bus_dmamap_load(ring->data_dmat, data->map, cmd, 4922 totlen, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT); 4923 if (error != 0) { 4924 m_freem(m); 4925 return error; 4926 } 4927 data->m = m; 4928 } else { 4929 cmd = &ring->cmd[ring->cur]; 4930 paddr = data->cmd_paddr; 4931 } 4932 4933 cmd->code = code; 4934 cmd->flags = 0; 4935 cmd->qid = ring->qid; 4936 cmd->idx = ring->cur; 4937 memcpy(cmd->data, buf, size); 4938 4939 desc->nsegs = 1; 4940 desc->segs[0].addr = htole32(IWN_LOADDR(paddr)); 4941 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4); 4942 4943 DPRINTF(sc, IWN_DEBUG_CMD, "%s: %s (0x%x) flags %d qid %d idx %d\n", 4944 __func__, iwn_intr_str(cmd->code), cmd->code, 4945 cmd->flags, cmd->qid, cmd->idx); 4946 4947 if (size > sizeof cmd->data) { 4948 bus_dmamap_sync(ring->data_dmat, data->map, 4949 BUS_DMASYNC_PREWRITE); 4950 } else { 4951 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map, 4952 BUS_DMASYNC_PREWRITE); 4953 } 4954 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, 4955 BUS_DMASYNC_PREWRITE); 4956 4957 /* Kick command ring. */ 4958 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT; 4959 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur); 4960 4961 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 4962 4963 return async ? 0 : zsleep(desc, &wlan_global_serializer, 0, "iwncmd", hz); 4964 } 4965 4966 static int 4967 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async) 4968 { 4969 struct iwn4965_node_info hnode; 4970 caddr_t src, dst; 4971 4972 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 4973 4974 /* 4975 * We use the node structure for 5000 Series internally (it is 4976 * a superset of the one for 4965AGN). We thus copy the common 4977 * fields before sending the command. 4978 */ 4979 src = (caddr_t)node; 4980 dst = (caddr_t)&hnode; 4981 memcpy(dst, src, 48); 4982 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */ 4983 memcpy(dst + 48, src + 72, 20); 4984 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async); 4985 } 4986 4987 static int 4988 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async) 4989 { 4990 4991 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 4992 4993 /* Direct mapping. */ 4994 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async); 4995 } 4996 4997 static int 4998 iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni) 4999 { 5000 #define RV(v) ((v) & IEEE80211_RATE_VAL) 5001 struct iwn_node *wn = (void *)ni; 5002 struct ieee80211_rateset *rs; 5003 struct iwn_cmd_link_quality linkq; 5004 uint8_t txant; 5005 int i, rate, txrate; 5006 int is_11n; 5007 5008 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 5009 5010 /* Use the first valid TX antenna. */ 5011 txant = IWN_LSB(sc->txchainmask); 5012 5013 memset(&linkq, 0, sizeof linkq); 5014 linkq.id = wn->id; 5015 linkq.antmsk_1stream = txant; 5016 5017 /* 5018 * The '2 stream' setup is a bit .. odd. 5019 * 5020 * For NICs that support only 1 antenna, default to IWN_ANT_AB or 5021 * the firmware panics (eg Intel 5100.) 5022 * 5023 * For NICs that support two antennas, we use ANT_AB. 5024 * 5025 * For NICs that support three antennas, we use the two that 5026 * wasn't the default one. 5027 * 5028 * XXX TODO: if bluetooth (full concurrent) is enabled, restrict 5029 * this to only one antenna. 5030 */ 5031 5032 /* So - if there's no secondary antenna, assume IWN_ANT_AB */ 5033 5034 /* Default - transmit on the other antennas */ 5035 linkq.antmsk_2stream = (sc->txchainmask & ~IWN_LSB(sc->txchainmask)); 5036 5037 /* Now, if it's zero, set it to IWN_ANT_AB, so to not panic firmware */ 5038 if (linkq.antmsk_2stream == 0) 5039 linkq.antmsk_2stream = IWN_ANT_AB; 5040 5041 /* 5042 * If the NIC is a two-stream TX NIC, configure the TX mask to 5043 * the default chainmask 5044 */ 5045 else if (sc->ntxchains == 2) 5046 linkq.antmsk_2stream = sc->txchainmask; 5047 5048 linkq.ampdu_max = 32; /* XXX negotiated? */ 5049 linkq.ampdu_threshold = 3; 5050 linkq.ampdu_limit = htole16(4000); /* 4ms */ 5051 5052 DPRINTF(sc, IWN_DEBUG_XMIT, 5053 "%s: 1stream antenna=0x%02x, 2stream antenna=0x%02x, ntxstreams=%d\n", 5054 __func__, 5055 linkq.antmsk_1stream, 5056 linkq.antmsk_2stream, 5057 sc->ntxchains); 5058 5059 /* 5060 * Are we using 11n rates? Ensure the channel is 5061 * 11n _and_ we have some 11n rates, or don't 5062 * try. 5063 */ 5064 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0) { 5065 rs = (struct ieee80211_rateset *) &ni->ni_htrates; 5066 is_11n = 1; 5067 } else { 5068 rs = &ni->ni_rates; 5069 is_11n = 0; 5070 } 5071 5072 /* Start at highest available bit-rate. */ 5073 /* 5074 * XXX this is all very dirty! 5075 */ 5076 if (is_11n) 5077 txrate = ni->ni_htrates.rs_nrates - 1; 5078 else 5079 txrate = rs->rs_nrates - 1; 5080 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) { 5081 uint32_t plcp; 5082 5083 if (is_11n) 5084 rate = IEEE80211_RATE_MCS | rs->rs_rates[txrate]; 5085 else 5086 rate = RV(rs->rs_rates[txrate]); 5087 5088 DPRINTF(sc, IWN_DEBUG_XMIT, 5089 "%s: i=%d, txrate=%d, rate=0x%02x\n", 5090 __func__, 5091 i, 5092 txrate, 5093 rate); 5094 5095 /* Do rate -> PLCP config mapping */ 5096 plcp = iwn_rate_to_plcp(sc, ni, rate); 5097 linkq.retry[i] = plcp; 5098 5099 /* 5100 * The mimo field is an index into the table which 5101 * indicates the first index where it and subsequent entries 5102 * will not be using MIMO. 5103 * 5104 * Since we're filling linkq from 0..15 and we're filling 5105 * from the higest MCS rates to the lowest rates, if we 5106 * _are_ doing a dual-stream rate, set mimo to idx+1 (ie, 5107 * the next entry.) That way if the next entry is a non-MIMO 5108 * entry, we're already pointing at it. 5109 */ 5110 if ((le32toh(plcp) & IWN_RFLAG_MCS) && 5111 RV(le32toh(plcp)) > 7) 5112 linkq.mimo = i + 1; 5113 5114 /* Next retry at immediate lower bit-rate. */ 5115 if (txrate > 0) 5116 txrate--; 5117 } 5118 5119 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 5120 5121 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1); 5122 #undef RV 5123 } 5124 5125 /* 5126 * Broadcast node is used to send group-addressed and management frames. 5127 */ 5128 static int 5129 iwn_add_broadcast_node(struct iwn_softc *sc, int async) 5130 { 5131 struct iwn_ops *ops = &sc->ops; 5132 struct ifnet *ifp = sc->sc_ifp; 5133 struct ieee80211com *ic = ifp->if_l2com; 5134 struct iwn_node_info node; 5135 struct iwn_cmd_link_quality linkq; 5136 uint8_t txant; 5137 int i, error; 5138 5139 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 5140 5141 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX]; 5142 5143 memset(&node, 0, sizeof node); 5144 IEEE80211_ADDR_COPY(node.macaddr, ifp->if_broadcastaddr); 5145 node.id = sc->broadcast_id; 5146 DPRINTF(sc, IWN_DEBUG_RESET, "%s: adding broadcast node\n", __func__); 5147 if ((error = ops->add_node(sc, &node, async)) != 0) 5148 return error; 5149 5150 /* Use the first valid TX antenna. */ 5151 txant = IWN_LSB(sc->txchainmask); 5152 5153 memset(&linkq, 0, sizeof linkq); 5154 linkq.id = sc->broadcast_id; 5155 linkq.antmsk_1stream = txant; 5156 linkq.antmsk_2stream = IWN_ANT_AB; 5157 linkq.ampdu_max = 64; 5158 linkq.ampdu_threshold = 3; 5159 linkq.ampdu_limit = htole16(4000); /* 4ms */ 5160 5161 /* Use lowest mandatory bit-rate. */ 5162 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan)) 5163 linkq.retry[0] = htole32(0xd); 5164 else 5165 linkq.retry[0] = htole32(10 | IWN_RFLAG_CCK); 5166 linkq.retry[0] |= htole32(IWN_RFLAG_ANT(txant)); 5167 /* Use same bit-rate for all TX retries. */ 5168 for (i = 1; i < IWN_MAX_TX_RETRIES; i++) { 5169 linkq.retry[i] = linkq.retry[0]; 5170 } 5171 5172 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 5173 5174 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async); 5175 } 5176 5177 static int 5178 iwn_updateedca(struct ieee80211com *ic) 5179 { 5180 #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */ 5181 struct iwn_softc *sc = ic->ic_ifp->if_softc; 5182 struct iwn_edca_params cmd; 5183 int aci; 5184 5185 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 5186 5187 memset(&cmd, 0, sizeof cmd); 5188 cmd.flags = htole32(IWN_EDCA_UPDATE); 5189 for (aci = 0; aci < WME_NUM_AC; aci++) { 5190 const struct wmeParams *ac = 5191 &ic->ic_wme.wme_chanParams.cap_wmeParams[aci]; 5192 cmd.ac[aci].aifsn = ac->wmep_aifsn; 5193 cmd.ac[aci].cwmin = htole16(IWN_EXP2(ac->wmep_logcwmin)); 5194 cmd.ac[aci].cwmax = htole16(IWN_EXP2(ac->wmep_logcwmax)); 5195 cmd.ac[aci].txoplimit = 5196 htole16(IEEE80211_TXOP_TO_US(ac->wmep_txopLimit)); 5197 } 5198 (void)iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &cmd, sizeof cmd, 1); 5199 5200 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 5201 5202 return 0; 5203 #undef IWN_EXP2 5204 } 5205 5206 static void 5207 iwn_update_mcast(struct ifnet *ifp) 5208 { 5209 /* Ignore */ 5210 } 5211 5212 static void 5213 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on) 5214 { 5215 struct iwn_cmd_led led; 5216 5217 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 5218 5219 #if 0 5220 /* XXX don't set LEDs during scan? */ 5221 if (sc->sc_is_scanning) 5222 return; 5223 #endif 5224 5225 /* Clear microcode LED ownership. */ 5226 IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL); 5227 5228 led.which = which; 5229 led.unit = htole32(10000); /* on/off in unit of 100ms */ 5230 led.off = off; 5231 led.on = on; 5232 (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1); 5233 } 5234 5235 /* 5236 * Set the critical temperature at which the firmware will stop the radio 5237 * and notify us. 5238 */ 5239 static int 5240 iwn_set_critical_temp(struct iwn_softc *sc) 5241 { 5242 struct iwn_critical_temp crit; 5243 int32_t temp; 5244 5245 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 5246 5247 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF); 5248 5249 if (sc->hw_type == IWN_HW_REV_TYPE_5150) 5250 temp = (IWN_CTOK(110) - sc->temp_off) * -5; 5251 else if (sc->hw_type == IWN_HW_REV_TYPE_4965) 5252 temp = IWN_CTOK(110); 5253 else 5254 temp = 110; 5255 memset(&crit, 0, sizeof crit); 5256 crit.tempR = htole32(temp); 5257 DPRINTF(sc, IWN_DEBUG_RESET, "setting critical temp to %d\n", temp); 5258 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0); 5259 } 5260 5261 static int 5262 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni) 5263 { 5264 struct iwn_cmd_timing cmd; 5265 uint64_t val, mod; 5266 5267 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 5268 5269 memset(&cmd, 0, sizeof cmd); 5270 memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t)); 5271 cmd.bintval = htole16(ni->ni_intval); 5272 cmd.lintval = htole16(10); 5273 5274 /* Compute remaining time until next beacon. */ 5275 val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU; 5276 mod = le64toh(cmd.tstamp) % val; 5277 cmd.binitval = htole32((uint32_t)(val - mod)); 5278 5279 DPRINTF(sc, IWN_DEBUG_RESET, "timing bintval=%u tstamp=%ju, init=%u\n", 5280 ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod)); 5281 5282 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1); 5283 } 5284 5285 static void 5286 iwn4965_power_calibration(struct iwn_softc *sc, int temp) 5287 { 5288 struct ifnet *ifp = sc->sc_ifp; 5289 struct ieee80211com *ic = ifp->if_l2com; 5290 5291 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 5292 5293 /* Adjust TX power if need be (delta >= 3 degC). */ 5294 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n", 5295 __func__, sc->temp, temp); 5296 if (abs(temp - sc->temp) >= 3) { 5297 /* Record temperature of last calibration. */ 5298 sc->temp = temp; 5299 (void)iwn4965_set_txpower(sc, ic->ic_bsschan, 1); 5300 } 5301 } 5302 5303 /* 5304 * Set TX power for current channel (each rate has its own power settings). 5305 * This function takes into account the regulatory information from EEPROM, 5306 * the current temperature and the current voltage. 5307 */ 5308 static int 5309 iwn4965_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch, 5310 int async) 5311 { 5312 /* Fixed-point arithmetic division using a n-bit fractional part. */ 5313 #define fdivround(a, b, n) \ 5314 ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n)) 5315 /* Linear interpolation. */ 5316 #define interpolate(x, x1, y1, x2, y2, n) \ 5317 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n)) 5318 5319 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 }; 5320 struct iwn_ucode_info *uc = &sc->ucode_info; 5321 struct iwn4965_cmd_txpower cmd; 5322 struct iwn4965_eeprom_chan_samples *chans; 5323 const uint8_t *rf_gain, *dsp_gain; 5324 int32_t vdiff, tdiff; 5325 int i, c, grp, maxpwr; 5326 uint8_t chan; 5327 5328 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX]; 5329 /* Retrieve current channel from last RXON. */ 5330 chan = sc->rxon->chan; 5331 DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n", 5332 chan); 5333 5334 memset(&cmd, 0, sizeof cmd); 5335 cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1; 5336 cmd.chan = chan; 5337 5338 if (IEEE80211_IS_CHAN_5GHZ(ch)) { 5339 maxpwr = sc->maxpwr5GHz; 5340 rf_gain = iwn4965_rf_gain_5ghz; 5341 dsp_gain = iwn4965_dsp_gain_5ghz; 5342 } else { 5343 maxpwr = sc->maxpwr2GHz; 5344 rf_gain = iwn4965_rf_gain_2ghz; 5345 dsp_gain = iwn4965_dsp_gain_2ghz; 5346 } 5347 5348 /* Compute voltage compensation. */ 5349 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7; 5350 if (vdiff > 0) 5351 vdiff *= 2; 5352 if (abs(vdiff) > 2) 5353 vdiff = 0; 5354 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW, 5355 "%s: voltage compensation=%d (UCODE=%d, EEPROM=%d)\n", 5356 __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage); 5357 5358 /* Get channel attenuation group. */ 5359 if (chan <= 20) /* 1-20 */ 5360 grp = 4; 5361 else if (chan <= 43) /* 34-43 */ 5362 grp = 0; 5363 else if (chan <= 70) /* 44-70 */ 5364 grp = 1; 5365 else if (chan <= 124) /* 71-124 */ 5366 grp = 2; 5367 else /* 125-200 */ 5368 grp = 3; 5369 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW, 5370 "%s: chan %d, attenuation group=%d\n", __func__, chan, grp); 5371 5372 /* Get channel sub-band. */ 5373 for (i = 0; i < IWN_NBANDS; i++) 5374 if (sc->bands[i].lo != 0 && 5375 sc->bands[i].lo <= chan && chan <= sc->bands[i].hi) 5376 break; 5377 if (i == IWN_NBANDS) /* Can't happen in real-life. */ 5378 return EINVAL; 5379 chans = sc->bands[i].chans; 5380 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW, 5381 "%s: chan %d sub-band=%d\n", __func__, chan, i); 5382 5383 for (c = 0; c < 2; c++) { 5384 uint8_t power, gain, temp; 5385 int maxchpwr, pwr, ridx, idx; 5386 5387 power = interpolate(chan, 5388 chans[0].num, chans[0].samples[c][1].power, 5389 chans[1].num, chans[1].samples[c][1].power, 1); 5390 gain = interpolate(chan, 5391 chans[0].num, chans[0].samples[c][1].gain, 5392 chans[1].num, chans[1].samples[c][1].gain, 1); 5393 temp = interpolate(chan, 5394 chans[0].num, chans[0].samples[c][1].temp, 5395 chans[1].num, chans[1].samples[c][1].temp, 1); 5396 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW, 5397 "%s: Tx chain %d: power=%d gain=%d temp=%d\n", 5398 __func__, c, power, gain, temp); 5399 5400 /* Compute temperature compensation. */ 5401 tdiff = ((sc->temp - temp) * 2) / tdiv[grp]; 5402 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW, 5403 "%s: temperature compensation=%d (current=%d, EEPROM=%d)\n", 5404 __func__, tdiff, sc->temp, temp); 5405 5406 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) { 5407 /* Convert dBm to half-dBm. */ 5408 maxchpwr = sc->maxpwr[chan] * 2; 5409 if ((ridx / 8) & 1) 5410 maxchpwr -= 6; /* MIMO 2T: -3dB */ 5411 5412 pwr = maxpwr; 5413 5414 /* Adjust TX power based on rate. */ 5415 if ((ridx % 8) == 5) 5416 pwr -= 15; /* OFDM48: -7.5dB */ 5417 else if ((ridx % 8) == 6) 5418 pwr -= 17; /* OFDM54: -8.5dB */ 5419 else if ((ridx % 8) == 7) 5420 pwr -= 20; /* OFDM60: -10dB */ 5421 else 5422 pwr -= 10; /* Others: -5dB */ 5423 5424 /* Do not exceed channel max TX power. */ 5425 if (pwr > maxchpwr) 5426 pwr = maxchpwr; 5427 5428 idx = gain - (pwr - power) - tdiff - vdiff; 5429 if ((ridx / 8) & 1) /* MIMO */ 5430 idx += (int32_t)le32toh(uc->atten[grp][c]); 5431 5432 if (cmd.band == 0) 5433 idx += 9; /* 5GHz */ 5434 if (ridx == IWN_RIDX_MAX) 5435 idx += 5; /* CCK */ 5436 5437 /* Make sure idx stays in a valid range. */ 5438 if (idx < 0) 5439 idx = 0; 5440 else if (idx > IWN4965_MAX_PWR_INDEX) 5441 idx = IWN4965_MAX_PWR_INDEX; 5442 5443 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW, 5444 "%s: Tx chain %d, rate idx %d: power=%d\n", 5445 __func__, c, ridx, idx); 5446 cmd.power[ridx].rf_gain[c] = rf_gain[idx]; 5447 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx]; 5448 } 5449 } 5450 5451 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW, 5452 "%s: set tx power for chan %d\n", __func__, chan); 5453 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async); 5454 5455 #undef interpolate 5456 #undef fdivround 5457 } 5458 5459 static int 5460 iwn5000_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch, 5461 int async) 5462 { 5463 struct iwn5000_cmd_txpower cmd; 5464 5465 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 5466 5467 /* 5468 * TX power calibration is handled automatically by the firmware 5469 * for 5000 Series. 5470 */ 5471 memset(&cmd, 0, sizeof cmd); 5472 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */ 5473 cmd.flags = IWN5000_TXPOWER_NO_CLOSED; 5474 cmd.srv_limit = IWN5000_TXPOWER_AUTO; 5475 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: setting TX power\n", __func__); 5476 return iwn_cmd(sc, IWN_CMD_TXPOWER_DBM, &cmd, sizeof cmd, async); 5477 } 5478 5479 /* 5480 * Retrieve the maximum RSSI (in dBm) among receivers. 5481 */ 5482 static int 5483 iwn4965_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat) 5484 { 5485 struct iwn4965_rx_phystat *phy = (void *)stat->phybuf; 5486 uint8_t mask, agc; 5487 int rssi; 5488 5489 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 5490 5491 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC; 5492 agc = (le16toh(phy->agc) >> 7) & 0x7f; 5493 5494 rssi = 0; 5495 if (mask & IWN_ANT_A) 5496 rssi = MAX(rssi, phy->rssi[0]); 5497 if (mask & IWN_ANT_B) 5498 rssi = MAX(rssi, phy->rssi[2]); 5499 if (mask & IWN_ANT_C) 5500 rssi = MAX(rssi, phy->rssi[4]); 5501 5502 DPRINTF(sc, IWN_DEBUG_RECV, 5503 "%s: agc %d mask 0x%x rssi %d %d %d result %d\n", __func__, agc, 5504 mask, phy->rssi[0], phy->rssi[2], phy->rssi[4], 5505 rssi - agc - IWN_RSSI_TO_DBM); 5506 return rssi - agc - IWN_RSSI_TO_DBM; 5507 } 5508 5509 static int 5510 iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat) 5511 { 5512 struct iwn5000_rx_phystat *phy = (void *)stat->phybuf; 5513 uint8_t agc; 5514 int rssi; 5515 5516 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 5517 5518 agc = (le32toh(phy->agc) >> 9) & 0x7f; 5519 5520 rssi = MAX(le16toh(phy->rssi[0]) & 0xff, 5521 le16toh(phy->rssi[1]) & 0xff); 5522 rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi); 5523 5524 DPRINTF(sc, IWN_DEBUG_RECV, 5525 "%s: agc %d rssi %d %d %d result %d\n", __func__, agc, 5526 phy->rssi[0], phy->rssi[1], phy->rssi[2], 5527 rssi - agc - IWN_RSSI_TO_DBM); 5528 return rssi - agc - IWN_RSSI_TO_DBM; 5529 } 5530 5531 /* 5532 * Retrieve the average noise (in dBm) among receivers. 5533 */ 5534 static int 5535 iwn_get_noise(const struct iwn_rx_general_stats *stats) 5536 { 5537 int i, total, nbant, noise; 5538 5539 total = nbant = 0; 5540 for (i = 0; i < 3; i++) { 5541 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0) 5542 continue; 5543 total += noise; 5544 nbant++; 5545 } 5546 /* There should be at least one antenna but check anyway. */ 5547 return (nbant == 0) ? -127 : (total / nbant) - 107; 5548 } 5549 5550 /* 5551 * Compute temperature (in degC) from last received statistics. 5552 */ 5553 static int 5554 iwn4965_get_temperature(struct iwn_softc *sc) 5555 { 5556 struct iwn_ucode_info *uc = &sc->ucode_info; 5557 int32_t r1, r2, r3, r4, temp; 5558 5559 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 5560 5561 r1 = le32toh(uc->temp[0].chan20MHz); 5562 r2 = le32toh(uc->temp[1].chan20MHz); 5563 r3 = le32toh(uc->temp[2].chan20MHz); 5564 r4 = le32toh(sc->rawtemp); 5565 5566 if (r1 == r3) /* Prevents division by 0 (should not happen). */ 5567 return 0; 5568 5569 /* Sign-extend 23-bit R4 value to 32-bit. */ 5570 r4 = ((r4 & 0xffffff) ^ 0x800000) - 0x800000; 5571 /* Compute temperature in Kelvin. */ 5572 temp = (259 * (r4 - r2)) / (r3 - r1); 5573 temp = (temp * 97) / 100 + 8; 5574 5575 DPRINTF(sc, IWN_DEBUG_ANY, "temperature %dK/%dC\n", temp, 5576 IWN_KTOC(temp)); 5577 return IWN_KTOC(temp); 5578 } 5579 5580 static int 5581 iwn5000_get_temperature(struct iwn_softc *sc) 5582 { 5583 int32_t temp; 5584 5585 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 5586 5587 /* 5588 * Temperature is not used by the driver for 5000 Series because 5589 * TX power calibration is handled by firmware. 5590 */ 5591 temp = le32toh(sc->rawtemp); 5592 if (sc->hw_type == IWN_HW_REV_TYPE_5150) { 5593 temp = (temp / -5) + sc->temp_off; 5594 temp = IWN_KTOC(temp); 5595 } 5596 return temp; 5597 } 5598 5599 /* 5600 * Initialize sensitivity calibration state machine. 5601 */ 5602 static int 5603 iwn_init_sensitivity(struct iwn_softc *sc) 5604 { 5605 struct iwn_ops *ops = &sc->ops; 5606 struct iwn_calib_state *calib = &sc->calib; 5607 uint32_t flags; 5608 int error; 5609 5610 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 5611 5612 /* Reset calibration state machine. */ 5613 memset(calib, 0, sizeof (*calib)); 5614 calib->state = IWN_CALIB_STATE_INIT; 5615 calib->cck_state = IWN_CCK_STATE_HIFA; 5616 /* Set initial correlation values. */ 5617 calib->ofdm_x1 = sc->limits->min_ofdm_x1; 5618 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1; 5619 calib->ofdm_x4 = sc->limits->min_ofdm_x4; 5620 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4; 5621 calib->cck_x4 = 125; 5622 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4; 5623 calib->energy_cck = sc->limits->energy_cck; 5624 5625 /* Write initial sensitivity. */ 5626 if ((error = iwn_send_sensitivity(sc)) != 0) 5627 return error; 5628 5629 /* Write initial gains. */ 5630 if ((error = ops->init_gains(sc)) != 0) 5631 return error; 5632 5633 /* Request statistics at each beacon interval. */ 5634 flags = 0; 5635 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending request for statistics\n", 5636 __func__); 5637 return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1); 5638 } 5639 5640 /* 5641 * Collect noise and RSSI statistics for the first 20 beacons received 5642 * after association and use them to determine connected antennas and 5643 * to set differential gains. 5644 */ 5645 static void 5646 iwn_collect_noise(struct iwn_softc *sc, 5647 const struct iwn_rx_general_stats *stats) 5648 { 5649 struct iwn_ops *ops = &sc->ops; 5650 struct iwn_calib_state *calib = &sc->calib; 5651 struct ifnet *ifp = sc->sc_ifp; 5652 struct ieee80211com *ic = ifp->if_l2com; 5653 uint32_t val; 5654 int i; 5655 5656 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 5657 5658 /* Accumulate RSSI and noise for all 3 antennas. */ 5659 for (i = 0; i < 3; i++) { 5660 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff; 5661 calib->noise[i] += le32toh(stats->noise[i]) & 0xff; 5662 } 5663 /* NB: We update differential gains only once after 20 beacons. */ 5664 if (++calib->nbeacons < 20) 5665 return; 5666 5667 /* Determine highest average RSSI. */ 5668 val = MAX(calib->rssi[0], calib->rssi[1]); 5669 val = MAX(calib->rssi[2], val); 5670 5671 /* Determine which antennas are connected. */ 5672 sc->chainmask = sc->rxchainmask; 5673 for (i = 0; i < 3; i++) 5674 if (val - calib->rssi[i] > 15 * 20) 5675 sc->chainmask &= ~(1 << i); 5676 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 5677 "%s: RX chains mask: theoretical=0x%x, actual=0x%x\n", 5678 __func__, sc->rxchainmask, sc->chainmask); 5679 5680 /* If none of the TX antennas are connected, keep at least one. */ 5681 if ((sc->chainmask & sc->txchainmask) == 0) 5682 sc->chainmask |= IWN_LSB(sc->txchainmask); 5683 5684 (void)ops->set_gains(sc); 5685 calib->state = IWN_CALIB_STATE_RUN; 5686 5687 #ifdef notyet 5688 /* XXX Disable RX chains with no antennas connected. */ 5689 sc->rxon->rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask)); 5690 if (sc->sc_is_scanning) 5691 device_printf(sc->sc_dev, 5692 "%s: is_scanning set, before RXON\n", 5693 __func__); 5694 (void)iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1); 5695 #endif 5696 5697 /* Enable power-saving mode if requested by user. */ 5698 if (ic->ic_flags & IEEE80211_F_PMGTON) 5699 (void)iwn_set_pslevel(sc, 0, 3, 1); 5700 5701 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 5702 5703 } 5704 5705 static int 5706 iwn4965_init_gains(struct iwn_softc *sc) 5707 { 5708 struct iwn_phy_calib_gain cmd; 5709 5710 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 5711 5712 memset(&cmd, 0, sizeof cmd); 5713 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN; 5714 /* Differential gains initially set to 0 for all 3 antennas. */ 5715 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 5716 "%s: setting initial differential gains\n", __func__); 5717 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1); 5718 } 5719 5720 static int 5721 iwn5000_init_gains(struct iwn_softc *sc) 5722 { 5723 struct iwn_phy_calib cmd; 5724 5725 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 5726 5727 memset(&cmd, 0, sizeof cmd); 5728 cmd.code = sc->reset_noise_gain; 5729 cmd.ngroups = 1; 5730 cmd.isvalid = 1; 5731 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 5732 "%s: setting initial differential gains\n", __func__); 5733 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1); 5734 } 5735 5736 static int 5737 iwn4965_set_gains(struct iwn_softc *sc) 5738 { 5739 struct iwn_calib_state *calib = &sc->calib; 5740 struct iwn_phy_calib_gain cmd; 5741 int i, delta, noise; 5742 5743 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 5744 5745 /* Get minimal noise among connected antennas. */ 5746 noise = INT_MAX; /* NB: There's at least one antenna. */ 5747 for (i = 0; i < 3; i++) 5748 if (sc->chainmask & (1 << i)) 5749 noise = MIN(calib->noise[i], noise); 5750 5751 memset(&cmd, 0, sizeof cmd); 5752 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN; 5753 /* Set differential gains for connected antennas. */ 5754 for (i = 0; i < 3; i++) { 5755 if (sc->chainmask & (1 << i)) { 5756 /* Compute attenuation (in unit of 1.5dB). */ 5757 delta = (noise - (int32_t)calib->noise[i]) / 30; 5758 /* NB: delta <= 0 */ 5759 /* Limit to [-4.5dB,0]. */ 5760 cmd.gain[i] = MIN(abs(delta), 3); 5761 if (delta < 0) 5762 cmd.gain[i] |= 1 << 2; /* sign bit */ 5763 } 5764 } 5765 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 5766 "setting differential gains Ant A/B/C: %x/%x/%x (%x)\n", 5767 cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask); 5768 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1); 5769 } 5770 5771 static int 5772 iwn5000_set_gains(struct iwn_softc *sc) 5773 { 5774 struct iwn_calib_state *calib = &sc->calib; 5775 struct iwn_phy_calib_gain cmd; 5776 int i, ant, div, delta; 5777 5778 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 5779 5780 /* We collected 20 beacons and !=6050 need a 1.5 factor. */ 5781 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30; 5782 5783 memset(&cmd, 0, sizeof cmd); 5784 cmd.code = sc->noise_gain; 5785 cmd.ngroups = 1; 5786 cmd.isvalid = 1; 5787 /* Get first available RX antenna as referential. */ 5788 ant = IWN_LSB(sc->rxchainmask); 5789 /* Set differential gains for other antennas. */ 5790 for (i = ant + 1; i < 3; i++) { 5791 if (sc->chainmask & (1 << i)) { 5792 /* The delta is relative to antenna "ant". */ 5793 delta = ((int32_t)calib->noise[ant] - 5794 (int32_t)calib->noise[i]) / div; 5795 /* Limit to [-4.5dB,+4.5dB]. */ 5796 cmd.gain[i - 1] = MIN(abs(delta), 3); 5797 if (delta < 0) 5798 cmd.gain[i - 1] |= 1 << 2; /* sign bit */ 5799 } 5800 } 5801 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 5802 "setting differential gains Ant B/C: %x/%x (%x)\n", 5803 cmd.gain[0], cmd.gain[1], sc->chainmask); 5804 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1); 5805 } 5806 5807 /* 5808 * Tune RF RX sensitivity based on the number of false alarms detected 5809 * during the last beacon period. 5810 */ 5811 static void 5812 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats) 5813 { 5814 #define inc(val, inc, max) \ 5815 if ((val) < (max)) { \ 5816 if ((val) < (max) - (inc)) \ 5817 (val) += (inc); \ 5818 else \ 5819 (val) = (max); \ 5820 needs_update = 1; \ 5821 } 5822 #define dec(val, dec, min) \ 5823 if ((val) > (min)) { \ 5824 if ((val) > (min) + (dec)) \ 5825 (val) -= (dec); \ 5826 else \ 5827 (val) = (min); \ 5828 needs_update = 1; \ 5829 } 5830 5831 const struct iwn_sensitivity_limits *limits = sc->limits; 5832 struct iwn_calib_state *calib = &sc->calib; 5833 uint32_t val, rxena, fa; 5834 uint32_t energy[3], energy_min; 5835 uint8_t noise[3], noise_ref; 5836 int i, needs_update = 0; 5837 5838 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 5839 5840 /* Check that we've been enabled long enough. */ 5841 if ((rxena = le32toh(stats->general.load)) == 0){ 5842 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end not so long\n", __func__); 5843 return; 5844 } 5845 5846 /* Compute number of false alarms since last call for OFDM. */ 5847 fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm; 5848 fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm; 5849 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */ 5850 5851 if (fa > 50 * rxena) { 5852 /* High false alarm count, decrease sensitivity. */ 5853 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 5854 "%s: OFDM high false alarm count: %u\n", __func__, fa); 5855 inc(calib->ofdm_x1, 1, limits->max_ofdm_x1); 5856 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1); 5857 inc(calib->ofdm_x4, 1, limits->max_ofdm_x4); 5858 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4); 5859 5860 } else if (fa < 5 * rxena) { 5861 /* Low false alarm count, increase sensitivity. */ 5862 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 5863 "%s: OFDM low false alarm count: %u\n", __func__, fa); 5864 dec(calib->ofdm_x1, 1, limits->min_ofdm_x1); 5865 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1); 5866 dec(calib->ofdm_x4, 1, limits->min_ofdm_x4); 5867 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4); 5868 } 5869 5870 /* Compute maximum noise among 3 receivers. */ 5871 for (i = 0; i < 3; i++) 5872 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff; 5873 val = MAX(noise[0], noise[1]); 5874 val = MAX(noise[2], val); 5875 /* Insert it into our samples table. */ 5876 calib->noise_samples[calib->cur_noise_sample] = val; 5877 calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20; 5878 5879 /* Compute maximum noise among last 20 samples. */ 5880 noise_ref = calib->noise_samples[0]; 5881 for (i = 1; i < 20; i++) 5882 noise_ref = MAX(noise_ref, calib->noise_samples[i]); 5883 5884 /* Compute maximum energy among 3 receivers. */ 5885 for (i = 0; i < 3; i++) 5886 energy[i] = le32toh(stats->general.energy[i]); 5887 val = MIN(energy[0], energy[1]); 5888 val = MIN(energy[2], val); 5889 /* Insert it into our samples table. */ 5890 calib->energy_samples[calib->cur_energy_sample] = val; 5891 calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10; 5892 5893 /* Compute minimum energy among last 10 samples. */ 5894 energy_min = calib->energy_samples[0]; 5895 for (i = 1; i < 10; i++) 5896 energy_min = MAX(energy_min, calib->energy_samples[i]); 5897 energy_min += 6; 5898 5899 /* Compute number of false alarms since last call for CCK. */ 5900 fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck; 5901 fa += le32toh(stats->cck.fa) - calib->fa_cck; 5902 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */ 5903 5904 if (fa > 50 * rxena) { 5905 /* High false alarm count, decrease sensitivity. */ 5906 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 5907 "%s: CCK high false alarm count: %u\n", __func__, fa); 5908 calib->cck_state = IWN_CCK_STATE_HIFA; 5909 calib->low_fa = 0; 5910 5911 if (calib->cck_x4 > 160) { 5912 calib->noise_ref = noise_ref; 5913 if (calib->energy_cck > 2) 5914 dec(calib->energy_cck, 2, energy_min); 5915 } 5916 if (calib->cck_x4 < 160) { 5917 calib->cck_x4 = 161; 5918 needs_update = 1; 5919 } else 5920 inc(calib->cck_x4, 3, limits->max_cck_x4); 5921 5922 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4); 5923 5924 } else if (fa < 5 * rxena) { 5925 /* Low false alarm count, increase sensitivity. */ 5926 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 5927 "%s: CCK low false alarm count: %u\n", __func__, fa); 5928 calib->cck_state = IWN_CCK_STATE_LOFA; 5929 calib->low_fa++; 5930 5931 if (calib->cck_state != IWN_CCK_STATE_INIT && 5932 (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 || 5933 calib->low_fa > 100)) { 5934 inc(calib->energy_cck, 2, limits->min_energy_cck); 5935 dec(calib->cck_x4, 3, limits->min_cck_x4); 5936 dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4); 5937 } 5938 } else { 5939 /* Not worth to increase or decrease sensitivity. */ 5940 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 5941 "%s: CCK normal false alarm count: %u\n", __func__, fa); 5942 calib->low_fa = 0; 5943 calib->noise_ref = noise_ref; 5944 5945 if (calib->cck_state == IWN_CCK_STATE_HIFA) { 5946 /* Previous interval had many false alarms. */ 5947 dec(calib->energy_cck, 8, energy_min); 5948 } 5949 calib->cck_state = IWN_CCK_STATE_INIT; 5950 } 5951 5952 if (needs_update) 5953 (void)iwn_send_sensitivity(sc); 5954 5955 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 5956 5957 #undef dec 5958 #undef inc 5959 } 5960 5961 static int 5962 iwn_send_sensitivity(struct iwn_softc *sc) 5963 { 5964 struct iwn_calib_state *calib = &sc->calib; 5965 struct iwn_enhanced_sensitivity_cmd cmd; 5966 int len; 5967 5968 memset(&cmd, 0, sizeof cmd); 5969 len = sizeof (struct iwn_sensitivity_cmd); 5970 cmd.which = IWN_SENSITIVITY_WORKTBL; 5971 /* OFDM modulation. */ 5972 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1); 5973 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1); 5974 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4); 5975 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4); 5976 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm); 5977 cmd.energy_ofdm_th = htole16(62); 5978 /* CCK modulation. */ 5979 cmd.corr_cck_x4 = htole16(calib->cck_x4); 5980 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4); 5981 cmd.energy_cck = htole16(calib->energy_cck); 5982 /* Barker modulation: use default values. */ 5983 cmd.corr_barker = htole16(190); 5984 cmd.corr_barker_mrc = htole16(sc->limits->barker_mrc); 5985 5986 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 5987 "%s: set sensitivity %d/%d/%d/%d/%d/%d/%d\n", __func__, 5988 calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4, 5989 calib->ofdm_mrc_x4, calib->cck_x4, 5990 calib->cck_mrc_x4, calib->energy_cck); 5991 5992 if (!(sc->sc_flags & IWN_FLAG_ENH_SENS)) 5993 goto send; 5994 /* Enhanced sensitivity settings. */ 5995 len = sizeof (struct iwn_enhanced_sensitivity_cmd); 5996 cmd.ofdm_det_slope_mrc = htole16(668); 5997 cmd.ofdm_det_icept_mrc = htole16(4); 5998 cmd.ofdm_det_slope = htole16(486); 5999 cmd.ofdm_det_icept = htole16(37); 6000 cmd.cck_det_slope_mrc = htole16(853); 6001 cmd.cck_det_icept_mrc = htole16(4); 6002 cmd.cck_det_slope = htole16(476); 6003 cmd.cck_det_icept = htole16(99); 6004 send: 6005 return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, len, 1); 6006 } 6007 6008 /* 6009 * Look at the increase of PLCP errors over time; if it exceeds 6010 * a programmed threshold then trigger an RF retune. 6011 */ 6012 static void 6013 iwn_check_rx_recovery(struct iwn_softc *sc, struct iwn_stats *rs) 6014 { 6015 int32_t delta_ofdm, delta_ht, delta_cck; 6016 struct iwn_calib_state *calib = &sc->calib; 6017 int delta_ticks, cur_ticks; 6018 int delta_msec; 6019 int thresh; 6020 6021 /* 6022 * Calculate the difference between the current and 6023 * previous statistics. 6024 */ 6025 delta_cck = le32toh(rs->rx.cck.bad_plcp) - calib->bad_plcp_cck; 6026 delta_ofdm = le32toh(rs->rx.ofdm.bad_plcp) - calib->bad_plcp_ofdm; 6027 delta_ht = le32toh(rs->rx.ht.bad_plcp) - calib->bad_plcp_ht; 6028 6029 /* 6030 * Calculate the delta in time between successive statistics 6031 * messages. Yes, it can roll over; so we make sure that 6032 * this doesn't happen. 6033 * 6034 * XXX go figure out what to do about rollover 6035 * XXX go figure out what to do if ticks rolls over to -ve instead! 6036 * XXX go stab signed integer overflow undefined-ness in the face. 6037 */ 6038 cur_ticks = ticks; 6039 delta_ticks = cur_ticks - sc->last_calib_ticks; 6040 6041 /* 6042 * If any are negative, then the firmware likely reset; so just 6043 * bail. We'll pick this up next time. 6044 */ 6045 if (delta_cck < 0 || delta_ofdm < 0 || delta_ht < 0 || delta_ticks < 0) 6046 return; 6047 6048 /* 6049 * delta_ticks is in ticks; we need to convert it up to milliseconds 6050 * so we can do some useful math with it. 6051 */ 6052 delta_msec = ticks_to_msecs(delta_ticks); 6053 6054 /* 6055 * Calculate what our threshold is given the current delta_msec. 6056 */ 6057 thresh = sc->base_params->plcp_err_threshold * delta_msec; 6058 6059 DPRINTF(sc, IWN_DEBUG_STATE, 6060 "%s: time delta: %d; cck=%d, ofdm=%d, ht=%d, total=%d, thresh=%d\n", 6061 __func__, 6062 delta_msec, 6063 delta_cck, 6064 delta_ofdm, 6065 delta_ht, 6066 (delta_msec + delta_cck + delta_ofdm + delta_ht), 6067 thresh); 6068 6069 /* 6070 * If we need a retune, then schedule a single channel scan 6071 * to a channel that isn't the currently active one! 6072 * 6073 * The math from linux iwlwifi: 6074 * 6075 * if ((delta * 100 / msecs) > threshold) 6076 */ 6077 if (thresh > 0 && (delta_cck + delta_ofdm + delta_ht) * 100 > thresh) { 6078 DPRINTF(sc, IWN_DEBUG_ANY, 6079 "%s: PLCP error threshold raw (%d) comparison (%d) " 6080 "over limit (%d); retune!\n", 6081 __func__, 6082 (delta_cck + delta_ofdm + delta_ht), 6083 (delta_cck + delta_ofdm + delta_ht) * 100, 6084 thresh); 6085 } 6086 } 6087 6088 /* 6089 * Set STA mode power saving level (between 0 and 5). 6090 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving. 6091 */ 6092 static int 6093 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async) 6094 { 6095 struct iwn_pmgt_cmd cmd; 6096 const struct iwn_pmgt *pmgt; 6097 uint32_t max, skip_dtim; 6098 uint32_t reg; 6099 int i; 6100 6101 DPRINTF(sc, IWN_DEBUG_PWRSAVE, 6102 "%s: dtim=%d, level=%d, async=%d\n", 6103 __func__, 6104 dtim, 6105 level, 6106 async); 6107 6108 /* Select which PS parameters to use. */ 6109 if (dtim <= 2) 6110 pmgt = &iwn_pmgt[0][level]; 6111 else if (dtim <= 10) 6112 pmgt = &iwn_pmgt[1][level]; 6113 else 6114 pmgt = &iwn_pmgt[2][level]; 6115 6116 memset(&cmd, 0, sizeof cmd); 6117 if (level != 0) /* not CAM */ 6118 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP); 6119 if (level == 5) 6120 cmd.flags |= htole16(IWN_PS_FAST_PD); 6121 /* Retrieve PCIe Active State Power Management (ASPM). */ 6122 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1); 6123 if (!(reg & 0x1)) /* L0s Entry disabled. */ 6124 cmd.flags |= htole16(IWN_PS_PCI_PMGT); 6125 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024); 6126 cmd.txtimeout = htole32(pmgt->txtimeout * 1024); 6127 6128 if (dtim == 0) { 6129 dtim = 1; 6130 skip_dtim = 0; 6131 } else 6132 skip_dtim = pmgt->skip_dtim; 6133 if (skip_dtim != 0) { 6134 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM); 6135 max = pmgt->intval[4]; 6136 if (max == (uint32_t)-1) 6137 max = dtim * (skip_dtim + 1); 6138 else if (max > dtim) 6139 max = (max / dtim) * dtim; 6140 } else 6141 max = dtim; 6142 for (i = 0; i < 5; i++) 6143 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i])); 6144 6145 DPRINTF(sc, IWN_DEBUG_RESET, "setting power saving level to %d\n", 6146 level); 6147 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async); 6148 } 6149 6150 static int 6151 iwn_send_btcoex(struct iwn_softc *sc) 6152 { 6153 struct iwn_bluetooth cmd; 6154 6155 memset(&cmd, 0, sizeof cmd); 6156 cmd.flags = IWN_BT_COEX_CHAN_ANN | IWN_BT_COEX_BT_PRIO; 6157 cmd.lead_time = IWN_BT_LEAD_TIME_DEF; 6158 cmd.max_kill = IWN_BT_MAX_KILL_DEF; 6159 DPRINTF(sc, IWN_DEBUG_RESET, "%s: configuring bluetooth coexistence\n", 6160 __func__); 6161 return iwn_cmd(sc, IWN_CMD_BT_COEX, &cmd, sizeof(cmd), 0); 6162 } 6163 6164 static int 6165 iwn_send_advanced_btcoex(struct iwn_softc *sc) 6166 { 6167 static const uint32_t btcoex_3wire[12] = { 6168 0xaaaaaaaa, 0xaaaaaaaa, 0xaeaaaaaa, 0xaaaaaaaa, 6169 0xcc00ff28, 0x0000aaaa, 0xcc00aaaa, 0x0000aaaa, 6170 0xc0004000, 0x00004000, 0xf0005000, 0xf0005000, 6171 }; 6172 struct iwn6000_btcoex_config btconfig; 6173 struct iwn2000_btcoex_config btconfig2k; 6174 struct iwn_btcoex_priotable btprio; 6175 struct iwn_btcoex_prot btprot; 6176 int error, i; 6177 uint8_t flags; 6178 6179 memset(&btconfig, 0, sizeof btconfig); 6180 memset(&btconfig2k, 0, sizeof btconfig2k); 6181 6182 flags = IWN_BT_FLAG_COEX6000_MODE_3W << 6183 IWN_BT_FLAG_COEX6000_MODE_SHIFT; // Done as is in linux kernel 3.2 6184 6185 if (sc->base_params->bt_sco_disable) 6186 flags &= ~IWN_BT_FLAG_SYNC_2_BT_DISABLE; 6187 else 6188 flags |= IWN_BT_FLAG_SYNC_2_BT_DISABLE; 6189 6190 flags |= IWN_BT_FLAG_COEX6000_CHAN_INHIBITION; 6191 6192 /* Default flags result is 145 as old value */ 6193 6194 /* 6195 * Flags value has to be review. Values must change if we 6196 * which to disable it 6197 */ 6198 if (sc->base_params->bt_session_2) { 6199 btconfig2k.flags = flags; 6200 btconfig2k.max_kill = 5; 6201 btconfig2k.bt3_t7_timer = 1; 6202 btconfig2k.kill_ack = htole32(0xffff0000); 6203 btconfig2k.kill_cts = htole32(0xffff0000); 6204 btconfig2k.sample_time = 2; 6205 btconfig2k.bt3_t2_timer = 0xc; 6206 6207 for (i = 0; i < 12; i++) 6208 btconfig2k.lookup_table[i] = htole32(btcoex_3wire[i]); 6209 btconfig2k.valid = htole16(0xff); 6210 btconfig2k.prio_boost = htole32(0xf0); 6211 DPRINTF(sc, IWN_DEBUG_RESET, 6212 "%s: configuring advanced bluetooth coexistence" 6213 " session 2, flags : 0x%x\n", 6214 __func__, 6215 flags); 6216 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig2k, 6217 sizeof(btconfig2k), 1); 6218 } else { 6219 btconfig.flags = flags; 6220 btconfig.max_kill = 5; 6221 btconfig.bt3_t7_timer = 1; 6222 btconfig.kill_ack = htole32(0xffff0000); 6223 btconfig.kill_cts = htole32(0xffff0000); 6224 btconfig.sample_time = 2; 6225 btconfig.bt3_t2_timer = 0xc; 6226 6227 for (i = 0; i < 12; i++) 6228 btconfig.lookup_table[i] = htole32(btcoex_3wire[i]); 6229 btconfig.valid = htole16(0xff); 6230 btconfig.prio_boost = 0xf0; 6231 DPRINTF(sc, IWN_DEBUG_RESET, 6232 "%s: configuring advanced bluetooth coexistence," 6233 " flags : 0x%x\n", 6234 __func__, 6235 flags); 6236 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig, 6237 sizeof(btconfig), 1); 6238 } 6239 6240 if (error != 0) 6241 return error; 6242 6243 memset(&btprio, 0, sizeof btprio); 6244 btprio.calib_init1 = 0x6; 6245 btprio.calib_init2 = 0x7; 6246 btprio.calib_periodic_low1 = 0x2; 6247 btprio.calib_periodic_low2 = 0x3; 6248 btprio.calib_periodic_high1 = 0x4; 6249 btprio.calib_periodic_high2 = 0x5; 6250 btprio.dtim = 0x6; 6251 btprio.scan52 = 0x8; 6252 btprio.scan24 = 0xa; 6253 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PRIOTABLE, &btprio, sizeof(btprio), 6254 1); 6255 if (error != 0) 6256 return error; 6257 6258 /* Force BT state machine change. */ 6259 memset(&btprot, 0, sizeof btprot); 6260 btprot.open = 1; 6261 btprot.type = 1; 6262 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1); 6263 if (error != 0) 6264 return error; 6265 btprot.open = 0; 6266 return iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1); 6267 } 6268 6269 static int 6270 iwn5000_runtime_calib(struct iwn_softc *sc) 6271 { 6272 struct iwn5000_calib_config cmd; 6273 6274 memset(&cmd, 0, sizeof cmd); 6275 cmd.ucode.once.enable = 0xffffffff; 6276 cmd.ucode.once.start = IWN5000_CALIB_DC; 6277 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 6278 "%s: configuring runtime calibration\n", __func__); 6279 return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0); 6280 } 6281 6282 static int 6283 iwn_config(struct iwn_softc *sc) 6284 { 6285 struct iwn_ops *ops = &sc->ops; 6286 struct ifnet *ifp = sc->sc_ifp; 6287 struct ieee80211com *ic = ifp->if_l2com; 6288 uint32_t txmask; 6289 uint16_t rxchain; 6290 int error; 6291 6292 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 6293 6294 if ((sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET) 6295 && (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2)) { 6296 device_printf(sc->sc_dev,"%s: temp_offset and temp_offsetv2 are" 6297 " exclusive each together. Review NIC config file. Conf" 6298 " : 0x%08x Flags : 0x%08x \n", __func__, 6299 sc->base_params->calib_need, 6300 (IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET | 6301 IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2)); 6302 return (EINVAL); 6303 } 6304 6305 /* Compute temperature calib if needed. Will be send by send calib */ 6306 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET) { 6307 error = iwn5000_temp_offset_calib(sc); 6308 if (error != 0) { 6309 device_printf(sc->sc_dev, 6310 "%s: could not set temperature offset\n", __func__); 6311 return (error); 6312 } 6313 } else if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) { 6314 error = iwn5000_temp_offset_calibv2(sc); 6315 if (error != 0) { 6316 device_printf(sc->sc_dev, 6317 "%s: could not compute temperature offset v2\n", 6318 __func__); 6319 return (error); 6320 } 6321 } 6322 6323 if (sc->hw_type == IWN_HW_REV_TYPE_6050) { 6324 /* Configure runtime DC calibration. */ 6325 error = iwn5000_runtime_calib(sc); 6326 if (error != 0) { 6327 device_printf(sc->sc_dev, 6328 "%s: could not configure runtime calibration\n", 6329 __func__); 6330 return error; 6331 } 6332 } 6333 6334 /* Configure valid TX chains for >=5000 Series. */ 6335 if (sc->hw_type != IWN_HW_REV_TYPE_4965) { 6336 txmask = htole32(sc->txchainmask); 6337 DPRINTF(sc, IWN_DEBUG_RESET, 6338 "%s: configuring valid TX chains 0x%x\n", __func__, txmask); 6339 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask, 6340 sizeof txmask, 0); 6341 if (error != 0) { 6342 device_printf(sc->sc_dev, 6343 "%s: could not configure valid TX chains, " 6344 "error %d\n", __func__, error); 6345 return error; 6346 } 6347 } 6348 6349 /* Configure bluetooth coexistence. */ 6350 error = 0; 6351 6352 /* Configure bluetooth coexistence if needed. */ 6353 if (sc->base_params->bt_mode == IWN_BT_ADVANCED) 6354 error = iwn_send_advanced_btcoex(sc); 6355 if (sc->base_params->bt_mode == IWN_BT_SIMPLE) 6356 error = iwn_send_btcoex(sc); 6357 6358 if (error != 0) { 6359 device_printf(sc->sc_dev, 6360 "%s: could not configure bluetooth coexistence, error %d\n", 6361 __func__, error); 6362 return error; 6363 } 6364 6365 /* Set mode, channel, RX filter and enable RX. */ 6366 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX]; 6367 memset(sc->rxon, 0, sizeof (struct iwn_rxon)); 6368 IEEE80211_ADDR_COPY(sc->rxon->myaddr, IF_LLADDR(ifp)); 6369 IEEE80211_ADDR_COPY(sc->rxon->wlap, IF_LLADDR(ifp)); 6370 sc->rxon->chan = ieee80211_chan2ieee(ic, ic->ic_curchan); 6371 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF); 6372 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan)) 6373 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ); 6374 switch (ic->ic_opmode) { 6375 case IEEE80211_M_STA: 6376 sc->rxon->mode = IWN_MODE_STA; 6377 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST); 6378 break; 6379 case IEEE80211_M_MONITOR: 6380 sc->rxon->mode = IWN_MODE_MONITOR; 6381 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST | 6382 IWN_FILTER_CTL | IWN_FILTER_PROMISC); 6383 break; 6384 default: 6385 /* Should not get there. */ 6386 break; 6387 } 6388 sc->rxon->cck_mask = 0x0f; /* not yet negotiated */ 6389 sc->rxon->ofdm_mask = 0xff; /* not yet negotiated */ 6390 sc->rxon->ht_single_mask = 0xff; 6391 sc->rxon->ht_dual_mask = 0xff; 6392 sc->rxon->ht_triple_mask = 0xff; 6393 rxchain = 6394 IWN_RXCHAIN_VALID(sc->rxchainmask) | 6395 IWN_RXCHAIN_MIMO_COUNT(2) | 6396 IWN_RXCHAIN_IDLE_COUNT(2); 6397 sc->rxon->rxchain = htole16(rxchain); 6398 DPRINTF(sc, IWN_DEBUG_RESET, "%s: setting configuration\n", __func__); 6399 if (sc->sc_is_scanning) 6400 device_printf(sc->sc_dev, 6401 "%s: is_scanning set, before RXON\n", 6402 __func__); 6403 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 0); 6404 if (error != 0) { 6405 device_printf(sc->sc_dev, "%s: RXON command failed\n", 6406 __func__); 6407 return error; 6408 } 6409 6410 if ((error = iwn_add_broadcast_node(sc, 0)) != 0) { 6411 device_printf(sc->sc_dev, "%s: could not add broadcast node\n", 6412 __func__); 6413 return error; 6414 } 6415 6416 /* Configuration has changed, set TX power accordingly. */ 6417 if ((error = ops->set_txpower(sc, ic->ic_curchan, 0)) != 0) { 6418 device_printf(sc->sc_dev, "%s: could not set TX power\n", 6419 __func__); 6420 return error; 6421 } 6422 6423 if ((error = iwn_set_critical_temp(sc)) != 0) { 6424 device_printf(sc->sc_dev, 6425 "%s: could not set critical temperature\n", __func__); 6426 return error; 6427 } 6428 6429 /* Set power saving level to CAM during initialization. */ 6430 if ((error = iwn_set_pslevel(sc, 0, 0, 0)) != 0) { 6431 device_printf(sc->sc_dev, 6432 "%s: could not set power saving level\n", __func__); 6433 return error; 6434 } 6435 6436 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 6437 6438 return 0; 6439 } 6440 6441 /* 6442 * Add an ssid element to a frame. 6443 */ 6444 static uint8_t * 6445 ieee80211_add_ssid(uint8_t *frm, const uint8_t *ssid, u_int len) 6446 { 6447 *frm++ = IEEE80211_ELEMID_SSID; 6448 *frm++ = len; 6449 memcpy(frm, ssid, len); 6450 return frm + len; 6451 } 6452 6453 static uint16_t 6454 iwn_get_active_dwell_time(struct iwn_softc *sc, 6455 struct ieee80211_channel *c, uint8_t n_probes) 6456 { 6457 /* No channel? Default to 2GHz settings */ 6458 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) { 6459 return (IWN_ACTIVE_DWELL_TIME_2GHZ + 6460 IWN_ACTIVE_DWELL_FACTOR_2GHZ * (n_probes + 1)); 6461 } 6462 6463 /* 5GHz dwell time */ 6464 return (IWN_ACTIVE_DWELL_TIME_5GHZ + 6465 IWN_ACTIVE_DWELL_FACTOR_5GHZ * (n_probes + 1)); 6466 } 6467 6468 /* 6469 * Limit the total dwell time to 85% of the beacon interval. 6470 * 6471 * Returns the dwell time in milliseconds. 6472 */ 6473 static uint16_t 6474 iwn_limit_dwell(struct iwn_softc *sc, uint16_t dwell_time) 6475 { 6476 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 6477 struct ieee80211vap *vap = NULL; 6478 int bintval = 0; 6479 6480 /* bintval is in TU (1.024mS) */ 6481 if (! TAILQ_EMPTY(&ic->ic_vaps)) { 6482 vap = TAILQ_FIRST(&ic->ic_vaps); 6483 bintval = vap->iv_bss->ni_intval; 6484 } 6485 6486 /* 6487 * If it's non-zero, we should calculate the minimum of 6488 * it and the DWELL_BASE. 6489 * 6490 * XXX Yes, the math should take into account that bintval 6491 * is 1.024mS, not 1mS.. 6492 */ 6493 if (bintval > 0) { 6494 DPRINTF(sc, IWN_DEBUG_SCAN, 6495 "%s: bintval=%d\n", 6496 __func__, 6497 bintval); 6498 return (MIN(IWN_PASSIVE_DWELL_BASE, ((bintval * 85) / 100))); 6499 } 6500 6501 /* No association context? Default */ 6502 return (IWN_PASSIVE_DWELL_BASE); 6503 } 6504 6505 static uint16_t 6506 iwn_get_passive_dwell_time(struct iwn_softc *sc, struct ieee80211_channel *c) 6507 { 6508 uint16_t passive; 6509 6510 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) { 6511 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_2GHZ; 6512 } else { 6513 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_5GHZ; 6514 } 6515 6516 /* Clamp to the beacon interval if we're associated */ 6517 return (iwn_limit_dwell(sc, passive)); 6518 } 6519 6520 static int 6521 iwn_scan(struct iwn_softc *sc, struct ieee80211vap *vap, 6522 struct ieee80211_scan_state *ss, struct ieee80211_channel *c) 6523 { 6524 struct ifnet *ifp = sc->sc_ifp; 6525 struct ieee80211com *ic = ifp->if_l2com; 6526 struct ieee80211_node *ni = vap->iv_bss; 6527 struct iwn_scan_hdr *hdr; 6528 struct iwn_cmd_data *tx; 6529 struct iwn_scan_essid *essid; 6530 struct iwn_scan_chan *chan; 6531 struct ieee80211_frame *wh; 6532 struct ieee80211_rateset *rs; 6533 uint8_t *buf, *frm; 6534 uint16_t rxchain; 6535 uint8_t txant; 6536 int buflen, error; 6537 int is_active; 6538 uint16_t dwell_active, dwell_passive; 6539 uint32_t extra, scan_service_time; 6540 6541 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 6542 6543 /* 6544 * We are absolutely not allowed to send a scan command when another 6545 * scan command is pending. 6546 */ 6547 if (sc->sc_is_scanning) { 6548 device_printf(sc->sc_dev, "%s: called whilst scanning!\n", 6549 __func__); 6550 return (EAGAIN); 6551 } 6552 6553 /* Assign the scan channel */ 6554 c = ic->ic_curchan; 6555 6556 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX]; 6557 buf = kmalloc(IWN_SCAN_MAXSZ, M_DEVBUF, M_INTWAIT | M_ZERO); 6558 hdr = (struct iwn_scan_hdr *)buf; 6559 /* 6560 * Move to the next channel if no frames are received within 10ms 6561 * after sending the probe request. 6562 */ 6563 hdr->quiet_time = htole16(10); /* timeout in milliseconds */ 6564 hdr->quiet_threshold = htole16(1); /* min # of packets */ 6565 /* 6566 * Max needs to be greater than active and passive and quiet! 6567 * It's also in microseconds! 6568 */ 6569 hdr->max_svc = htole32(250 * 1024); 6570 6571 /* 6572 * Reset scan: interval=100 6573 * Normal scan: interval=becaon interval 6574 * suspend_time: 100 (TU) 6575 * 6576 */ 6577 extra = (100 /* suspend_time */ / 100 /* beacon interval */) << 22; 6578 //scan_service_time = extra | ((100 /* susp */ % 100 /* int */) * 1024); 6579 scan_service_time = (4 << 22) | (100 * 1024); /* Hardcode for now! */ 6580 hdr->pause_svc = htole32(scan_service_time); 6581 6582 /* Select antennas for scanning. */ 6583 rxchain = 6584 IWN_RXCHAIN_VALID(sc->rxchainmask) | 6585 IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) | 6586 IWN_RXCHAIN_DRIVER_FORCE; 6587 if (IEEE80211_IS_CHAN_A(c) && 6588 sc->hw_type == IWN_HW_REV_TYPE_4965) { 6589 /* Ant A must be avoided in 5GHz because of an HW bug. */ 6590 rxchain |= IWN_RXCHAIN_FORCE_SEL(IWN_ANT_B); 6591 } else /* Use all available RX antennas. */ 6592 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask); 6593 hdr->rxchain = htole16(rxchain); 6594 hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON); 6595 6596 tx = (struct iwn_cmd_data *)(hdr + 1); 6597 tx->flags = htole32(IWN_TX_AUTO_SEQ); 6598 tx->id = sc->broadcast_id; 6599 tx->lifetime = htole32(IWN_LIFETIME_INFINITE); 6600 6601 if (IEEE80211_IS_CHAN_5GHZ(c)) { 6602 /* Send probe requests at 6Mbps. */ 6603 tx->rate = htole32(0xd); 6604 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A]; 6605 } else { 6606 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO); 6607 if (sc->hw_type == IWN_HW_REV_TYPE_4965 && 6608 sc->rxon->associd && sc->rxon->chan > 14) 6609 tx->rate = htole32(0xd); 6610 else { 6611 /* Send probe requests at 1Mbps. */ 6612 tx->rate = htole32(10 | IWN_RFLAG_CCK); 6613 } 6614 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G]; 6615 } 6616 /* Use the first valid TX antenna. */ 6617 txant = IWN_LSB(sc->txchainmask); 6618 tx->rate |= htole32(IWN_RFLAG_ANT(txant)); 6619 6620 /* 6621 * Only do active scanning if we're announcing a probe request 6622 * for a given SSID (or more, if we ever add it to the driver.) 6623 */ 6624 is_active = 0; 6625 6626 /* 6627 * If we're scanning for a specific SSID, add it to the command. 6628 * 6629 * XXX maybe look at adding support for scanning multiple SSIDs? 6630 */ 6631 essid = (struct iwn_scan_essid *)(tx + 1); 6632 if (ss != NULL) { 6633 if (ss->ss_ssid[0].len != 0) { 6634 essid[0].id = IEEE80211_ELEMID_SSID; 6635 essid[0].len = ss->ss_ssid[0].len; 6636 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len); 6637 } 6638 6639 DPRINTF(sc, IWN_DEBUG_SCAN, "%s: ssid_len=%d, ssid=%*s\n", 6640 __func__, 6641 ss->ss_ssid[0].len, 6642 ss->ss_ssid[0].len, 6643 ss->ss_ssid[0].ssid); 6644 6645 if (ss->ss_nssid > 0) 6646 is_active = 1; 6647 } 6648 6649 /* 6650 * Build a probe request frame. Most of the following code is a 6651 * copy & paste of what is done in net80211. 6652 */ 6653 wh = (struct ieee80211_frame *)(essid + 20); 6654 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 6655 IEEE80211_FC0_SUBTYPE_PROBE_REQ; 6656 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 6657 IEEE80211_ADDR_COPY(wh->i_addr1, ifp->if_broadcastaddr); 6658 IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(ifp)); 6659 IEEE80211_ADDR_COPY(wh->i_addr3, ifp->if_broadcastaddr); 6660 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */ 6661 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */ 6662 6663 frm = (uint8_t *)(wh + 1); 6664 frm = ieee80211_add_ssid(frm, NULL, 0); 6665 frm = ieee80211_add_rates(frm, rs); 6666 if (rs->rs_nrates > IEEE80211_RATE_SIZE) 6667 frm = ieee80211_add_xrates(frm, rs); 6668 if (ic->ic_htcaps & IEEE80211_HTC_HT) 6669 frm = ieee80211_add_htcap(frm, ni); 6670 6671 /* Set length of probe request. */ 6672 tx->len = htole16(frm - (uint8_t *)wh); 6673 6674 /* 6675 * If active scanning is requested but a certain channel is 6676 * marked passive, we can do active scanning if we detect 6677 * transmissions. 6678 * 6679 * There is an issue with some firmware versions that triggers 6680 * a sysassert on a "good CRC threshold" of zero (== disabled), 6681 * on a radar channel even though this means that we should NOT 6682 * send probes. 6683 * 6684 * The "good CRC threshold" is the number of frames that we 6685 * need to receive during our dwell time on a channel before 6686 * sending out probes -- setting this to a huge value will 6687 * mean we never reach it, but at the same time work around 6688 * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER 6689 * here instead of IWL_GOOD_CRC_TH_DISABLED. 6690 * 6691 * This was fixed in later versions along with some other 6692 * scan changes, and the threshold behaves as a flag in those 6693 * versions. 6694 */ 6695 6696 /* 6697 * If we're doing active scanning, set the crc_threshold 6698 * to a suitable value. This is different to active veruss 6699 * passive scanning depending upon the channel flags; the 6700 * firmware will obey that particular check for us. 6701 */ 6702 if (sc->tlv_feature_flags & IWN_UCODE_TLV_FLAGS_NEWSCAN) 6703 hdr->crc_threshold = is_active ? 6704 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_DISABLED; 6705 else 6706 hdr->crc_threshold = is_active ? 6707 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_NEVER; 6708 6709 chan = (struct iwn_scan_chan *)frm; 6710 chan->chan = htole16(ieee80211_chan2ieee(ic, c)); 6711 chan->flags = 0; 6712 if (ss->ss_nssid > 0) 6713 chan->flags |= htole32(IWN_CHAN_NPBREQS(1)); 6714 chan->dsp_gain = 0x6e; 6715 6716 /* 6717 * Set the passive/active flag depending upon the channel mode. 6718 * XXX TODO: take the is_active flag into account as well? 6719 */ 6720 if (c->ic_flags & IEEE80211_CHAN_PASSIVE) 6721 chan->flags |= htole32(IWN_CHAN_PASSIVE); 6722 else 6723 chan->flags |= htole32(IWN_CHAN_ACTIVE); 6724 6725 /* 6726 * Calculate the active/passive dwell times. 6727 */ 6728 6729 dwell_active = iwn_get_active_dwell_time(sc, c, ss->ss_nssid); 6730 dwell_passive = iwn_get_passive_dwell_time(sc, c); 6731 6732 /* Make sure they're valid */ 6733 if (dwell_passive <= dwell_active) 6734 dwell_passive = dwell_active + 1; 6735 6736 chan->active = htole16(dwell_active); 6737 chan->passive = htole16(dwell_passive); 6738 6739 if (IEEE80211_IS_CHAN_5GHZ(c) && 6740 !(c->ic_flags & IEEE80211_CHAN_PASSIVE)) { 6741 chan->rf_gain = 0x3b; 6742 } else if (IEEE80211_IS_CHAN_5GHZ(c)) { 6743 chan->rf_gain = 0x3b; 6744 } else if (!(c->ic_flags & IEEE80211_CHAN_PASSIVE)) { 6745 chan->rf_gain = 0x28; 6746 } else { 6747 chan->rf_gain = 0x28; 6748 } 6749 6750 DPRINTF(sc, IWN_DEBUG_STATE, 6751 "%s: chan %u flags 0x%x rf_gain 0x%x " 6752 "dsp_gain 0x%x active %d passive %d scan_svc_time %d crc 0x%x " 6753 "isactive=%d numssid=%d\n", __func__, 6754 chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain, 6755 dwell_active, dwell_passive, scan_service_time, 6756 hdr->crc_threshold, is_active, ss->ss_nssid); 6757 6758 hdr->nchan++; 6759 chan++; 6760 buflen = (uint8_t *)chan - buf; 6761 hdr->len = htole16(buflen); 6762 6763 if (sc->sc_is_scanning) { 6764 device_printf(sc->sc_dev, 6765 "%s: called with is_scanning set!\n", 6766 __func__); 6767 } 6768 sc->sc_is_scanning = 1; 6769 6770 DPRINTF(sc, IWN_DEBUG_STATE, "sending scan command nchan=%d\n", 6771 hdr->nchan); 6772 error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1); 6773 kfree(buf, M_DEVBUF); 6774 6775 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 6776 6777 return error; 6778 } 6779 6780 static int 6781 iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap) 6782 { 6783 struct iwn_ops *ops = &sc->ops; 6784 struct ifnet *ifp = sc->sc_ifp; 6785 struct ieee80211com *ic = ifp->if_l2com; 6786 struct ieee80211_node *ni = vap->iv_bss; 6787 int error; 6788 6789 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 6790 6791 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX]; 6792 /* Update adapter configuration. */ 6793 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid); 6794 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan); 6795 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF); 6796 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan)) 6797 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ); 6798 if (ic->ic_flags & IEEE80211_F_SHSLOT) 6799 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT); 6800 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 6801 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE); 6802 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) { 6803 sc->rxon->cck_mask = 0; 6804 sc->rxon->ofdm_mask = 0x15; 6805 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) { 6806 sc->rxon->cck_mask = 0x03; 6807 sc->rxon->ofdm_mask = 0; 6808 } else { 6809 /* Assume 802.11b/g. */ 6810 sc->rxon->cck_mask = 0x03; 6811 sc->rxon->ofdm_mask = 0x15; 6812 } 6813 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x cck %x ofdm %x\n", 6814 sc->rxon->chan, sc->rxon->flags, sc->rxon->cck_mask, 6815 sc->rxon->ofdm_mask); 6816 if (sc->sc_is_scanning) 6817 device_printf(sc->sc_dev, 6818 "%s: is_scanning set, before RXON\n", 6819 __func__); 6820 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1); 6821 if (error != 0) { 6822 device_printf(sc->sc_dev, "%s: RXON command failed, error %d\n", 6823 __func__, error); 6824 return error; 6825 } 6826 6827 /* Configuration has changed, set TX power accordingly. */ 6828 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) { 6829 device_printf(sc->sc_dev, 6830 "%s: could not set TX power, error %d\n", __func__, error); 6831 return error; 6832 } 6833 /* 6834 * Reconfiguring RXON clears the firmware nodes table so we must 6835 * add the broadcast node again. 6836 */ 6837 if ((error = iwn_add_broadcast_node(sc, 1)) != 0) { 6838 device_printf(sc->sc_dev, 6839 "%s: could not add broadcast node, error %d\n", __func__, 6840 error); 6841 return error; 6842 } 6843 6844 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 6845 6846 return 0; 6847 } 6848 6849 static int 6850 iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap) 6851 { 6852 struct iwn_ops *ops = &sc->ops; 6853 struct ifnet *ifp = sc->sc_ifp; 6854 struct ieee80211com *ic = ifp->if_l2com; 6855 struct ieee80211_node *ni = vap->iv_bss; 6856 struct iwn_node_info node; 6857 uint32_t htflags = 0; 6858 int error; 6859 6860 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 6861 6862 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX]; 6863 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 6864 /* Link LED blinks while monitoring. */ 6865 iwn_set_led(sc, IWN_LED_LINK, 5, 5); 6866 return 0; 6867 } 6868 if ((error = iwn_set_timing(sc, ni)) != 0) { 6869 device_printf(sc->sc_dev, 6870 "%s: could not set timing, error %d\n", __func__, error); 6871 return error; 6872 } 6873 6874 /* Update adapter configuration. */ 6875 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid); 6876 sc->rxon->associd = htole16(IEEE80211_AID(ni->ni_associd)); 6877 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan); 6878 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF); 6879 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan)) 6880 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ); 6881 if (ic->ic_flags & IEEE80211_F_SHSLOT) 6882 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT); 6883 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 6884 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE); 6885 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) { 6886 sc->rxon->cck_mask = 0; 6887 sc->rxon->ofdm_mask = 0x15; 6888 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) { 6889 sc->rxon->cck_mask = 0x03; 6890 sc->rxon->ofdm_mask = 0; 6891 } else { 6892 /* Assume 802.11b/g. */ 6893 sc->rxon->cck_mask = 0x0f; 6894 sc->rxon->ofdm_mask = 0x15; 6895 } 6896 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) { 6897 htflags |= IWN_RXON_HT_PROTMODE(ic->ic_curhtprotmode); 6898 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) { 6899 switch (ic->ic_curhtprotmode) { 6900 case IEEE80211_HTINFO_OPMODE_HT20PR: 6901 htflags |= IWN_RXON_HT_MODEPURE40; 6902 break; 6903 default: 6904 htflags |= IWN_RXON_HT_MODEMIXED; 6905 break; 6906 } 6907 } 6908 if (IEEE80211_IS_CHAN_HT40D(ni->ni_chan)) 6909 htflags |= IWN_RXON_HT_HT40MINUS; 6910 } 6911 sc->rxon->flags |= htole32(htflags); 6912 sc->rxon->filter |= htole32(IWN_FILTER_BSS); 6913 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x\n", 6914 sc->rxon->chan, sc->rxon->flags); 6915 if (sc->sc_is_scanning) 6916 device_printf(sc->sc_dev, 6917 "%s: is_scanning set, before RXON\n", 6918 __func__); 6919 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1); 6920 if (error != 0) { 6921 device_printf(sc->sc_dev, 6922 "%s: could not update configuration, error %d\n", __func__, 6923 error); 6924 return error; 6925 } 6926 6927 /* Configuration has changed, set TX power accordingly. */ 6928 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) { 6929 device_printf(sc->sc_dev, 6930 "%s: could not set TX power, error %d\n", __func__, error); 6931 return error; 6932 } 6933 6934 /* Fake a join to initialize the TX rate. */ 6935 ((struct iwn_node *)ni)->id = IWN_ID_BSS; 6936 iwn_newassoc(ni, 1); 6937 6938 /* Add BSS node. */ 6939 memset(&node, 0, sizeof node); 6940 IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr); 6941 node.id = IWN_ID_BSS; 6942 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) { 6943 switch (ni->ni_htcap & IEEE80211_HTCAP_SMPS) { 6944 case IEEE80211_HTCAP_SMPS_ENA: 6945 node.htflags |= htole32(IWN_SMPS_MIMO_DIS); 6946 break; 6947 case IEEE80211_HTCAP_SMPS_DYNAMIC: 6948 node.htflags |= htole32(IWN_SMPS_MIMO_PROT); 6949 break; 6950 } 6951 node.htflags |= htole32(IWN_AMDPU_SIZE_FACTOR(3) | 6952 IWN_AMDPU_DENSITY(5)); /* 4us */ 6953 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) 6954 node.htflags |= htole32(IWN_NODE_HT40); 6955 } 6956 DPRINTF(sc, IWN_DEBUG_STATE, "%s: adding BSS node\n", __func__); 6957 error = ops->add_node(sc, &node, 1); 6958 if (error != 0) { 6959 device_printf(sc->sc_dev, 6960 "%s: could not add BSS node, error %d\n", __func__, error); 6961 return error; 6962 } 6963 DPRINTF(sc, IWN_DEBUG_STATE, "%s: setting link quality for node %d\n", 6964 __func__, node.id); 6965 if ((error = iwn_set_link_quality(sc, ni)) != 0) { 6966 device_printf(sc->sc_dev, 6967 "%s: could not setup link quality for node %d, error %d\n", 6968 __func__, node.id, error); 6969 return error; 6970 } 6971 6972 if ((error = iwn_init_sensitivity(sc)) != 0) { 6973 device_printf(sc->sc_dev, 6974 "%s: could not set sensitivity, error %d\n", __func__, 6975 error); 6976 return error; 6977 } 6978 /* Start periodic calibration timer. */ 6979 sc->calib.state = IWN_CALIB_STATE_ASSOC; 6980 sc->calib_cnt = 0; 6981 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout, 6982 sc); 6983 6984 /* Link LED always on while associated. */ 6985 iwn_set_led(sc, IWN_LED_LINK, 0, 1); 6986 6987 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 6988 6989 return 0; 6990 } 6991 6992 /* 6993 * This function is called by upper layer when an ADDBA request is received 6994 * from another STA and before the ADDBA response is sent. 6995 */ 6996 static int 6997 iwn_ampdu_rx_start(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap, 6998 int baparamset, int batimeout, int baseqctl) 6999 { 7000 #define MS(_v, _f) (((_v) & _f) >> _f##_S) 7001 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc; 7002 struct iwn_ops *ops = &sc->ops; 7003 struct iwn_node *wn = (void *)ni; 7004 struct iwn_node_info node; 7005 uint16_t ssn; 7006 uint8_t tid; 7007 int error; 7008 7009 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 7010 7011 tid = MS(le16toh(baparamset), IEEE80211_BAPS_TID); 7012 ssn = MS(le16toh(baseqctl), IEEE80211_BASEQ_START); 7013 7014 memset(&node, 0, sizeof node); 7015 node.id = wn->id; 7016 node.control = IWN_NODE_UPDATE; 7017 node.flags = IWN_FLAG_SET_ADDBA; 7018 node.addba_tid = tid; 7019 node.addba_ssn = htole16(ssn); 7020 DPRINTF(sc, IWN_DEBUG_RECV, "ADDBA RA=%d TID=%d SSN=%d\n", 7021 wn->id, tid, ssn); 7022 error = ops->add_node(sc, &node, 1); 7023 if (error != 0) 7024 return error; 7025 return sc->sc_ampdu_rx_start(ni, rap, baparamset, batimeout, baseqctl); 7026 #undef MS 7027 } 7028 7029 /* 7030 * This function is called by upper layer on teardown of an HT-immediate 7031 * Block Ack agreement (eg. uppon receipt of a DELBA frame). 7032 */ 7033 static void 7034 iwn_ampdu_rx_stop(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap) 7035 { 7036 struct ieee80211com *ic = ni->ni_ic; 7037 struct iwn_softc *sc = ic->ic_ifp->if_softc; 7038 struct iwn_ops *ops = &sc->ops; 7039 struct iwn_node *wn = (void *)ni; 7040 struct iwn_node_info node; 7041 uint8_t tid; 7042 7043 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 7044 7045 /* XXX: tid as an argument */ 7046 for (tid = 0; tid < WME_NUM_TID; tid++) { 7047 if (&ni->ni_rx_ampdu[tid] == rap) 7048 break; 7049 } 7050 7051 memset(&node, 0, sizeof node); 7052 node.id = wn->id; 7053 node.control = IWN_NODE_UPDATE; 7054 node.flags = IWN_FLAG_SET_DELBA; 7055 node.delba_tid = tid; 7056 DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid); 7057 (void)ops->add_node(sc, &node, 1); 7058 sc->sc_ampdu_rx_stop(ni, rap); 7059 } 7060 7061 static int 7062 iwn_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 7063 int dialogtoken, int baparamset, int batimeout) 7064 { 7065 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc; 7066 int qid; 7067 7068 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 7069 7070 for (qid = sc->firstaggqueue; qid < sc->ntxqs; qid++) { 7071 if (sc->qid2tap[qid] == NULL) 7072 break; 7073 } 7074 if (qid == sc->ntxqs) { 7075 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: not free aggregation queue\n", 7076 __func__); 7077 return 0; 7078 } 7079 tap->txa_private = kmalloc(sizeof(int), M_DEVBUF, M_INTWAIT); 7080 sc->qid2tap[qid] = tap; 7081 *(int *)tap->txa_private = qid; 7082 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset, 7083 batimeout); 7084 } 7085 7086 static int 7087 iwn_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 7088 int code, int baparamset, int batimeout) 7089 { 7090 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc; 7091 int qid = *(int *)tap->txa_private; 7092 uint8_t tid = tap->txa_ac; 7093 int ret; 7094 7095 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 7096 7097 if (code == IEEE80211_STATUS_SUCCESS) { 7098 ni->ni_txseqs[tid] = tap->txa_start & 0xfff; 7099 ret = iwn_ampdu_tx_start(ni->ni_ic, ni, tid); 7100 if (ret != 1) 7101 return ret; 7102 } else { 7103 sc->qid2tap[qid] = NULL; 7104 kfree(tap->txa_private, M_DEVBUF); 7105 tap->txa_private = NULL; 7106 } 7107 return sc->sc_addba_response(ni, tap, code, baparamset, batimeout); 7108 } 7109 7110 /* 7111 * This function is called by upper layer when an ADDBA response is received 7112 * from another STA. 7113 */ 7114 static int 7115 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni, 7116 uint8_t tid) 7117 { 7118 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[tid]; 7119 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc; 7120 struct iwn_ops *ops = &sc->ops; 7121 struct iwn_node *wn = (void *)ni; 7122 struct iwn_node_info node; 7123 int error, qid; 7124 7125 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 7126 7127 /* Enable TX for the specified RA/TID. */ 7128 wn->disable_tid &= ~(1 << tid); 7129 memset(&node, 0, sizeof node); 7130 node.id = wn->id; 7131 node.control = IWN_NODE_UPDATE; 7132 node.flags = IWN_FLAG_SET_DISABLE_TID; 7133 node.disable_tid = htole16(wn->disable_tid); 7134 error = ops->add_node(sc, &node, 1); 7135 if (error != 0) 7136 return 0; 7137 7138 if ((error = iwn_nic_lock(sc)) != 0) 7139 return 0; 7140 qid = *(int *)tap->txa_private; 7141 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: ra=%d tid=%d ssn=%d qid=%d\n", 7142 __func__, wn->id, tid, tap->txa_start, qid); 7143 ops->ampdu_tx_start(sc, ni, qid, tid, tap->txa_start & 0xfff); 7144 iwn_nic_unlock(sc); 7145 7146 iwn_set_link_quality(sc, ni); 7147 return 1; 7148 } 7149 7150 static void 7151 iwn_ampdu_tx_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 7152 { 7153 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc; 7154 struct iwn_ops *ops = &sc->ops; 7155 uint8_t tid = tap->txa_ac; 7156 int qid; 7157 7158 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 7159 7160 sc->sc_addba_stop(ni, tap); 7161 7162 if (tap->txa_private == NULL) 7163 return; 7164 7165 qid = *(int *)tap->txa_private; 7166 if (sc->txq[qid].queued != 0) 7167 return; 7168 if (iwn_nic_lock(sc) != 0) 7169 return; 7170 ops->ampdu_tx_stop(sc, qid, tid, tap->txa_start & 0xfff); 7171 iwn_nic_unlock(sc); 7172 sc->qid2tap[qid] = NULL; 7173 kfree(tap->txa_private, M_DEVBUF); 7174 tap->txa_private = NULL; 7175 } 7176 7177 static void 7178 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni, 7179 int qid, uint8_t tid, uint16_t ssn) 7180 { 7181 struct iwn_node *wn = (void *)ni; 7182 7183 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 7184 7185 /* Stop TX scheduler while we're changing its configuration. */ 7186 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid), 7187 IWN4965_TXQ_STATUS_CHGACT); 7188 7189 /* Assign RA/TID translation to the queue. */ 7190 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid), 7191 wn->id << 4 | tid); 7192 7193 /* Enable chain-building mode for the queue. */ 7194 iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid); 7195 7196 /* Set starting sequence number from the ADDBA request. */ 7197 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff); 7198 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff)); 7199 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn); 7200 7201 /* Set scheduler window size. */ 7202 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid), 7203 IWN_SCHED_WINSZ); 7204 /* Set scheduler frame limit. */ 7205 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4, 7206 IWN_SCHED_LIMIT << 16); 7207 7208 /* Enable interrupts for the queue. */ 7209 iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid); 7210 7211 /* Mark the queue as active. */ 7212 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid), 7213 IWN4965_TXQ_STATUS_ACTIVE | IWN4965_TXQ_STATUS_AGGR_ENA | 7214 iwn_tid2fifo[tid] << 1); 7215 } 7216 7217 static void 7218 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn) 7219 { 7220 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 7221 7222 /* Stop TX scheduler while we're changing its configuration. */ 7223 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid), 7224 IWN4965_TXQ_STATUS_CHGACT); 7225 7226 /* Set starting sequence number from the ADDBA request. */ 7227 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff)); 7228 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn); 7229 7230 /* Disable interrupts for the queue. */ 7231 iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid); 7232 7233 /* Mark the queue as inactive. */ 7234 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid), 7235 IWN4965_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid] << 1); 7236 } 7237 7238 static void 7239 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni, 7240 int qid, uint8_t tid, uint16_t ssn) 7241 { 7242 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 7243 7244 struct iwn_node *wn = (void *)ni; 7245 7246 /* Stop TX scheduler while we're changing its configuration. */ 7247 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid), 7248 IWN5000_TXQ_STATUS_CHGACT); 7249 7250 /* Assign RA/TID translation to the queue. */ 7251 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid), 7252 wn->id << 4 | tid); 7253 7254 /* Enable chain-building mode for the queue. */ 7255 iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid); 7256 7257 /* Enable aggregation for the queue. */ 7258 iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid); 7259 7260 /* Set starting sequence number from the ADDBA request. */ 7261 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff); 7262 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff)); 7263 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn); 7264 7265 /* Set scheduler window size and frame limit. */ 7266 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4, 7267 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ); 7268 7269 /* Enable interrupts for the queue. */ 7270 iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid); 7271 7272 /* Mark the queue as active. */ 7273 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid), 7274 IWN5000_TXQ_STATUS_ACTIVE | iwn_tid2fifo[tid]); 7275 } 7276 7277 static void 7278 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn) 7279 { 7280 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 7281 7282 /* Stop TX scheduler while we're changing its configuration. */ 7283 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid), 7284 IWN5000_TXQ_STATUS_CHGACT); 7285 7286 /* Disable aggregation for the queue. */ 7287 iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid); 7288 7289 /* Set starting sequence number from the ADDBA request. */ 7290 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff)); 7291 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn); 7292 7293 /* Disable interrupts for the queue. */ 7294 iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid); 7295 7296 /* Mark the queue as inactive. */ 7297 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid), 7298 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]); 7299 } 7300 7301 /* 7302 * Query calibration tables from the initialization firmware. We do this 7303 * only once at first boot. Called from a process context. 7304 */ 7305 static int 7306 iwn5000_query_calibration(struct iwn_softc *sc) 7307 { 7308 struct iwn5000_calib_config cmd; 7309 int error; 7310 7311 memset(&cmd, 0, sizeof cmd); 7312 cmd.ucode.once.enable = htole32(0xffffffff); 7313 cmd.ucode.once.start = htole32(0xffffffff); 7314 cmd.ucode.once.send = htole32(0xffffffff); 7315 cmd.ucode.flags = htole32(0xffffffff); 7316 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending calibration query\n", 7317 __func__); 7318 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0); 7319 if (error != 0) 7320 return error; 7321 7322 /* Wait at most two seconds for calibration to complete. */ 7323 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) 7324 error = zsleep(sc, &wlan_global_serializer, 0, "iwncal", 2 * hz); 7325 return error; 7326 } 7327 7328 /* 7329 * Send calibration results to the runtime firmware. These results were 7330 * obtained on first boot from the initialization firmware. 7331 */ 7332 static int 7333 iwn5000_send_calibration(struct iwn_softc *sc) 7334 { 7335 int idx, error; 7336 7337 for (idx = 0; idx < IWN5000_PHY_CALIB_MAX_RESULT; idx++) { 7338 if (!(sc->base_params->calib_need & (1<<idx))) { 7339 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 7340 "No need of calib %d\n", 7341 idx); 7342 continue; /* no need for this calib */ 7343 } 7344 if (sc->calibcmd[idx].buf == NULL) { 7345 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 7346 "Need calib idx : %d but no available data\n", 7347 idx); 7348 continue; 7349 } 7350 7351 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 7352 "send calibration result idx=%d len=%d\n", idx, 7353 sc->calibcmd[idx].len); 7354 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf, 7355 sc->calibcmd[idx].len, 0); 7356 if (error != 0) { 7357 device_printf(sc->sc_dev, 7358 "%s: could not send calibration result, error %d\n", 7359 __func__, error); 7360 return error; 7361 } 7362 } 7363 return 0; 7364 } 7365 7366 static int 7367 iwn5000_send_wimax_coex(struct iwn_softc *sc) 7368 { 7369 struct iwn5000_wimax_coex wimax; 7370 7371 #if 0 7372 if (sc->hw_type == IWN_HW_REV_TYPE_6050) { 7373 /* Enable WiMAX coexistence for combo adapters. */ 7374 wimax.flags = 7375 IWN_WIMAX_COEX_ASSOC_WA_UNMASK | 7376 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK | 7377 IWN_WIMAX_COEX_STA_TABLE_VALID | 7378 IWN_WIMAX_COEX_ENABLE; 7379 memcpy(wimax.events, iwn6050_wimax_events, 7380 sizeof iwn6050_wimax_events); 7381 } else 7382 #endif 7383 { 7384 /* Disable WiMAX coexistence. */ 7385 wimax.flags = 0; 7386 memset(wimax.events, 0, sizeof wimax.events); 7387 } 7388 DPRINTF(sc, IWN_DEBUG_RESET, "%s: Configuring WiMAX coexistence\n", 7389 __func__); 7390 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0); 7391 } 7392 7393 static int 7394 iwn5000_crystal_calib(struct iwn_softc *sc) 7395 { 7396 struct iwn5000_phy_calib_crystal cmd; 7397 7398 memset(&cmd, 0, sizeof cmd); 7399 cmd.code = IWN5000_PHY_CALIB_CRYSTAL; 7400 cmd.ngroups = 1; 7401 cmd.isvalid = 1; 7402 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff; 7403 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff; 7404 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "sending crystal calibration %d, %d\n", 7405 cmd.cap_pin[0], cmd.cap_pin[1]); 7406 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0); 7407 } 7408 7409 static int 7410 iwn5000_temp_offset_calib(struct iwn_softc *sc) 7411 { 7412 struct iwn5000_phy_calib_temp_offset cmd; 7413 7414 memset(&cmd, 0, sizeof cmd); 7415 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET; 7416 cmd.ngroups = 1; 7417 cmd.isvalid = 1; 7418 if (sc->eeprom_temp != 0) 7419 cmd.offset = htole16(sc->eeprom_temp); 7420 else 7421 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET); 7422 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "setting radio sensor offset to %d\n", 7423 le16toh(cmd.offset)); 7424 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0); 7425 } 7426 7427 static int 7428 iwn5000_temp_offset_calibv2(struct iwn_softc *sc) 7429 { 7430 struct iwn5000_phy_calib_temp_offsetv2 cmd; 7431 7432 memset(&cmd, 0, sizeof cmd); 7433 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET; 7434 cmd.ngroups = 1; 7435 cmd.isvalid = 1; 7436 if (sc->eeprom_temp != 0) { 7437 cmd.offset_low = htole16(sc->eeprom_temp); 7438 cmd.offset_high = htole16(sc->eeprom_temp_high); 7439 } else { 7440 cmd.offset_low = htole16(IWN_DEFAULT_TEMP_OFFSET); 7441 cmd.offset_high = htole16(IWN_DEFAULT_TEMP_OFFSET); 7442 } 7443 cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage); 7444 7445 DPRINTF(sc, IWN_DEBUG_CALIBRATE, 7446 "setting radio sensor low offset to %d, high offset to %d, voltage to %d\n", 7447 le16toh(cmd.offset_low), 7448 le16toh(cmd.offset_high), 7449 le16toh(cmd.burnt_voltage_ref)); 7450 7451 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0); 7452 } 7453 7454 /* 7455 * This function is called after the runtime firmware notifies us of its 7456 * readiness (called in a process context). 7457 */ 7458 static int 7459 iwn4965_post_alive(struct iwn_softc *sc) 7460 { 7461 int error, qid; 7462 7463 if ((error = iwn_nic_lock(sc)) != 0) 7464 return error; 7465 7466 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 7467 7468 /* Clear TX scheduler state in SRAM. */ 7469 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR); 7470 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0, 7471 IWN4965_SCHED_CTX_LEN / sizeof (uint32_t)); 7472 7473 /* Set physical address of TX scheduler rings (1KB aligned). */ 7474 iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10); 7475 7476 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY); 7477 7478 /* Disable chain mode for all our 16 queues. */ 7479 iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0); 7480 7481 for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) { 7482 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0); 7483 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0); 7484 7485 /* Set scheduler window size. */ 7486 iwn_mem_write(sc, sc->sched_base + 7487 IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ); 7488 /* Set scheduler frame limit. */ 7489 iwn_mem_write(sc, sc->sched_base + 7490 IWN4965_SCHED_QUEUE_OFFSET(qid) + 4, 7491 IWN_SCHED_LIMIT << 16); 7492 } 7493 7494 /* Enable interrupts for all our 16 queues. */ 7495 iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff); 7496 /* Identify TX FIFO rings (0-7). */ 7497 iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff); 7498 7499 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */ 7500 for (qid = 0; qid < 7; qid++) { 7501 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 }; 7502 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid), 7503 IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1); 7504 } 7505 iwn_nic_unlock(sc); 7506 return 0; 7507 } 7508 7509 /* 7510 * This function is called after the initialization or runtime firmware 7511 * notifies us of its readiness (called in a process context). 7512 */ 7513 static int 7514 iwn5000_post_alive(struct iwn_softc *sc) 7515 { 7516 int error, qid; 7517 7518 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 7519 7520 /* Switch to using ICT interrupt mode. */ 7521 iwn5000_ict_reset(sc); 7522 7523 if ((error = iwn_nic_lock(sc)) != 0){ 7524 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__); 7525 return error; 7526 } 7527 7528 /* Clear TX scheduler state in SRAM. */ 7529 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR); 7530 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0, 7531 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t)); 7532 7533 /* Set physical address of TX scheduler rings (1KB aligned). */ 7534 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10); 7535 7536 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY); 7537 7538 /* Enable chain mode for all queues, except command queue. */ 7539 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) 7540 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffdf); 7541 else 7542 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef); 7543 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0); 7544 7545 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) { 7546 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0); 7547 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0); 7548 7549 iwn_mem_write(sc, sc->sched_base + 7550 IWN5000_SCHED_QUEUE_OFFSET(qid), 0); 7551 /* Set scheduler window size and frame limit. */ 7552 iwn_mem_write(sc, sc->sched_base + 7553 IWN5000_SCHED_QUEUE_OFFSET(qid) + 4, 7554 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ); 7555 } 7556 7557 /* Enable interrupts for all our 20 queues. */ 7558 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff); 7559 /* Identify TX FIFO rings (0-7). */ 7560 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff); 7561 7562 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */ 7563 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) { 7564 /* Mark TX rings as active. */ 7565 for (qid = 0; qid < 11; qid++) { 7566 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 0, 4, 2, 5, 4, 7, 5 }; 7567 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid), 7568 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]); 7569 } 7570 } else { 7571 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */ 7572 for (qid = 0; qid < 7; qid++) { 7573 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 }; 7574 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid), 7575 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]); 7576 } 7577 } 7578 iwn_nic_unlock(sc); 7579 7580 /* Configure WiMAX coexistence for combo adapters. */ 7581 error = iwn5000_send_wimax_coex(sc); 7582 if (error != 0) { 7583 device_printf(sc->sc_dev, 7584 "%s: could not configure WiMAX coexistence, error %d\n", 7585 __func__, error); 7586 return error; 7587 } 7588 if (sc->hw_type != IWN_HW_REV_TYPE_5150) { 7589 /* Perform crystal calibration. */ 7590 error = iwn5000_crystal_calib(sc); 7591 if (error != 0) { 7592 device_printf(sc->sc_dev, 7593 "%s: crystal calibration failed, error %d\n", 7594 __func__, error); 7595 return error; 7596 } 7597 } 7598 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) { 7599 /* Query calibration from the initialization firmware. */ 7600 if ((error = iwn5000_query_calibration(sc)) != 0) { 7601 device_printf(sc->sc_dev, 7602 "%s: could not query calibration, error %d\n", 7603 __func__, error); 7604 return error; 7605 } 7606 /* 7607 * We have the calibration results now, reboot with the 7608 * runtime firmware (call ourselves recursively!) 7609 */ 7610 iwn_hw_stop(sc); 7611 error = iwn_hw_init(sc); 7612 } else { 7613 /* Send calibration results to runtime firmware. */ 7614 error = iwn5000_send_calibration(sc); 7615 } 7616 7617 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 7618 7619 return error; 7620 } 7621 7622 /* 7623 * The firmware boot code is small and is intended to be copied directly into 7624 * the NIC internal memory (no DMA transfer). 7625 */ 7626 static int 7627 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size) 7628 { 7629 int error, ntries; 7630 7631 size /= sizeof (uint32_t); 7632 7633 if ((error = iwn_nic_lock(sc)) != 0) 7634 return error; 7635 7636 /* Copy microcode image into NIC memory. */ 7637 iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE, 7638 (const uint32_t *)ucode, size); 7639 7640 iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0); 7641 iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE); 7642 iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size); 7643 7644 /* Start boot load now. */ 7645 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START); 7646 7647 /* Wait for transfer to complete. */ 7648 for (ntries = 0; ntries < 1000; ntries++) { 7649 if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) & 7650 IWN_BSM_WR_CTRL_START)) 7651 break; 7652 DELAY(10); 7653 } 7654 if (ntries == 1000) { 7655 device_printf(sc->sc_dev, "%s: could not load boot firmware\n", 7656 __func__); 7657 iwn_nic_unlock(sc); 7658 return ETIMEDOUT; 7659 } 7660 7661 /* Enable boot after power up. */ 7662 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN); 7663 7664 iwn_nic_unlock(sc); 7665 return 0; 7666 } 7667 7668 static int 7669 iwn4965_load_firmware(struct iwn_softc *sc) 7670 { 7671 struct iwn_fw_info *fw = &sc->fw; 7672 struct iwn_dma_info *dma = &sc->fw_dma; 7673 int error; 7674 7675 /* Copy initialization sections into pre-allocated DMA-safe memory. */ 7676 memcpy(dma->vaddr, fw->init.data, fw->init.datasz); 7677 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); 7678 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ, 7679 fw->init.text, fw->init.textsz); 7680 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); 7681 7682 /* Tell adapter where to find initialization sections. */ 7683 if ((error = iwn_nic_lock(sc)) != 0) 7684 return error; 7685 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4); 7686 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz); 7687 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR, 7688 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4); 7689 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz); 7690 iwn_nic_unlock(sc); 7691 7692 /* Load firmware boot code. */ 7693 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz); 7694 if (error != 0) { 7695 device_printf(sc->sc_dev, "%s: could not load boot firmware\n", 7696 __func__); 7697 return error; 7698 } 7699 /* Now press "execute". */ 7700 IWN_WRITE(sc, IWN_RESET, 0); 7701 7702 /* Wait at most one second for first alive notification. */ 7703 if ((error = zsleep(sc, &wlan_global_serializer, 0, "iwninit", hz)) != 0) { 7704 device_printf(sc->sc_dev, 7705 "%s: timeout waiting for adapter to initialize, error %d\n", 7706 __func__, error); 7707 return error; 7708 } 7709 7710 /* Retrieve current temperature for initial TX power calibration. */ 7711 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz; 7712 sc->temp = iwn4965_get_temperature(sc); 7713 7714 /* Copy runtime sections into pre-allocated DMA-safe memory. */ 7715 memcpy(dma->vaddr, fw->main.data, fw->main.datasz); 7716 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); 7717 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ, 7718 fw->main.text, fw->main.textsz); 7719 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); 7720 7721 /* Tell adapter where to find runtime sections. */ 7722 if ((error = iwn_nic_lock(sc)) != 0) 7723 return error; 7724 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4); 7725 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz); 7726 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR, 7727 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4); 7728 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, 7729 IWN_FW_UPDATED | fw->main.textsz); 7730 iwn_nic_unlock(sc); 7731 7732 return 0; 7733 } 7734 7735 static int 7736 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst, 7737 const uint8_t *section, int size) 7738 { 7739 struct iwn_dma_info *dma = &sc->fw_dma; 7740 int error; 7741 7742 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 7743 7744 /* Copy firmware section into pre-allocated DMA-safe memory. */ 7745 memcpy(dma->vaddr, section, size); 7746 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); 7747 7748 if ((error = iwn_nic_lock(sc)) != 0) 7749 return error; 7750 7751 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL), 7752 IWN_FH_TX_CONFIG_DMA_PAUSE); 7753 7754 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst); 7755 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL), 7756 IWN_LOADDR(dma->paddr)); 7757 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL), 7758 IWN_HIADDR(dma->paddr) << 28 | size); 7759 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL), 7760 IWN_FH_TXBUF_STATUS_TBNUM(1) | 7761 IWN_FH_TXBUF_STATUS_TBIDX(1) | 7762 IWN_FH_TXBUF_STATUS_TFBD_VALID); 7763 7764 /* Kick Flow Handler to start DMA transfer. */ 7765 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL), 7766 IWN_FH_TX_CONFIG_DMA_ENA | IWN_FH_TX_CONFIG_CIRQ_HOST_ENDTFD); 7767 7768 iwn_nic_unlock(sc); 7769 7770 /* Wait at most five seconds for FH DMA transfer to complete. */ 7771 return zsleep(sc, &wlan_global_serializer, 0, "iwninit", 5 * hz); 7772 } 7773 7774 static int 7775 iwn5000_load_firmware(struct iwn_softc *sc) 7776 { 7777 struct iwn_fw_part *fw; 7778 int error; 7779 7780 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 7781 7782 /* Load the initialization firmware on first boot only. */ 7783 fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ? 7784 &sc->fw.main : &sc->fw.init; 7785 7786 error = iwn5000_load_firmware_section(sc, IWN_FW_TEXT_BASE, 7787 fw->text, fw->textsz); 7788 if (error != 0) { 7789 device_printf(sc->sc_dev, 7790 "%s: could not load firmware %s section, error %d\n", 7791 __func__, ".text", error); 7792 return error; 7793 } 7794 error = iwn5000_load_firmware_section(sc, IWN_FW_DATA_BASE, 7795 fw->data, fw->datasz); 7796 if (error != 0) { 7797 device_printf(sc->sc_dev, 7798 "%s: could not load firmware %s section, error %d\n", 7799 __func__, ".data", error); 7800 return error; 7801 } 7802 7803 /* Now press "execute". */ 7804 IWN_WRITE(sc, IWN_RESET, 0); 7805 return 0; 7806 } 7807 7808 /* 7809 * Extract text and data sections from a legacy firmware image. 7810 */ 7811 static int 7812 iwn_read_firmware_leg(struct iwn_softc *sc, struct iwn_fw_info *fw) 7813 { 7814 const uint32_t *ptr; 7815 size_t hdrlen = 24; 7816 uint32_t rev; 7817 7818 ptr = (const uint32_t *)fw->data; 7819 rev = le32toh(*ptr++); 7820 7821 /* Check firmware API version. */ 7822 if (IWN_FW_API(rev) <= 1) { 7823 device_printf(sc->sc_dev, 7824 "%s: bad firmware, need API version >=2\n", __func__); 7825 return EINVAL; 7826 } 7827 if (IWN_FW_API(rev) >= 3) { 7828 /* Skip build number (version 2 header). */ 7829 hdrlen += 4; 7830 ptr++; 7831 } 7832 if (fw->size < hdrlen) { 7833 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n", 7834 __func__, fw->size); 7835 return EINVAL; 7836 } 7837 fw->main.textsz = le32toh(*ptr++); 7838 fw->main.datasz = le32toh(*ptr++); 7839 fw->init.textsz = le32toh(*ptr++); 7840 fw->init.datasz = le32toh(*ptr++); 7841 fw->boot.textsz = le32toh(*ptr++); 7842 7843 /* Check that all firmware sections fit. */ 7844 if (fw->size < hdrlen + fw->main.textsz + fw->main.datasz + 7845 fw->init.textsz + fw->init.datasz + fw->boot.textsz) { 7846 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n", 7847 __func__, fw->size); 7848 return EINVAL; 7849 } 7850 7851 /* Get pointers to firmware sections. */ 7852 fw->main.text = (const uint8_t *)ptr; 7853 fw->main.data = fw->main.text + fw->main.textsz; 7854 fw->init.text = fw->main.data + fw->main.datasz; 7855 fw->init.data = fw->init.text + fw->init.textsz; 7856 fw->boot.text = fw->init.data + fw->init.datasz; 7857 return 0; 7858 } 7859 7860 /* 7861 * Extract text and data sections from a TLV firmware image. 7862 */ 7863 static int 7864 iwn_read_firmware_tlv(struct iwn_softc *sc, struct iwn_fw_info *fw, 7865 uint16_t alt) 7866 { 7867 const struct iwn_fw_tlv_hdr *hdr; 7868 const struct iwn_fw_tlv *tlv; 7869 const uint8_t *ptr, *end; 7870 uint64_t altmask; 7871 uint32_t len, tmp; 7872 7873 if (fw->size < sizeof (*hdr)) { 7874 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n", 7875 __func__, fw->size); 7876 return EINVAL; 7877 } 7878 hdr = (const struct iwn_fw_tlv_hdr *)fw->data; 7879 if (hdr->signature != htole32(IWN_FW_SIGNATURE)) { 7880 device_printf(sc->sc_dev, "%s: bad firmware signature 0x%08x\n", 7881 __func__, le32toh(hdr->signature)); 7882 return EINVAL; 7883 } 7884 DPRINTF(sc, IWN_DEBUG_RESET, "FW: \"%.64s\", build 0x%x\n", hdr->descr, 7885 le32toh(hdr->build)); 7886 7887 /* 7888 * Select the closest supported alternative that is less than 7889 * or equal to the specified one. 7890 */ 7891 altmask = le64toh(hdr->altmask); 7892 while (alt > 0 && !(altmask & (1ULL << alt))) 7893 alt--; /* Downgrade. */ 7894 DPRINTF(sc, IWN_DEBUG_RESET, "using alternative %d\n", alt); 7895 7896 ptr = (const uint8_t *)(hdr + 1); 7897 end = (const uint8_t *)(fw->data + fw->size); 7898 7899 /* Parse type-length-value fields. */ 7900 while (ptr + sizeof (*tlv) <= end) { 7901 tlv = (const struct iwn_fw_tlv *)ptr; 7902 len = le32toh(tlv->len); 7903 7904 ptr += sizeof (*tlv); 7905 if (ptr + len > end) { 7906 device_printf(sc->sc_dev, 7907 "%s: firmware too short: %zu bytes\n", __func__, 7908 fw->size); 7909 return EINVAL; 7910 } 7911 /* Skip other alternatives. */ 7912 if (tlv->alt != 0 && tlv->alt != htole16(alt)) 7913 goto next; 7914 7915 switch (le16toh(tlv->type)) { 7916 case IWN_FW_TLV_MAIN_TEXT: 7917 fw->main.text = ptr; 7918 fw->main.textsz = len; 7919 break; 7920 case IWN_FW_TLV_MAIN_DATA: 7921 fw->main.data = ptr; 7922 fw->main.datasz = len; 7923 break; 7924 case IWN_FW_TLV_INIT_TEXT: 7925 fw->init.text = ptr; 7926 fw->init.textsz = len; 7927 break; 7928 case IWN_FW_TLV_INIT_DATA: 7929 fw->init.data = ptr; 7930 fw->init.datasz = len; 7931 break; 7932 case IWN_FW_TLV_BOOT_TEXT: 7933 fw->boot.text = ptr; 7934 fw->boot.textsz = len; 7935 break; 7936 case IWN_FW_TLV_ENH_SENS: 7937 if (!len) 7938 sc->sc_flags |= IWN_FLAG_ENH_SENS; 7939 break; 7940 case IWN_FW_TLV_PHY_CALIB: 7941 tmp = le32toh(*ptr); 7942 if (tmp < 253) { 7943 sc->reset_noise_gain = tmp; 7944 sc->noise_gain = tmp + 1; 7945 } 7946 break; 7947 case IWN_FW_TLV_PAN: 7948 sc->sc_flags |= IWN_FLAG_PAN_SUPPORT; 7949 DPRINTF(sc, IWN_DEBUG_RESET, 7950 "PAN Support found: %d\n", 1); 7951 break; 7952 case IWN_FW_TLV_FLAGS: 7953 if (len < sizeof(uint32_t)) 7954 break; 7955 if (len % sizeof(uint32_t)) 7956 break; 7957 sc->tlv_feature_flags = le32toh(*ptr); 7958 DPRINTF(sc, IWN_DEBUG_RESET, 7959 "%s: feature: 0x%08x\n", 7960 __func__, 7961 sc->tlv_feature_flags); 7962 break; 7963 case IWN_FW_TLV_PBREQ_MAXLEN: 7964 case IWN_FW_TLV_RUNT_EVTLOG_PTR: 7965 case IWN_FW_TLV_RUNT_EVTLOG_SIZE: 7966 case IWN_FW_TLV_RUNT_ERRLOG_PTR: 7967 case IWN_FW_TLV_INIT_EVTLOG_PTR: 7968 case IWN_FW_TLV_INIT_EVTLOG_SIZE: 7969 case IWN_FW_TLV_INIT_ERRLOG_PTR: 7970 case IWN_FW_TLV_WOWLAN_INST: 7971 case IWN_FW_TLV_WOWLAN_DATA: 7972 DPRINTF(sc, IWN_DEBUG_RESET, 7973 "TLV type %d recognized but not handled\n", 7974 le16toh(tlv->type)); 7975 break; 7976 default: 7977 DPRINTF(sc, IWN_DEBUG_RESET, 7978 "TLV type %d not handled\n", le16toh(tlv->type)); 7979 break; 7980 } 7981 next: /* TLV fields are 32-bit aligned. */ 7982 ptr += (len + 3) & ~3; 7983 } 7984 return 0; 7985 } 7986 7987 static int 7988 iwn_read_firmware(struct iwn_softc *sc) 7989 { 7990 struct iwn_fw_info *fw = &sc->fw; 7991 int error; 7992 7993 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 7994 7995 wlan_assert_serialized(); 7996 memset(fw, 0, sizeof (*fw)); 7997 7998 /* 7999 * Read firmware image from filesystem. The firmware can block 8000 * in a taskq and deadlock against our serializer so unlock 8001 * while we do tihs. 8002 */ 8003 wlan_serialize_exit(); 8004 sc->fw_fp = firmware_get(sc->fwname); 8005 wlan_serialize_enter(); 8006 if (sc->fw_fp == NULL) { 8007 device_printf(sc->sc_dev, "%s: could not read firmware %s\n", 8008 __func__, sc->fwname); 8009 return EINVAL; 8010 } 8011 8012 fw->size = sc->fw_fp->datasize; 8013 fw->data = (const uint8_t *)sc->fw_fp->data; 8014 if (fw->size < sizeof (uint32_t)) { 8015 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n", 8016 __func__, fw->size); 8017 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD); 8018 sc->fw_fp = NULL; 8019 return EINVAL; 8020 } 8021 8022 /* Retrieve text and data sections. */ 8023 if (*(const uint32_t *)fw->data != 0) /* Legacy image. */ 8024 error = iwn_read_firmware_leg(sc, fw); 8025 else 8026 error = iwn_read_firmware_tlv(sc, fw, 1); 8027 if (error != 0) { 8028 device_printf(sc->sc_dev, 8029 "%s: could not read firmware sections, error %d\n", 8030 __func__, error); 8031 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD); 8032 sc->fw_fp = NULL; 8033 return error; 8034 } 8035 8036 /* Make sure text and data sections fit in hardware memory. */ 8037 if (fw->main.textsz > sc->fw_text_maxsz || 8038 fw->main.datasz > sc->fw_data_maxsz || 8039 fw->init.textsz > sc->fw_text_maxsz || 8040 fw->init.datasz > sc->fw_data_maxsz || 8041 fw->boot.textsz > IWN_FW_BOOT_TEXT_MAXSZ || 8042 (fw->boot.textsz & 3) != 0) { 8043 device_printf(sc->sc_dev, "%s: firmware sections too large\n", 8044 __func__); 8045 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD); 8046 sc->fw_fp = NULL; 8047 return EINVAL; 8048 } 8049 8050 /* We can proceed with loading the firmware. */ 8051 return 0; 8052 } 8053 8054 static int 8055 iwn_clock_wait(struct iwn_softc *sc) 8056 { 8057 int ntries; 8058 8059 /* Set "initialization complete" bit. */ 8060 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE); 8061 8062 /* Wait for clock stabilization. */ 8063 for (ntries = 0; ntries < 2500; ntries++) { 8064 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_MAC_CLOCK_READY) 8065 return 0; 8066 DELAY(10); 8067 } 8068 device_printf(sc->sc_dev, 8069 "%s: timeout waiting for clock stabilization\n", __func__); 8070 return ETIMEDOUT; 8071 } 8072 8073 static int 8074 iwn_apm_init(struct iwn_softc *sc) 8075 { 8076 uint32_t reg; 8077 int error; 8078 8079 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 8080 8081 /* Disable L0s exit timer (NMI bug workaround). */ 8082 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_DIS_L0S_TIMER); 8083 /* Don't wait for ICH L0s (ICH bug workaround). */ 8084 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_L1A_NO_L0S_RX); 8085 8086 /* Set FH wait threshold to max (HW bug under stress workaround). */ 8087 IWN_SETBITS(sc, IWN_DBG_HPET_MEM, 0xffff0000); 8088 8089 /* Enable HAP INTA to move adapter from L1a to L0s. */ 8090 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A); 8091 8092 /* Retrieve PCIe Active State Power Management (ASPM). */ 8093 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1); 8094 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */ 8095 if (reg & 0x02) /* L1 Entry enabled. */ 8096 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA); 8097 else 8098 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA); 8099 8100 if (sc->base_params->pll_cfg_val) 8101 IWN_SETBITS(sc, IWN_ANA_PLL, sc->base_params->pll_cfg_val); 8102 8103 /* Wait for clock stabilization before accessing prph. */ 8104 if ((error = iwn_clock_wait(sc)) != 0) 8105 return error; 8106 8107 if ((error = iwn_nic_lock(sc)) != 0) 8108 return error; 8109 if (sc->hw_type == IWN_HW_REV_TYPE_4965) { 8110 /* Enable DMA and BSM (Bootstrap State Machine). */ 8111 iwn_prph_write(sc, IWN_APMG_CLK_EN, 8112 IWN_APMG_CLK_CTRL_DMA_CLK_RQT | 8113 IWN_APMG_CLK_CTRL_BSM_CLK_RQT); 8114 } else { 8115 /* Enable DMA. */ 8116 iwn_prph_write(sc, IWN_APMG_CLK_EN, 8117 IWN_APMG_CLK_CTRL_DMA_CLK_RQT); 8118 } 8119 DELAY(20); 8120 /* Disable L1-Active. */ 8121 iwn_prph_setbits(sc, IWN_APMG_PCI_STT, IWN_APMG_PCI_STT_L1A_DIS); 8122 iwn_nic_unlock(sc); 8123 8124 return 0; 8125 } 8126 8127 static void 8128 iwn_apm_stop_master(struct iwn_softc *sc) 8129 { 8130 int ntries; 8131 8132 /* Stop busmaster DMA activity. */ 8133 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_STOP_MASTER); 8134 for (ntries = 0; ntries < 100; ntries++) { 8135 if (IWN_READ(sc, IWN_RESET) & IWN_RESET_MASTER_DISABLED) 8136 return; 8137 DELAY(10); 8138 } 8139 device_printf(sc->sc_dev, "%s: timeout waiting for master\n", __func__); 8140 } 8141 8142 static void 8143 iwn_apm_stop(struct iwn_softc *sc) 8144 { 8145 iwn_apm_stop_master(sc); 8146 8147 /* Reset the entire device. */ 8148 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_SW); 8149 DELAY(10); 8150 /* Clear "initialization complete" bit. */ 8151 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE); 8152 } 8153 8154 static int 8155 iwn4965_nic_config(struct iwn_softc *sc) 8156 { 8157 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 8158 8159 if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) { 8160 /* 8161 * I don't believe this to be correct but this is what the 8162 * vendor driver is doing. Probably the bits should not be 8163 * shifted in IWN_RFCFG_*. 8164 */ 8165 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, 8166 IWN_RFCFG_TYPE(sc->rfcfg) | 8167 IWN_RFCFG_STEP(sc->rfcfg) | 8168 IWN_RFCFG_DASH(sc->rfcfg)); 8169 } 8170 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, 8171 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI); 8172 return 0; 8173 } 8174 8175 static int 8176 iwn5000_nic_config(struct iwn_softc *sc) 8177 { 8178 uint32_t tmp; 8179 int error; 8180 8181 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 8182 8183 if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) { 8184 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, 8185 IWN_RFCFG_TYPE(sc->rfcfg) | 8186 IWN_RFCFG_STEP(sc->rfcfg) | 8187 IWN_RFCFG_DASH(sc->rfcfg)); 8188 } 8189 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, 8190 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI); 8191 8192 if ((error = iwn_nic_lock(sc)) != 0) 8193 return error; 8194 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_EARLY_PWROFF_DIS); 8195 8196 if (sc->hw_type == IWN_HW_REV_TYPE_1000) { 8197 /* 8198 * Select first Switching Voltage Regulator (1.32V) to 8199 * solve a stability issue related to noisy DC2DC line 8200 * in the silicon of 1000 Series. 8201 */ 8202 tmp = iwn_prph_read(sc, IWN_APMG_DIGITAL_SVR); 8203 tmp &= ~IWN_APMG_DIGITAL_SVR_VOLTAGE_MASK; 8204 tmp |= IWN_APMG_DIGITAL_SVR_VOLTAGE_1_32; 8205 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp); 8206 } 8207 iwn_nic_unlock(sc); 8208 8209 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) { 8210 /* Use internal power amplifier only. */ 8211 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA); 8212 } 8213 if (sc->base_params->additional_nic_config && sc->calib_ver >= 6) { 8214 /* Indicate that ROM calibration version is >=6. */ 8215 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6); 8216 } 8217 if (sc->base_params->additional_gp_drv_bit) 8218 IWN_SETBITS(sc, IWN_GP_DRIVER, 8219 sc->base_params->additional_gp_drv_bit); 8220 return 0; 8221 } 8222 8223 /* 8224 * Take NIC ownership over Intel Active Management Technology (AMT). 8225 */ 8226 static int 8227 iwn_hw_prepare(struct iwn_softc *sc) 8228 { 8229 int ntries; 8230 8231 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 8232 8233 /* Check if hardware is ready. */ 8234 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY); 8235 for (ntries = 0; ntries < 5; ntries++) { 8236 if (IWN_READ(sc, IWN_HW_IF_CONFIG) & 8237 IWN_HW_IF_CONFIG_NIC_READY) 8238 return 0; 8239 DELAY(10); 8240 } 8241 8242 /* Hardware not ready, force into ready state. */ 8243 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_PREPARE); 8244 for (ntries = 0; ntries < 15000; ntries++) { 8245 if (!(IWN_READ(sc, IWN_HW_IF_CONFIG) & 8246 IWN_HW_IF_CONFIG_PREPARE_DONE)) 8247 break; 8248 DELAY(10); 8249 } 8250 if (ntries == 15000) 8251 return ETIMEDOUT; 8252 8253 /* Hardware should be ready now. */ 8254 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY); 8255 for (ntries = 0; ntries < 5; ntries++) { 8256 if (IWN_READ(sc, IWN_HW_IF_CONFIG) & 8257 IWN_HW_IF_CONFIG_NIC_READY) 8258 return 0; 8259 DELAY(10); 8260 } 8261 return ETIMEDOUT; 8262 } 8263 8264 static int 8265 iwn_hw_init(struct iwn_softc *sc) 8266 { 8267 struct iwn_ops *ops = &sc->ops; 8268 int error, chnl, qid; 8269 8270 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 8271 8272 /* Clear pending interrupts. */ 8273 IWN_WRITE(sc, IWN_INT, 0xffffffff); 8274 8275 if ((error = iwn_apm_init(sc)) != 0) { 8276 device_printf(sc->sc_dev, 8277 "%s: could not power ON adapter, error %d\n", __func__, 8278 error); 8279 return error; 8280 } 8281 8282 /* Select VMAIN power source. */ 8283 if ((error = iwn_nic_lock(sc)) != 0) 8284 return error; 8285 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_PWR_SRC_MASK); 8286 iwn_nic_unlock(sc); 8287 8288 /* Perform adapter-specific initialization. */ 8289 if ((error = ops->nic_config(sc)) != 0) 8290 return error; 8291 8292 /* Initialize RX ring. */ 8293 if ((error = iwn_nic_lock(sc)) != 0) 8294 return error; 8295 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0); 8296 IWN_WRITE(sc, IWN_FH_RX_WPTR, 0); 8297 /* Set physical address of RX ring (256-byte aligned). */ 8298 IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8); 8299 /* Set physical address of RX status (16-byte aligned). */ 8300 IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4); 8301 /* Enable RX. */ 8302 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 8303 IWN_FH_RX_CONFIG_ENA | 8304 IWN_FH_RX_CONFIG_IGN_RXF_EMPTY | /* HW bug workaround */ 8305 IWN_FH_RX_CONFIG_IRQ_DST_HOST | 8306 IWN_FH_RX_CONFIG_SINGLE_FRAME | 8307 IWN_FH_RX_CONFIG_RB_TIMEOUT(0) | 8308 IWN_FH_RX_CONFIG_NRBD(IWN_RX_RING_COUNT_LOG)); 8309 iwn_nic_unlock(sc); 8310 IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7); 8311 8312 if ((error = iwn_nic_lock(sc)) != 0) 8313 return error; 8314 8315 /* Initialize TX scheduler. */ 8316 iwn_prph_write(sc, sc->sched_txfact_addr, 0); 8317 8318 /* Set physical address of "keep warm" page (16-byte aligned). */ 8319 IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4); 8320 8321 /* Initialize TX rings. */ 8322 for (qid = 0; qid < sc->ntxqs; qid++) { 8323 struct iwn_tx_ring *txq = &sc->txq[qid]; 8324 8325 /* Set physical address of TX ring (256-byte aligned). */ 8326 IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid), 8327 txq->desc_dma.paddr >> 8); 8328 } 8329 iwn_nic_unlock(sc); 8330 8331 /* Enable DMA channels. */ 8332 for (chnl = 0; chnl < sc->ndmachnls; chnl++) { 8333 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 8334 IWN_FH_TX_CONFIG_DMA_ENA | 8335 IWN_FH_TX_CONFIG_DMA_CREDIT_ENA); 8336 } 8337 8338 /* Clear "radio off" and "commands blocked" bits. */ 8339 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL); 8340 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CMD_BLOCKED); 8341 8342 /* Clear pending interrupts. */ 8343 IWN_WRITE(sc, IWN_INT, 0xffffffff); 8344 /* Enable interrupt coalescing. */ 8345 IWN_WRITE(sc, IWN_INT_COALESCING, 512 / 8); 8346 /* Enable interrupts. */ 8347 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask); 8348 8349 /* _Really_ make sure "radio off" bit is cleared! */ 8350 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL); 8351 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL); 8352 8353 /* Enable shadow registers. */ 8354 if (sc->base_params->shadow_reg_enable) 8355 IWN_SETBITS(sc, IWN_SHADOW_REG_CTRL, 0x800fffff); 8356 8357 if ((error = ops->load_firmware(sc)) != 0) { 8358 device_printf(sc->sc_dev, 8359 "%s: could not load firmware, error %d\n", __func__, 8360 error); 8361 return error; 8362 } 8363 /* Wait at most one second for firmware alive notification. */ 8364 if ((error = zsleep(sc, &wlan_global_serializer, 0, "iwninit", hz)) != 0) { 8365 device_printf(sc->sc_dev, 8366 "%s: timeout waiting for adapter to initialize, error %d\n", 8367 __func__, error); 8368 return error; 8369 } 8370 /* Do post-firmware initialization. */ 8371 8372 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 8373 8374 return ops->post_alive(sc); 8375 } 8376 8377 static void 8378 iwn_hw_stop(struct iwn_softc *sc) 8379 { 8380 int chnl, qid, ntries; 8381 8382 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 8383 8384 IWN_WRITE(sc, IWN_RESET, IWN_RESET_NEVO); 8385 8386 /* Disable interrupts. */ 8387 IWN_WRITE(sc, IWN_INT_MASK, 0); 8388 IWN_WRITE(sc, IWN_INT, 0xffffffff); 8389 IWN_WRITE(sc, IWN_FH_INT, 0xffffffff); 8390 sc->sc_flags &= ~IWN_FLAG_USE_ICT; 8391 8392 /* Make sure we no longer hold the NIC lock. */ 8393 iwn_nic_unlock(sc); 8394 8395 /* Stop TX scheduler. */ 8396 iwn_prph_write(sc, sc->sched_txfact_addr, 0); 8397 8398 /* Stop all DMA channels. */ 8399 if (iwn_nic_lock(sc) == 0) { 8400 for (chnl = 0; chnl < sc->ndmachnls; chnl++) { 8401 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 0); 8402 for (ntries = 0; ntries < 200; ntries++) { 8403 if (IWN_READ(sc, IWN_FH_TX_STATUS) & 8404 IWN_FH_TX_STATUS_IDLE(chnl)) 8405 break; 8406 DELAY(10); 8407 } 8408 } 8409 iwn_nic_unlock(sc); 8410 } 8411 8412 /* Stop RX ring. */ 8413 iwn_reset_rx_ring(sc, &sc->rxq); 8414 8415 /* Reset all TX rings. */ 8416 for (qid = 0; qid < sc->ntxqs; qid++) 8417 iwn_reset_tx_ring(sc, &sc->txq[qid]); 8418 8419 if (iwn_nic_lock(sc) == 0) { 8420 iwn_prph_write(sc, IWN_APMG_CLK_DIS, 8421 IWN_APMG_CLK_CTRL_DMA_CLK_RQT); 8422 iwn_nic_unlock(sc); 8423 } 8424 DELAY(5); 8425 /* Power OFF adapter. */ 8426 iwn_apm_stop(sc); 8427 } 8428 8429 static void 8430 iwn_radio_on_task(void *arg0, int pending) 8431 { 8432 struct iwn_softc *sc = arg0; 8433 struct ifnet *ifp; 8434 struct ieee80211com *ic; 8435 struct ieee80211vap *vap; 8436 8437 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 8438 8439 wlan_serialize_enter(); 8440 ifp = sc->sc_ifp; 8441 ic = ifp->if_l2com; 8442 vap = TAILQ_FIRST(&ic->ic_vaps); 8443 if (vap != NULL) { 8444 iwn_init_locked(sc); 8445 ieee80211_init(vap); 8446 } 8447 wlan_serialize_exit(); 8448 } 8449 8450 static void 8451 iwn_radio_off_task(void *arg0, int pending) 8452 { 8453 struct iwn_softc *sc = arg0; 8454 struct ifnet *ifp; 8455 struct ieee80211com *ic; 8456 struct ieee80211vap *vap; 8457 8458 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 8459 8460 wlan_serialize_enter(); 8461 ifp = sc->sc_ifp; 8462 ic = ifp->if_l2com; 8463 vap = TAILQ_FIRST(&ic->ic_vaps); 8464 iwn_stop_locked(sc); 8465 if (vap != NULL) 8466 ieee80211_stop(vap); 8467 8468 /* Enable interrupts to get RF toggle notification. */ 8469 IWN_WRITE(sc, IWN_INT, 0xffffffff); 8470 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask); 8471 wlan_serialize_exit(); 8472 } 8473 8474 static void 8475 iwn_panicked_task(void *arg0, int pending) 8476 { 8477 struct iwn_softc *sc = arg0; 8478 struct ifnet *ifp = sc->sc_ifp; 8479 struct ieee80211com *ic = ifp->if_l2com; 8480 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 8481 int error; 8482 8483 if (vap == NULL) { 8484 kprintf("%s: null vap\n", __func__); 8485 return; 8486 } 8487 8488 device_printf(sc->sc_dev, "%s: controller panicked, iv_state = %d; " 8489 "resetting...\n", __func__, vap->iv_state); 8490 8491 wlan_serialize_enter(); 8492 8493 iwn_stop_locked(sc); 8494 iwn_init_locked(sc); 8495 if (vap->iv_state >= IEEE80211_S_AUTH && 8496 (error = iwn_auth(sc, vap)) != 0) { 8497 device_printf(sc->sc_dev, 8498 "%s: could not move to auth state\n", __func__); 8499 } 8500 if (vap->iv_state >= IEEE80211_S_RUN && 8501 (error = iwn_run(sc, vap)) != 0) { 8502 device_printf(sc->sc_dev, 8503 "%s: could not move to run state\n", __func__); 8504 } 8505 8506 /* Only run start once the NIC is in a useful state, like associated */ 8507 iwn_start_locked(sc->sc_ifp); 8508 8509 wlan_serialize_exit(); 8510 } 8511 8512 static void 8513 iwn_init_locked(struct iwn_softc *sc) 8514 { 8515 struct ifnet *ifp = sc->sc_ifp; 8516 int error; 8517 8518 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); 8519 8520 /* 8521 * Make sure we hold the serializer or we will have timing issues 8522 * with the wlan subsystem. 8523 */ 8524 wlan_assert_serialized(); 8525 if ((error = iwn_hw_prepare(sc)) != 0) { 8526 device_printf(sc->sc_dev, "%s: hardware not ready, error %d\n", 8527 __func__, error); 8528 goto fail; 8529 } 8530 8531 /* Initialize interrupt mask to default value. */ 8532 sc->int_mask = IWN_INT_MASK_DEF; 8533 sc->sc_flags &= ~IWN_FLAG_USE_ICT; 8534 8535 /* Check that the radio is not disabled by hardware switch. */ 8536 if (!(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) { 8537 device_printf(sc->sc_dev, 8538 "radio is disabled by hardware switch\n"); 8539 /* Enable interrupts to get RF toggle notifications. */ 8540 IWN_WRITE(sc, IWN_INT, 0xffffffff); 8541 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask); 8542 return; 8543 } 8544 8545 /* Read firmware images from the filesystem. */ 8546 if ((error = iwn_read_firmware(sc)) != 0) { 8547 device_printf(sc->sc_dev, 8548 "%s: could not read firmware, error %d\n", __func__, 8549 error); 8550 goto fail; 8551 } 8552 8553 /* Initialize hardware and upload firmware. */ 8554 error = iwn_hw_init(sc); 8555 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD); 8556 sc->fw_fp = NULL; 8557 if (error != 0) { 8558 device_printf(sc->sc_dev, 8559 "%s: could not initialize hardware, error %d\n", __func__, 8560 error); 8561 goto fail; 8562 } 8563 8564 /* Configure adapter now that it is ready. */ 8565 if ((error = iwn_config(sc)) != 0) { 8566 device_printf(sc->sc_dev, 8567 "%s: could not configure device, error %d\n", __func__, 8568 error); 8569 goto fail; 8570 } 8571 8572 ifq_clr_oactive(&ifp->if_snd); 8573 ifp->if_flags |= IFF_RUNNING; 8574 8575 callout_reset(&sc->watchdog_to, hz, iwn_watchdog_timeout, sc); 8576 8577 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); 8578 8579 return; 8580 8581 fail: iwn_stop_locked(sc); 8582 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__); 8583 } 8584 8585 static void 8586 iwn_init(void *arg) 8587 { 8588 struct iwn_softc *sc = arg; 8589 struct ifnet *ifp = sc->sc_ifp; 8590 struct ieee80211com *ic = ifp->if_l2com; 8591 8592 wlan_assert_serialized(); 8593 iwn_init_locked(sc); 8594 8595 if (ifp->if_flags & IFF_RUNNING) 8596 ieee80211_start_all(ic); 8597 } 8598 8599 static void 8600 iwn_stop_locked(struct iwn_softc *sc) 8601 { 8602 struct ifnet *ifp = sc->sc_ifp; 8603 8604 sc->sc_is_scanning = 0; 8605 sc->sc_tx_timer = 0; 8606 callout_stop(&sc->watchdog_to); 8607 callout_stop(&sc->calib_to); 8608 ifp->if_flags &= ~IFF_RUNNING; 8609 ifq_clr_oactive(&ifp->if_snd); 8610 8611 /* Power OFF hardware. */ 8612 iwn_hw_stop(sc); 8613 } 8614 8615 /* 8616 * Callback from net80211 to start a scan. 8617 */ 8618 static void 8619 iwn_scan_start(struct ieee80211com *ic) 8620 { 8621 struct ifnet *ifp = ic->ic_ifp; 8622 struct iwn_softc *sc = ifp->if_softc; 8623 8624 /* make the link LED blink while we're scanning */ 8625 iwn_set_led(sc, IWN_LED_LINK, 20, 2); 8626 } 8627 8628 /* 8629 * Callback from net80211 to terminate a scan. 8630 */ 8631 static void 8632 iwn_scan_end(struct ieee80211com *ic) 8633 { 8634 struct ifnet *ifp = ic->ic_ifp; 8635 struct iwn_softc *sc = ifp->if_softc; 8636 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 8637 8638 if (vap->iv_state == IEEE80211_S_RUN) { 8639 /* Set link LED to ON status if we are associated */ 8640 iwn_set_led(sc, IWN_LED_LINK, 0, 1); 8641 } 8642 } 8643 8644 /* 8645 * Callback from net80211 to force a channel change. 8646 */ 8647 static void 8648 iwn_set_channel(struct ieee80211com *ic) 8649 { 8650 const struct ieee80211_channel *c = ic->ic_curchan; 8651 struct ifnet *ifp = ic->ic_ifp; 8652 struct iwn_softc *sc = ifp->if_softc; 8653 int error; 8654 8655 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 8656 8657 sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq); 8658 sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags); 8659 sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq); 8660 sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags); 8661 8662 /* 8663 * Only need to set the channel in Monitor mode. AP scanning and auth 8664 * are already taken care of by their respective firmware commands. 8665 */ 8666 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 8667 error = iwn_config(sc); 8668 if (error != 0) 8669 device_printf(sc->sc_dev, 8670 "%s: error %d settting channel\n", __func__, error); 8671 } 8672 } 8673 8674 /* 8675 * Callback from net80211 to start scanning of the current channel. 8676 */ 8677 static void 8678 iwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell) 8679 { 8680 struct ieee80211vap *vap = ss->ss_vap; 8681 struct iwn_softc *sc = vap->iv_ic->ic_ifp->if_softc; 8682 struct ieee80211com *ic = vap->iv_ic; 8683 int error; 8684 8685 error = iwn_scan(sc, vap, ss, ic->ic_curchan); 8686 if (error != 0) 8687 ieee80211_cancel_scan(vap); 8688 } 8689 8690 /* 8691 * Callback from net80211 to handle the minimum dwell time being met. 8692 * The intent is to terminate the scan but we just let the firmware 8693 * notify us when it's finished as we have no safe way to abort it. 8694 */ 8695 static void 8696 iwn_scan_mindwell(struct ieee80211_scan_state *ss) 8697 { 8698 /* NB: don't try to abort scan; wait for firmware to finish */ 8699 } 8700 8701 static void 8702 iwn_hw_reset_task(void *arg0, int pending) 8703 { 8704 struct iwn_softc *sc = arg0; 8705 struct ifnet *ifp; 8706 struct ieee80211com *ic; 8707 8708 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); 8709 8710 wlan_serialize_enter(); 8711 ifp = sc->sc_ifp; 8712 ic = ifp->if_l2com; 8713 iwn_stop_locked(sc); 8714 iwn_init_locked(sc); 8715 ieee80211_notify_radio(ic, 1); 8716 wlan_serialize_exit(); 8717 } 8718 #ifdef IWN_DEBUG 8719 #define IWN_DESC(x) case x: return #x 8720 #define COUNTOF(array) (sizeof(array) / sizeof(array[0])) 8721 8722 /* 8723 * Translate CSR code to string 8724 */ 8725 static char *iwn_get_csr_string(int csr) 8726 { 8727 switch (csr) { 8728 IWN_DESC(IWN_HW_IF_CONFIG); 8729 IWN_DESC(IWN_INT_COALESCING); 8730 IWN_DESC(IWN_INT); 8731 IWN_DESC(IWN_INT_MASK); 8732 IWN_DESC(IWN_FH_INT); 8733 IWN_DESC(IWN_GPIO_IN); 8734 IWN_DESC(IWN_RESET); 8735 IWN_DESC(IWN_GP_CNTRL); 8736 IWN_DESC(IWN_HW_REV); 8737 IWN_DESC(IWN_EEPROM); 8738 IWN_DESC(IWN_EEPROM_GP); 8739 IWN_DESC(IWN_OTP_GP); 8740 IWN_DESC(IWN_GIO); 8741 IWN_DESC(IWN_GP_UCODE); 8742 IWN_DESC(IWN_GP_DRIVER); 8743 IWN_DESC(IWN_UCODE_GP1); 8744 IWN_DESC(IWN_UCODE_GP2); 8745 IWN_DESC(IWN_LED); 8746 IWN_DESC(IWN_DRAM_INT_TBL); 8747 IWN_DESC(IWN_GIO_CHICKEN); 8748 IWN_DESC(IWN_ANA_PLL); 8749 IWN_DESC(IWN_HW_REV_WA); 8750 IWN_DESC(IWN_DBG_HPET_MEM); 8751 default: 8752 return "UNKNOWN CSR"; 8753 } 8754 } 8755 8756 /* 8757 * This function print firmware register 8758 */ 8759 static void 8760 iwn_debug_register(struct iwn_softc *sc) 8761 { 8762 int i; 8763 static const uint32_t csr_tbl[] = { 8764 IWN_HW_IF_CONFIG, 8765 IWN_INT_COALESCING, 8766 IWN_INT, 8767 IWN_INT_MASK, 8768 IWN_FH_INT, 8769 IWN_GPIO_IN, 8770 IWN_RESET, 8771 IWN_GP_CNTRL, 8772 IWN_HW_REV, 8773 IWN_EEPROM, 8774 IWN_EEPROM_GP, 8775 IWN_OTP_GP, 8776 IWN_GIO, 8777 IWN_GP_UCODE, 8778 IWN_GP_DRIVER, 8779 IWN_UCODE_GP1, 8780 IWN_UCODE_GP2, 8781 IWN_LED, 8782 IWN_DRAM_INT_TBL, 8783 IWN_GIO_CHICKEN, 8784 IWN_ANA_PLL, 8785 IWN_HW_REV_WA, 8786 IWN_DBG_HPET_MEM, 8787 }; 8788 DPRINTF(sc, IWN_DEBUG_REGISTER, 8789 "CSR values: (2nd byte of IWN_INT_COALESCING is IWN_INT_PERIODIC)%s", 8790 "\n"); 8791 for (i = 0; i < COUNTOF(csr_tbl); i++){ 8792 DPRINTF(sc, IWN_DEBUG_REGISTER," %10s: 0x%08x ", 8793 iwn_get_csr_string(csr_tbl[i]), IWN_READ(sc, csr_tbl[i])); 8794 if ((i+1) % 3 == 0) 8795 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n"); 8796 } 8797 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n"); 8798 } 8799 #endif 8800