1 /*- 2 * Copyright (c) 2013 Cedric GROSS <cg@cgross.info> 3 * Copyright (c) 2011 Intel Corporation 4 * 5 * Permission to use, copy, modify, and distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $FreeBSD: head/sys/dev/iwn/if_iwn_chip_cfg.h 258208 2013-11-16 04:29:02Z eadler $ 18 */ 19 20 #ifndef __IF_IWN_CHIP_CFG_H__ 21 #define __IF_IWN_CHIP_CFG_H__ 22 23 /* ========================================================================== 24 * NIC PARAMETERS 25 * 26 * ========================================================================== 27 */ 28 29 /* 30 * Flags for managing calibration result. See calib_need 31 * in iwn_base_params struct 32 * 33 * These are bitmasks that determine which indexes in the calibcmd 34 * array are pushed up. 35 */ 36 #define IWN_FLG_NEED_PHY_CALIB_DC (1<<0) 37 #define IWN_FLG_NEED_PHY_CALIB_LO (1<<1) 38 #define IWN_FLG_NEED_PHY_CALIB_TX_IQ (1<<2) 39 #define IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC (1<<3) 40 #define IWN_FLG_NEED_PHY_CALIB_BASE_BAND (1<<4) 41 /* 42 * These aren't (yet) included in the calibcmd array, but 43 * are used as flags for which calibrations to use. 44 * 45 * XXX I think they should be named differently and 46 * stuffed in a different member in the config struct! 47 */ 48 #define IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET (1<<5) 49 #define IWN_FLG_NEED_PHY_CALIB_CRYSTAL (1<<6) 50 #define IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2 (1<<7) 51 52 /* 53 * Define some parameters for managing different NIC. 54 * Refer to linux specific file like iwl-xxxx.c to determine correct value 55 * for NIC. 56 * 57 * @max_ll_items: max number of OTP blocks 58 * @shadow_ram_support: shadow support for OTP memory 59 * @shadow_reg_enable: HW shadhow register bit 60 * @no_idle_support: do not support idle mode 61 * @advanced_bt_coexist : Advanced BT management 62 * @bt_session_2 : NIC need a new struct for configure BT coexistence. Needed 63 * only if advanced_bt_coexist is true 64 * @bt_sco_disable : 65 * @additional_nic_config: For 6005 series 66 * @iq_invert : ? But need it for N 2000 series 67 * @regulatory_bands : XXX 68 * @enhanced_TX_power : EEPROM Has advanced TX power options. Set 'True' 69 * if update_enhanced_txpower = iwl_eeprom_enhanced_txpower. 70 * See iwl-agn-devices.c file to determine that(enhanced_txpower) 71 * @need_temp_offset_calib : Need to compute some temp offset for calibration. 72 * @calib_need : Use IWN_FLG_NEED_PHY_CALIB_* flags to specify which 73 * calibration data ucode need. See calib_init_cfg in iwl-xxxx.c 74 * linux kernel file 75 * @support_hostap: Define IEEE80211_C_HOSTAP for ic_caps 76 * @no_multi_vaps: See iwn_vap_create 77 * @additional_gp_drv_bit : Specific bit to defined during nic_config 78 * @bt_mode: BT configuration mode 79 */ 80 enum bt_mode_enum { 81 IWN_BT_NONE, 82 IWN_BT_SIMPLE, 83 IWN_BT_ADVANCED 84 }; 85 86 struct iwn_base_params { 87 uint32_t pll_cfg_val; 88 const uint16_t max_ll_items; 89 #define IWN_OTP_MAX_LL_ITEMS_1000 (3) /* OTP blocks for 1000 */ 90 #define IWN_OTP_MAX_LL_ITEMS_6x00 (4) /* OTP blocks for 6x00 */ 91 #define IWN_OTP_MAX_LL_ITEMS_6x50 (7) /* OTP blocks for 6x50 */ 92 #define IWN_OTP_MAX_LL_ITEMS_2x00 (4) /* OTP blocks for 2x00 */ 93 const bool shadow_ram_support; 94 const bool shadow_reg_enable; 95 const bool bt_session_2; 96 const bool bt_sco_disable; 97 const bool additional_nic_config; 98 const uint32_t *regulatory_bands; 99 const bool enhanced_TX_power; 100 const uint16_t calib_need; 101 const bool support_hostap; 102 const bool no_multi_vaps; 103 uint8_t additional_gp_drv_bit; 104 enum bt_mode_enum bt_mode; 105 }; 106 107 static const struct iwn_base_params iwn5000_base_params = { 108 .pll_cfg_val = IWN_ANA_PLL_INIT, /* pll_cfg_val; */ 109 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x00, /* max_ll_items */ 110 .shadow_ram_support = true, /* shadow_ram_support */ 111 .shadow_reg_enable = false, /* shadow_reg_enable */ 112 .bt_session_2 = false, /* bt_session_2 */ 113 .bt_sco_disable = true, /* bt_sco_disable */ 114 .additional_nic_config = false, /* additional_nic_config */ 115 .regulatory_bands = iwn5000_regulatory_bands, /* regulatory_bands */ 116 .enhanced_TX_power = false, /* enhanced_TX_power */ 117 .calib_need = 118 ( IWN_FLG_NEED_PHY_CALIB_LO 119 | IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC 120 | IWN_FLG_NEED_PHY_CALIB_TX_IQ 121 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND ), 122 .support_hostap = false, /* support_hostap */ 123 .no_multi_vaps = true, /* no_multi_vaps */ 124 .additional_gp_drv_bit = IWN_GP_DRIVER_NONE, /* additional_gp_drv_bit */ 125 .bt_mode = IWN_BT_NONE, /* bt_mode */ 126 }; 127 128 /* 129 * 4965 support 130 */ 131 static const struct iwn_base_params iwn4965_base_params = { 132 .pll_cfg_val = 0, /* pll_cfg_val; */ 133 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x00, /* max_ll_items - ignored for 4965 */ 134 .shadow_ram_support = true, /* shadow_ram_support */ 135 .shadow_reg_enable = false, /* shadow_reg_enable */ 136 .bt_session_2 = false, /* bt_session_2 XXX unknown? */ 137 .bt_sco_disable = true, /* bt_sco_disable XXX unknown? */ 138 .additional_nic_config = false, /* additional_nic_config - not for 4965 */ 139 .regulatory_bands = iwn5000_regulatory_bands, /* regulatory_bands */ 140 .enhanced_TX_power = false, /* enhanced_TX_power - not for 4965 */ 141 .calib_need = 142 (IWN_FLG_NEED_PHY_CALIB_DC 143 | IWN_FLG_NEED_PHY_CALIB_LO 144 | IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC 145 | IWN_FLG_NEED_PHY_CALIB_TX_IQ 146 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND ), 147 .support_hostap = false, /* support_hostap - XXX should work on fixing! */ 148 .no_multi_vaps = true, /* no_multi_vaps - XXX should work on fixing! */ 149 .additional_gp_drv_bit = IWN_GP_DRIVER_NONE, /* additional_gp_drv_bit */ 150 .bt_mode = IWN_BT_SIMPLE, /* bt_mode */ 151 }; 152 153 154 static const struct iwn_base_params iwn2000_base_params = { 155 .pll_cfg_val = 0, 156 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_2x00, 157 .shadow_ram_support = true, 158 .shadow_reg_enable = false, 159 .bt_session_2 = false, 160 .bt_sco_disable = true, 161 .additional_nic_config = false, 162 .regulatory_bands = iwn2030_regulatory_bands, 163 .enhanced_TX_power = true, 164 .calib_need = 165 (IWN_FLG_NEED_PHY_CALIB_DC 166 | IWN_FLG_NEED_PHY_CALIB_LO 167 | IWN_FLG_NEED_PHY_CALIB_TX_IQ 168 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND 169 | IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2 ), 170 .support_hostap = true, 171 .no_multi_vaps = false, 172 .additional_gp_drv_bit = IWN_GP_DRIVER_REG_BIT_RADIO_IQ_INVERT, 173 .bt_mode = IWN_BT_NONE, 174 }; 175 176 static const struct iwn_base_params iwn2030_base_params = { 177 .pll_cfg_val = 0, 178 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_2x00, 179 .shadow_ram_support = true, 180 .shadow_reg_enable = false, /* XXX check? */ 181 .bt_session_2 = true, 182 .bt_sco_disable = true, 183 .additional_nic_config = false, 184 .regulatory_bands = iwn2030_regulatory_bands, 185 .enhanced_TX_power = true, 186 .calib_need = 187 (IWN_FLG_NEED_PHY_CALIB_DC 188 | IWN_FLG_NEED_PHY_CALIB_LO 189 | IWN_FLG_NEED_PHY_CALIB_TX_IQ 190 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND 191 | IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2 ), 192 .support_hostap = true, 193 .no_multi_vaps = false, 194 .additional_gp_drv_bit = IWN_GP_DRIVER_REG_BIT_RADIO_IQ_INVERT, 195 .bt_mode = IWN_BT_ADVANCED, 196 }; 197 198 static const struct iwn_base_params iwn1000_base_params = { 199 .pll_cfg_val = IWN_ANA_PLL_INIT, 200 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_1000, 201 .shadow_ram_support = false, 202 .shadow_reg_enable = false, /* XXX check? */ 203 .bt_session_2 = false, 204 .bt_sco_disable = false, 205 .additional_nic_config = false, 206 .regulatory_bands = iwn5000_regulatory_bands, 207 .enhanced_TX_power = false, 208 .calib_need = 209 ( IWN_FLG_NEED_PHY_CALIB_DC 210 | IWN_FLG_NEED_PHY_CALIB_LO 211 | IWN_FLG_NEED_PHY_CALIB_TX_IQ 212 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND ), 213 .support_hostap = false, 214 .no_multi_vaps = true, 215 .additional_gp_drv_bit = IWN_GP_DRIVER_NONE, 216 .bt_mode = IWN_BT_NONE, 217 }; 218 static const struct iwn_base_params iwn_6000_base_params = { 219 .pll_cfg_val = 0, 220 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x00, 221 .shadow_ram_support = true, 222 .shadow_reg_enable = true, 223 .bt_session_2 = false, 224 .bt_sco_disable = false, 225 .additional_nic_config = false, 226 .regulatory_bands = iwn6000_regulatory_bands, 227 .enhanced_TX_power = true, 228 .calib_need = 229 (IWN_FLG_NEED_PHY_CALIB_DC 230 | IWN_FLG_NEED_PHY_CALIB_LO 231 | IWN_FLG_NEED_PHY_CALIB_TX_IQ 232 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND ), 233 .support_hostap = false, 234 .no_multi_vaps = true, 235 .additional_gp_drv_bit = IWN_GP_DRIVER_NONE, 236 .bt_mode = IWN_BT_SIMPLE, 237 }; 238 static const struct iwn_base_params iwn_6000i_base_params = { 239 .pll_cfg_val = 0, 240 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x00, 241 .shadow_ram_support = true, 242 .shadow_reg_enable = true, 243 .bt_session_2 = false, 244 .bt_sco_disable = true, 245 .additional_nic_config = false, 246 .regulatory_bands = iwn6000_regulatory_bands, 247 .enhanced_TX_power = true, 248 .calib_need = 249 (IWN_FLG_NEED_PHY_CALIB_DC 250 | IWN_FLG_NEED_PHY_CALIB_LO 251 | IWN_FLG_NEED_PHY_CALIB_TX_IQ 252 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND ), 253 .support_hostap = false, 254 .no_multi_vaps = true, 255 .additional_gp_drv_bit = IWN_GP_DRIVER_NONE, 256 .bt_mode = IWN_BT_SIMPLE, 257 }; 258 static const struct iwn_base_params iwn_6000g2_base_params = { 259 .pll_cfg_val = 0, 260 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x00, 261 .shadow_ram_support = true, 262 .shadow_reg_enable = true, 263 .bt_session_2 = false, 264 .bt_sco_disable = true, 265 .additional_nic_config = false, 266 .regulatory_bands = iwn6000_regulatory_bands, 267 .enhanced_TX_power = true, 268 .calib_need = 269 (IWN_FLG_NEED_PHY_CALIB_DC 270 | IWN_FLG_NEED_PHY_CALIB_LO 271 | IWN_FLG_NEED_PHY_CALIB_TX_IQ 272 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND 273 | IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET ), 274 .support_hostap = false, 275 .no_multi_vaps = true, 276 .additional_gp_drv_bit = 0, 277 .bt_mode = IWN_BT_SIMPLE, 278 }; 279 280 static const struct iwn_base_params iwn_6050_base_params = { 281 .pll_cfg_val = 0, 282 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x50, 283 .shadow_ram_support = true, 284 .shadow_reg_enable = true, 285 .bt_session_2 = false, 286 .bt_sco_disable = true, 287 .additional_nic_config = true, 288 .regulatory_bands = iwn6000_regulatory_bands, 289 .enhanced_TX_power = true, 290 .calib_need = 291 (IWN_FLG_NEED_PHY_CALIB_LO 292 | IWN_FLG_NEED_PHY_CALIB_TX_IQ 293 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND 294 | IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET ), 295 .support_hostap = false, 296 .no_multi_vaps = true, 297 .additional_gp_drv_bit = IWN_GP_DRIVER_NONE, 298 .bt_mode = IWN_BT_SIMPLE, 299 }; 300 static const struct iwn_base_params iwn_6150_base_params = { 301 .pll_cfg_val = 0, 302 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x50, 303 .shadow_ram_support = true, 304 .shadow_reg_enable = true, 305 .bt_session_2 = false, 306 .bt_sco_disable = true, 307 .additional_nic_config = true, 308 .regulatory_bands = iwn6000_regulatory_bands, 309 .enhanced_TX_power = true, 310 .calib_need = 311 (IWN_FLG_NEED_PHY_CALIB_LO 312 | IWN_FLG_NEED_PHY_CALIB_TX_IQ 313 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND), 314 .support_hostap = false, 315 .no_multi_vaps = true, 316 .additional_gp_drv_bit = IWN_GP_DRIVER_6050_1X2, 317 .bt_mode = IWN_BT_SIMPLE, 318 }; 319 320 /* IWL_DEVICE_6035 & IWL_DEVICE_6030 */ 321 static const struct iwn_base_params iwn_6000g2b_base_params = { 322 .pll_cfg_val = 0, 323 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x00, 324 .shadow_ram_support = true, 325 .shadow_reg_enable = true, 326 .bt_session_2 = false, 327 .bt_sco_disable = true, 328 .additional_nic_config = false, 329 .regulatory_bands = iwn6000_regulatory_bands, 330 .enhanced_TX_power = true, 331 .calib_need = 332 (IWN_FLG_NEED_PHY_CALIB_DC 333 | IWN_FLG_NEED_PHY_CALIB_LO 334 | IWN_FLG_NEED_PHY_CALIB_TX_IQ 335 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND 336 | IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET ), 337 .support_hostap = false, 338 .no_multi_vaps = true, 339 .additional_gp_drv_bit = IWN_GP_DRIVER_NONE, 340 .bt_mode = IWN_BT_ADVANCED, 341 }; 342 static const struct iwn_base_params iwn_5x50_base_params = { 343 .pll_cfg_val = IWN_ANA_PLL_INIT, 344 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x00, 345 .shadow_ram_support = true, 346 .shadow_reg_enable = false, 347 .bt_session_2 = false, 348 .bt_sco_disable = true, 349 .additional_nic_config = false, 350 .regulatory_bands = iwn5000_regulatory_bands, 351 .enhanced_TX_power =false, 352 .calib_need = 353 (IWN_FLG_NEED_PHY_CALIB_DC 354 | IWN_FLG_NEED_PHY_CALIB_LO 355 | IWN_FLG_NEED_PHY_CALIB_TX_IQ 356 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND ), 357 .support_hostap = false, 358 .no_multi_vaps = true, 359 .additional_gp_drv_bit = IWN_GP_DRIVER_NONE, 360 .bt_mode = IWN_BT_SIMPLE, 361 }; 362 363 #endif /* __IF_IWN_CHIP_CFG_H__ */ 364