xref: /dragonfly/sys/dev/netif/ix/ixgbe_osdep.h (revision 0ca59c34)
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32 ******************************************************************************/
33 /*$FreeBSD$*/
34 
35 #ifndef _IXGBE_OS_H_
36 #define _IXGBE_OS_H_
37 
38 #include <sys/types.h>
39 #include <sys/param.h>
40 #include <sys/endian.h>
41 #include <sys/systm.h>
42 #include <sys/mbuf.h>
43 #include <sys/protosw.h>
44 #include <sys/socket.h>
45 #include <sys/malloc.h>
46 #include <sys/kernel.h>
47 #include <sys/bus.h>
48 #include <sys/rman.h>
49 #include <vm/vm.h>
50 #include <vm/pmap.h>
51 #include <machine/clock.h>
52 #include <bus/pci/pcivar.h>
53 #include <bus/pci/pcireg.h>
54 
55 #define ASSERT(x) if(!(x)) panic("IXGBE: x")
56 #define EWARN(H, W, S) kprintf(W)
57 
58 /* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
59 #define usec_delay(x) DELAY(x)
60 #define msec_delay(x) DELAY(1000*(x))
61 
62 #define DBG 0
63 #define MSGOUT(S, A, B)     kprintf(S "\n", A, B)
64 #define DEBUGFUNC(F)        DEBUGOUT(F);
65 #if DBG
66 	#define DEBUGOUT(S)         kprintf(S "\n")
67 	#define DEBUGOUT1(S,A)      kprintf(S "\n",A)
68 	#define DEBUGOUT2(S,A,B)    kprintf(S "\n",A,B)
69 	#define DEBUGOUT3(S,A,B,C)  kprintf(S "\n",A,B,C)
70 	#define DEBUGOUT4(S,A,B,C,D)  kprintf(S "\n",A,B,C,D)
71 	#define DEBUGOUT5(S,A,B,C,D,E)  kprintf(S "\n",A,B,C,D,E)
72 	#define DEBUGOUT6(S,A,B,C,D,E,F)  kprintf(S "\n",A,B,C,D,E,F)
73 	#define DEBUGOUT7(S,A,B,C,D,E,F,G)  kprintf(S "\n",A,B,C,D,E,F,G)
74 	#define ERROR_REPORT1(S,A)      kprintf(S "\n",A)
75 	#define ERROR_REPORT2(S,A,B)    kprintf(S "\n",A,B)
76 	#define ERROR_REPORT3(S,A,B,C)  kprintf(S "\n",A,B,C)
77 #else
78 	#define DEBUGOUT(S)
79 	#define DEBUGOUT1(S,A)
80 	#define DEBUGOUT2(S,A,B)
81 	#define DEBUGOUT3(S,A,B,C)
82 	#define DEBUGOUT4(S,A,B,C,D)
83 	#define DEBUGOUT5(S,A,B,C,D,E)
84 	#define DEBUGOUT6(S,A,B,C,D,E,F)
85 	#define DEBUGOUT7(S,A,B,C,D,E,F,G)
86 
87 	#define ERROR_REPORT1(S,A)
88 	#define ERROR_REPORT2(S,A,B)
89 	#define ERROR_REPORT3(S,A,B,C)
90 #endif
91 
92 #define FALSE               0
93 #define false               0 /* shared code requires this */
94 #define TRUE                1
95 #define true                1
96 #define CMD_MEM_WRT_INVALIDATE          0x0010  /* BIT_4 */
97 #define PCI_COMMAND_REGISTER            PCIR_COMMAND
98 
99 /* Shared code dropped this define.. */
100 #define IXGBE_VENDOR_ID			0x8086
101 
102 /* Bunch of defines for shared code bogosity */
103 #define UNREFERENCED_PARAMETER(_p)
104 #define UNREFERENCED_1PARAMETER(_p)
105 #define UNREFERENCED_2PARAMETER(_p, _q)
106 #define UNREFERENCED_3PARAMETER(_p, _q, _r)
107 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)
108 
109 
110 #define IXGBE_NTOHL(_i)	ntohl(_i)
111 #define IXGBE_NTOHS(_i)	ntohs(_i)
112 
113 /* XXX these need to be revisited */
114 #define IXGBE_CPU_TO_LE32 le32toh
115 #define IXGBE_LE32_TO_CPUS le32dec
116 
117 typedef uint8_t		u8;
118 typedef int8_t		s8;
119 typedef uint16_t	u16;
120 typedef int16_t		s16;
121 typedef uint32_t	u32;
122 typedef int32_t		s32;
123 typedef uint64_t	u64;
124 typedef boolean_t	bool;
125 
126 /* shared code requires this */
127 #define __le16  u16
128 #define __le32  u32
129 #define __le64  u64
130 #define __be16  u16
131 #define __be32  u32
132 #define __be64  u64
133 
134 #define le16_to_cpu
135 
136 #if defined(__i386__) || defined(__x86_64__)
137 #define mb()	__asm volatile("mfence" ::: "memory")
138 #define wmb()	__asm volatile("sfence" ::: "memory")
139 #define rmb()	__asm volatile("lfence" ::: "memory")
140 #else
141 #define mb()
142 #define rmb()
143 #define wmb()
144 #endif
145 
146 #if defined(__i386__) || defined(__x86_64__)
147 static __inline
148 void prefetch(void *x)
149 {
150 	__asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
151 }
152 #else
153 #define prefetch(x)
154 #endif
155 
156 /*
157  * Optimized bcopy thanks to Luigi Rizzo's investigative work.  Assumes
158  * non-overlapping regions and 32-byte padding on both src and dst.
159  */
160 static __inline int
161 ixgbe_bcopy(void *_src, void *_dst, int l)
162 {
163 	uint64_t *src = _src;
164 	uint64_t *dst = _dst;
165 
166 	for (; l > 0; l -= 32) {
167 		*dst++ = *src++;
168 		*dst++ = *src++;
169 		*dst++ = *src++;
170 		*dst++ = *src++;
171 	}
172 	return (0);
173 }
174 
175 struct ixgbe_osdep {
176 	bus_space_tag_t		mem_bus_space_tag;
177 	bus_space_handle_t	mem_bus_space_handle;
178 	device_t		dev;
179 };
180 
181 /* These routines are needed by the shared code */
182 struct ixgbe_hw;
183 extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
184 #define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
185 
186 extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16);
187 #define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg
188 
189 #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
190 
191 #define IXGBE_READ_REG(a, reg) (\
192    bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
193                      ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
194                      reg))
195 
196 #define IXGBE_WRITE_REG(a, reg, value) (\
197    bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
198                      ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
199                      reg, value))
200 
201 
202 #define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
203    bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
204                      ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
205                      (reg + ((offset) << 2))))
206 
207 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
208       bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
209                       ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
210                       (reg + ((offset) << 2)), value))
211 
212 #endif /* _IXGBE_OS_H_ */
213