1 /****************************************************************************** 2 3 Copyright (c) 2001-2017, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 #include <sys/taskqueue.h> 38 39 #include <net/if.h> 40 #include <net/if_arp.h> 41 #include <net/if_media.h> 42 #include <net/ifq_var.h> 43 44 #include <dev/netif/ix/ixgbe_api.h> 45 #include <dev/netif/ix/if_ix.h> 46 47 u16 48 ixgbe_read_pci_cfg_pf(struct ixgbe_hw *hw, u32 reg) 49 { 50 return pci_read_config(((struct ix_softc *)hw->back)->dev, reg, 2); 51 } 52 53 void 54 ixgbe_write_pci_cfg_pf(struct ixgbe_hw *hw, u32 reg, u16 value) 55 { 56 pci_write_config(((struct ix_softc *)hw->back)->dev, reg, value, 2); 57 } 58 59 u32 60 ixgbe_read_reg_pf(struct ixgbe_hw *hw, u32 reg) 61 { 62 struct ix_softc *sc = (struct ix_softc *)hw->back; 63 u32 retval; 64 u8 i; 65 66 retval = bus_space_read_4(sc->osdep.mem_bus_space_tag, 67 sc->osdep.mem_bus_space_handle, reg); 68 69 /* Normal... */ 70 if ((retval != 0xDEADBEEF) || 71 !(hw->phy.nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) 72 return retval; 73 74 /* Unusual... */ 75 76 /* 77 * 10/100 Mb mode has a quirk where it's possible the previous 78 * write to the Phy hasn't completed. So we keep trying. 79 */ 80 for (i = 100; retval; i--) { 81 if (!i) { 82 device_printf(sc->dev, "Register (0x%08X) writes did not complete: 0x%08X\n", 83 reg, retval); 84 break; 85 } 86 retval = bus_space_read_4(sc->osdep.mem_bus_space_tag, 87 sc->osdep.mem_bus_space_handle, IXGBE_MAC_SGMII_BUSY); 88 } 89 90 for (i = 10; retval == 0xDEADBEEF; i--) { 91 if (!i) { 92 device_printf(sc->dev, 93 "Failed to read register 0x%08X.\n", reg); 94 break; 95 } 96 retval = bus_space_read_4(sc->osdep.mem_bus_space_tag, 97 sc->osdep.mem_bus_space_handle, reg); 98 } 99 100 return retval; 101 } 102 103 void 104 ixgbe_write_reg_pf(struct ixgbe_hw *hw, u32 reg, u32 val) 105 { 106 bus_space_write_4(((struct ix_softc *)hw->back)->osdep.mem_bus_space_tag, 107 ((struct ix_softc *)hw->back)->osdep.mem_bus_space_handle, 108 reg, val); 109 } 110 111 u32 112 ixgbe_read_reg_array_pf(struct ixgbe_hw *hw, u32 reg, u32 offset) 113 { 114 return bus_space_read_4(((struct ix_softc *)hw->back)->osdep.mem_bus_space_tag, 115 ((struct ix_softc *)hw->back)->osdep.mem_bus_space_handle, 116 reg + (offset << 2)); 117 } 118 119 void 120 ixgbe_write_reg_array_pf(struct ixgbe_hw *hw, u32 reg, u32 offset, u32 val) 121 { 122 bus_space_write_4(((struct ix_softc *)hw->back)->osdep.mem_bus_space_tag, 123 ((struct ix_softc *)hw->back)->osdep.mem_bus_space_handle, 124 reg + (offset << 2), val); 125 } 126