xref: /dragonfly/sys/dev/netif/jme/if_jmevar.h (revision 82730a9c)
1 /*-
2  * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice unmodified, this list of conditions, and the following
10  *    disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD: src/sys/dev/jme/if_jmevar.h,v 1.1 2008/05/27 01:42:01 yongari Exp $
28  * $DragonFly: src/sys/dev/netif/jme/if_jmevar.h,v 1.8 2008/11/26 11:55:18 sephe Exp $
29  */
30 
31 #ifndef	_IF_JMEVAR_H
32 #define	_IF_JMEVAR_H
33 
34 #include <sys/queue.h>
35 #include <sys/callout.h>
36 #include <sys/taskqueue.h>
37 
38 /*
39  * JMC250 supports upto JME_NDESC_MAX descriptors and the number of
40  * descriptors should be multiple of JME_NDESC_ALIGN.
41  */
42 #define	JME_TX_DESC_CNT_DEF	512
43 #define	JME_RX_DESC_CNT_DEF	512
44 
45 #define JME_NDESC_ALIGN		16
46 #define JME_NDESC_MAX		1024
47 
48 #define JME_NRXRING_1		1
49 #define JME_NRXRING_2		2
50 #define JME_NRXRING_4		4
51 
52 #define JME_NRXRING_MIN		JME_NRXRING_1
53 #define JME_NRXRING_MAX		JME_NRXRING_4
54 
55 /* RX rings + TX ring + status */
56 #define JME_NSERIALIZE		(JME_NRXRING_MAX + 1 + 1)
57 
58 /* RX rings + TX ring + status */
59 #define JME_MSIXCNT(nrx)	((nrx) + 1 + 1)
60 #define JME_NMSIX		JME_MSIXCNT(JME_NRXRING_MAX)
61 
62 /*
63  * Tx/Rx descriptor queue base should be 16bytes aligned and
64  * should not cross 4G bytes boundary on the 64bits address
65  * mode.
66  */
67 #define	JME_TX_RING_ALIGN	__VM_CACHELINE_SIZE
68 #define	JME_RX_RING_ALIGN	__VM_CACHELINE_SIZE
69 #define	JME_MAXSEGSIZE		4096
70 #define	JME_TSO_MAXSIZE		(IP_MAXPACKET + sizeof(struct ether_vlan_header))
71 #define	JME_MAXTXSEGS		40
72 #define	JME_RX_BUF_ALIGN	sizeof(uint64_t)
73 #define	JME_SSB_ALIGN		__VM_CACHELINE_SIZE
74 
75 #if (BUS_SPACE_MAXADDR != BUS_SPACE_MAXADDR_32BIT)
76 #define JME_RING_BOUNDARY	0x100000000ULL
77 #else
78 #define JME_RING_BOUNDARY	0
79 #endif
80 
81 #define	JME_ADDR_LO(x)		((uint64_t) (x) & 0xFFFFFFFF)
82 #define	JME_ADDR_HI(x)		((uint64_t) (x) >> 32)
83 
84 /* Water mark to kick reclaiming Tx buffers. */
85 #define	JME_TX_DESC_HIWAT(tdata)	\
86 	((tdata)->jme_tx_desc_cnt - (((tdata)->jme_tx_desc_cnt * 3) / 10))
87 
88 /*
89  * JMC250 can send 9K jumbo frame on Tx path and can receive
90  * 65535 bytes.
91  */
92 #define JME_JUMBO_FRAMELEN	9216
93 #define JME_JUMBO_MTU							\
94 	(JME_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) -	\
95 	 ETHER_HDR_LEN - ETHER_CRC_LEN)
96 #define	JME_MAX_MTU							\
97 	(ETHER_MAX_LEN + sizeof(struct ether_vlan_header) -		\
98 	 ETHER_HDR_LEN - ETHER_CRC_LEN)
99 /*
100  * JMC250 can't handle Tx checksum offload/TSO if frame length
101  * is larger than its FIFO size(2K). It's also good idea to not
102  * use jumbo frame if hardware is running at half-duplex media.
103  * Because the jumbo frame may not fit into the Tx FIFO,
104  * collisions make hardware fetch frame from host memory with
105  * DMA again which in turn slows down Tx performance
106  * significantly.
107  */
108 #define	JME_TX_FIFO_SIZE	2000
109 /*
110  * JMC250 has just 4K Rx FIFO. To support jumbo frame that is
111  * larger than 4K bytes in length, Rx FIFO threshold should be
112  * adjusted to minimize Rx FIFO overrun.
113  */
114 #define	JME_RX_FIFO_SIZE	4000
115 
116 #define	JME_DESC_INC(x, y)	((x) = ((x) + 1) % (y))
117 #define JME_DESC_ADD(x, d, y)	((x) = ((x) + (d)) % (y))
118 
119 struct jme_txdesc {
120 	struct mbuf		*tx_m;
121 	bus_dmamap_t		tx_dmamap;
122 	int			tx_ndesc;
123 	struct jme_desc		*tx_desc;
124 };
125 
126 struct jme_rxdesc {
127 	struct mbuf 		*rx_m;
128 	bus_addr_t		rx_paddr;
129 	bus_dmamap_t		rx_dmamap;
130 	struct jme_desc		*rx_desc;
131 };
132 
133 struct jme_softc;
134 
135 /*
136  * RX ring/descs
137  */
138 struct jme_rxdata {
139 	struct lwkt_serialize	jme_rx_serialize;
140 	struct jme_softc	*jme_sc;
141 
142 	uint32_t		jme_rx_coal;
143 	uint32_t		jme_rx_comp;
144 	uint32_t		jme_rx_empty;
145 	int			jme_rx_idx;
146 
147 	bus_dma_tag_t		jme_rx_tag;	/* RX mbuf tag */
148 	bus_dmamap_t		jme_rx_sparemap;
149 	struct jme_rxdesc	*jme_rxdesc;
150 
151 	struct jme_desc		*jme_rx_ring;
152 	int			jme_rx_cons;
153 	int			jme_rx_desc_cnt;
154 
155 	int			jme_rxlen;
156 	struct mbuf		*jme_rxhead;
157 	struct mbuf		*jme_rxtail;
158 
159 	u_long			jme_rx_pkt;
160 	u_long			jme_rx_emp;
161 
162 	bus_addr_t		jme_rx_ring_paddr;
163 	bus_dma_tag_t		jme_rx_ring_tag;
164 	bus_dmamap_t		jme_rx_ring_map;
165 } __cachealign;
166 
167 struct jme_txdata {
168 	struct lwkt_serialize	jme_tx_serialize;
169 	struct jme_softc	*jme_sc;
170 
171 	bus_dma_tag_t		jme_tx_tag;	/* TX mbuf tag */
172 	struct jme_txdesc	*jme_txdesc;
173 
174 	struct jme_desc		*jme_tx_ring;
175 
176 	int			jme_tx_wreg;
177 	int			jme_tx_prod;
178 	int			jme_tx_cons;
179 	int			jme_tx_cnt;
180 	int			jme_tx_desc_cnt;
181 
182 	bus_addr_t		jme_tx_ring_paddr;
183 	bus_dma_tag_t		jme_tx_ring_tag;
184 	bus_dmamap_t		jme_tx_ring_map;
185 } __cachealign;
186 
187 struct jme_chain_data {
188 	/*
189 	 * TX ring
190 	 */
191 	struct jme_txdata	jme_tx_data;
192 
193 	/*
194 	 * RX rings
195 	 */
196 	int			jme_rx_ring_cnt;
197 	struct jme_rxdata	jme_rx_data[JME_NRXRING_MAX];
198 
199 	/*
200 	 * Top level tags
201 	 */
202 	bus_dma_tag_t		jme_ring_tag;	/* parent ring tag */
203 	bus_dma_tag_t		jme_buffer_tag;	/* parent mbuf/ssb tag */
204 
205 	/*
206 	 * Shadow status block (unused)
207 	 */
208 	struct jme_ssb		*jme_ssb_block;
209 	bus_addr_t		jme_ssb_block_paddr;
210 	bus_dma_tag_t		jme_ssb_tag;
211 	bus_dmamap_t		jme_ssb_map;
212 } __cachealign;
213 
214 struct jme_msix_data {
215 	int			jme_msix_rid;
216 	int			jme_msix_cpuid;
217 	u_int			jme_msix_vector;
218 	uint32_t		jme_msix_intrs;
219 	struct resource		*jme_msix_res;
220 	void			*jme_msix_handle;
221 	struct lwkt_serialize	*jme_msix_serialize;
222 	char			jme_msix_desc[64];
223 
224 	driver_intr_t		*jme_msix_func;
225 	void			*jme_msix_arg;
226 };
227 
228 #define JME_TX_RING_SIZE(tdata)	\
229     (sizeof(struct jme_desc) * (tdata)->jme_tx_desc_cnt)
230 #define JME_RX_RING_SIZE(rdata)	\
231     (sizeof(struct jme_desc) * (rdata)->jme_rx_desc_cnt)
232 #define	JME_SSB_SIZE		sizeof(struct jme_ssb)
233 
234 /*
235  * Software state per device.
236  */
237 struct jme_softc {
238 	struct arpcom		arpcom;
239 	device_t		jme_dev;
240 
241 	int			jme_mem_rid;
242 	struct resource		*jme_mem_res;
243 	bus_space_tag_t		jme_mem_bt;
244 	bus_space_handle_t	jme_mem_bh;
245 
246 	int			jme_irq_type;
247 	int			jme_irq_rid;
248 	struct resource		*jme_irq_res;
249 	void			*jme_irq_handle;
250 	struct jme_msix_data	jme_msix[JME_NMSIX];
251 	int			jme_msix_cnt;
252 	uint32_t		jme_msinum[JME_MSINUM_CNT];
253 	int			jme_tx_cpuid;
254 
255 	int			jme_npoll_rxoff;
256 	int			jme_npoll_txoff;
257 
258 	device_t		jme_miibus;
259 	int			jme_phyaddr;
260 	bus_addr_t		jme_lowaddr;
261 
262 	uint32_t		jme_clksrc;
263 	uint32_t		jme_clksrc_1000;
264 	uint16_t		jme_phycom0;
265 	uint16_t		jme_phycom1;
266 	uint32_t		jme_tx_dma_size;
267 	uint32_t		jme_rx_dma_size;
268 
269 	uint32_t		jme_caps;
270 #define	JME_CAP_FPGA		0x0001
271 #define	JME_CAP_PCIE		0x0002
272 #define	JME_CAP_PMCAP		0x0004
273 #define	JME_CAP_FASTETH		0x0008
274 #define	JME_CAP_JUMBO		0x0010
275 #define JME_CAP_PHYPWR		0x0020
276 
277 	uint32_t		jme_workaround;
278 #define JME_WA_EXTFIFO		0x0001
279 #define JME_WA_HDX		0x0002
280 
281 	boolean_t		jme_has_link;
282 	boolean_t		jme_in_tick;
283 
284 	struct lwkt_serialize	jme_serialize;
285 	struct lwkt_serialize	*jme_serialize_arr[JME_NSERIALIZE];
286 	int			jme_serialize_cnt;
287 
288 	struct callout		jme_tick_ch;
289 	struct jme_chain_data	jme_cdata;
290 	int			jme_if_flags;
291 	uint32_t		jme_txcsr;
292 	uint32_t		jme_rxcsr;
293 
294 	struct sysctl_ctx_list	jme_sysctl_ctx;
295 	struct sysctl_oid	*jme_sysctl_tree;
296 
297 	/*
298 	 * Sysctl variables
299 	 */
300 	int			jme_tx_coal_to;
301 	int			jme_tx_coal_pkt;
302 	int			jme_rx_coal_to;
303 	int			jme_rx_coal_pkt;
304 	int			jme_rss_debug;
305 };
306 
307 /* Register access macros. */
308 #define CSR_WRITE_4(_sc, reg, val)	\
309 	bus_space_write_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg), (val))
310 #define CSR_READ_4(_sc, reg)		\
311 	bus_space_read_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg))
312 
313 #define	JME_MAXERR	5
314 
315 #define	JME_RXCHAIN_RESET(rdata)	\
316 do {					\
317 	(rdata)->jme_rxhead = NULL;	\
318 	(rdata)->jme_rxtail = NULL;	\
319 	(rdata)->jme_rxlen = 0;		\
320 } while (0)
321 
322 #define	JME_TX_TIMEOUT		5
323 #define JME_TIMEOUT		1000
324 #define JME_PHY_TIMEOUT		1000
325 #define JME_EEPROM_TIMEOUT	1000
326 
327 #define JME_TXD_RSVD		1
328 /* Large enough to cooperate 64K TSO segment and one spare TX descriptor */
329 #define JME_TXD_SPARE		34
330 
331 #define JME_TXWREG_NSEGS	16
332 
333 #define JME_ENABLE_HWRSS(sc)	\
334 	((sc)->jme_cdata.jme_rx_ring_cnt > JME_NRXRING_MIN)
335 
336 #endif
337