1 /*- 2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD: src/sys/dev/jme/if_jmevar.h,v 1.1 2008/05/27 01:42:01 yongari Exp $ 28 * $DragonFly: src/sys/dev/netif/jme/if_jmevar.h,v 1.8 2008/11/26 11:55:18 sephe Exp $ 29 */ 30 31 #ifndef _IF_JMEVAR_H 32 #define _IF_JMEVAR_H 33 34 #include <sys/queue.h> 35 #include <sys/callout.h> 36 #include <sys/taskqueue.h> 37 38 /* 39 * JMC250 supports upto JME_NDESC_MAX descriptors and the number of 40 * descriptors should be multiple of JME_NDESC_ALIGN. 41 */ 42 #define JME_TX_DESC_CNT_DEF 384 43 #define JME_RX_DESC_CNT_DEF 256 44 45 #define JME_NDESC_ALIGN 16 46 #define JME_NDESC_MAX 1024 47 48 #define JME_NRXRING_1 1 49 #define JME_NRXRING_2 2 50 #define JME_NRXRING_4 4 51 52 #define JME_NRXRING_DEF JME_NRXRING_1 53 #define JME_NRXRING_MIN JME_NRXRING_1 54 #define JME_NRXRING_MAX JME_NRXRING_4 55 56 /* 57 * Tx/Rx descriptor queue base should be 16bytes aligned and 58 * should not cross 4G bytes boundary on the 64bits address 59 * mode. 60 */ 61 #define JME_TX_RING_ALIGN 16 62 #define JME_RX_RING_ALIGN 16 63 #define JME_TSO_MAXSEGSIZE 4096 64 #define JME_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header)) 65 #define JME_MAXTXSEGS 32 66 #define JME_RX_BUF_ALIGN sizeof(uint64_t) 67 #define JME_SSB_ALIGN 16 68 69 #define JME_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF) 70 #define JME_ADDR_HI(x) ((uint64_t) (x) >> 32) 71 72 #define JME_MSI_MESSAGES 8 73 #define JME_MSIX_MESSAGES 8 74 75 /* Water mark to kick reclaiming Tx buffers. */ 76 #define JME_TX_DESC_HIWAT(sc) \ 77 ((sc)->jme_tx_desc_cnt - (((sc)->jme_tx_desc_cnt * 3) / 10)) 78 79 /* 80 * JMC250 can send 9K jumbo frame on Tx path and can receive 81 * 65535 bytes. 82 */ 83 #define JME_JUMBO_FRAMELEN 9216 84 #define JME_JUMBO_MTU \ 85 (JME_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) - \ 86 ETHER_HDR_LEN - ETHER_CRC_LEN) 87 #define JME_MAX_MTU \ 88 (ETHER_MAX_LEN + sizeof(struct ether_vlan_header) - \ 89 ETHER_HDR_LEN - ETHER_CRC_LEN) 90 /* 91 * JMC250 can't handle Tx checksum offload/TSO if frame length 92 * is larger than its FIFO size(2K). It's also good idea to not 93 * use jumbo frame if hardware is running at half-duplex media. 94 * Because the jumbo frame may not fit into the Tx FIFO, 95 * collisions make hardware fetch frame from host memory with 96 * DMA again which in turn slows down Tx performance 97 * significantly. 98 */ 99 #define JME_TX_FIFO_SIZE 2000 100 /* 101 * JMC250 has just 4K Rx FIFO. To support jumbo frame that is 102 * larger than 4K bytes in length, Rx FIFO threshold should be 103 * adjusted to minimize Rx FIFO overrun. 104 */ 105 #define JME_RX_FIFO_SIZE 4000 106 107 #define JME_DESC_INC(x, y) ((x) = ((x) + 1) % (y)) 108 109 struct jme_txdesc { 110 struct mbuf *tx_m; 111 bus_dmamap_t tx_dmamap; 112 int tx_ndesc; 113 struct jme_desc *tx_desc; 114 }; 115 116 struct jme_rxdesc { 117 struct mbuf *rx_m; 118 bus_dmamap_t rx_dmamap; 119 struct jme_desc *rx_desc; 120 }; 121 122 /* 123 * RX ring/descs 124 */ 125 struct jme_rxdata { 126 bus_dma_tag_t jme_rx_tag; /* RX mbuf tag */ 127 bus_dmamap_t jme_rx_sparemap; 128 struct jme_rxdesc *jme_rxdesc; 129 130 struct jme_desc *jme_rx_ring; 131 bus_addr_t jme_rx_ring_paddr; 132 bus_dma_tag_t jme_rx_ring_tag; 133 bus_dmamap_t jme_rx_ring_map; 134 135 int jme_rx_cons; 136 137 int jme_rxlen; 138 struct mbuf *jme_rxhead; 139 struct mbuf *jme_rxtail; 140 }; 141 142 struct jme_chain_data { 143 /* 144 * Top level tags 145 */ 146 bus_dma_tag_t jme_ring_tag; /* parent ring tag */ 147 bus_dma_tag_t jme_buffer_tag; /* parent mbuf/ssb tag */ 148 149 /* 150 * Shadow status block 151 */ 152 struct jme_ssb *jme_ssb_block; 153 bus_addr_t jme_ssb_block_paddr; 154 bus_dma_tag_t jme_ssb_tag; 155 bus_dmamap_t jme_ssb_map; 156 157 /* 158 * TX ring/descs 159 */ 160 bus_dma_tag_t jme_tx_tag; /* TX mbuf tag */ 161 struct jme_txdesc *jme_txdesc; 162 163 struct jme_desc *jme_tx_ring; 164 bus_addr_t jme_tx_ring_paddr; 165 bus_dma_tag_t jme_tx_ring_tag; 166 bus_dmamap_t jme_tx_ring_map; 167 168 int jme_tx_prod; 169 int jme_tx_cons; 170 int jme_tx_cnt; 171 172 struct jme_rxdata jme_rx_data[JME_NRXRING_MAX]; 173 }; 174 175 #define JME_TX_RING_SIZE(sc) \ 176 (sizeof(struct jme_desc) * (sc)->jme_tx_desc_cnt) 177 #define JME_RX_RING_SIZE(sc) \ 178 (sizeof(struct jme_desc) * (sc)->jme_rx_desc_cnt) 179 #define JME_SSB_SIZE sizeof(struct jme_ssb) 180 181 struct jme_dmamap_ctx { 182 int nsegs; 183 bus_dma_segment_t *segs; 184 }; 185 186 /* 187 * Software state per device. 188 */ 189 struct jme_softc { 190 struct arpcom arpcom; 191 device_t jme_dev; 192 193 int jme_mem_rid; 194 struct resource *jme_mem_res; 195 bus_space_tag_t jme_mem_bt; 196 bus_space_handle_t jme_mem_bh; 197 198 int jme_irq_rid; 199 struct resource *jme_irq_res; 200 void *jme_irq_handle; 201 202 device_t jme_miibus; 203 int jme_phyaddr; 204 bus_addr_t jme_lowaddr; 205 206 uint32_t jme_clksrc; 207 uint32_t jme_clksrc_1000; 208 uint32_t jme_tx_dma_size; 209 uint32_t jme_rx_dma_size; 210 211 uint32_t jme_caps; 212 #define JME_CAP_FPGA 0x0001 213 #define JME_CAP_PCIE 0x0002 214 #define JME_CAP_PMCAP 0x0004 215 #define JME_CAP_FASTETH 0x0008 216 #define JME_CAP_JUMBO 0x0010 217 #define JME_CAP_RSS 0x0020 218 219 uint32_t jme_workaround; 220 #define JME_WA_EXTFIFO 0x0001 221 #define JME_WA_HDX 0x0002 222 223 uint32_t jme_flags; 224 #define JME_FLAG_MSI 0x0001 225 #define JME_FLAG_MSIX 0x0002 226 #define JME_FLAG_DETACH 0x0004 227 #define JME_FLAG_LINK 0x0008 228 #define JME_FLAG_RSS 0x0010 229 230 struct callout jme_tick_ch; 231 struct jme_chain_data jme_cdata; 232 int jme_if_flags; 233 uint32_t jme_txcsr; 234 uint32_t jme_rxcsr; 235 236 int jme_txd_spare; 237 238 struct sysctl_ctx_list jme_sysctl_ctx; 239 struct sysctl_oid *jme_sysctl_tree; 240 241 /* 242 * Sysctl variables 243 */ 244 int jme_tx_coal_to; 245 int jme_tx_coal_pkt; 246 int jme_rx_coal_to; 247 int jme_rx_coal_pkt; 248 int jme_rx_desc_cnt; 249 int jme_tx_desc_cnt; 250 int jme_rx_ring_cnt; 251 int jme_rx_ring_inuse; 252 int jme_rss_debug; 253 u_int jme_rx_ring_pkt[JME_NRXRING_MAX]; 254 }; 255 256 /* Register access macros. */ 257 #define CSR_WRITE_4(_sc, reg, val) \ 258 bus_space_write_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg), (val)) 259 #define CSR_READ_4(_sc, reg) \ 260 bus_space_read_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg)) 261 262 #define JME_MAXERR 5 263 264 #define JME_RXCHAIN_RESET(sc, ring) \ 265 do { \ 266 (sc)->jme_cdata.jme_rx_data[(ring)].jme_rxhead = NULL; \ 267 (sc)->jme_cdata.jme_rx_data[(ring)].jme_rxtail = NULL; \ 268 (sc)->jme_cdata.jme_rx_data[(ring)].jme_rxlen = 0; \ 269 } while (0) 270 271 #define JME_TX_TIMEOUT 5 272 #define JME_TIMEOUT 1000 273 #define JME_PHY_TIMEOUT 1000 274 #define JME_EEPROM_TIMEOUT 1000 275 276 #define JME_TXD_RSVD 1 277 278 #endif 279