1 /*- 2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD: src/sys/dev/jme/if_jmevar.h,v 1.1 2008/05/27 01:42:01 yongari Exp $ 28 * $DragonFly: src/sys/dev/netif/jme/if_jmevar.h,v 1.8 2008/11/26 11:55:18 sephe Exp $ 29 */ 30 31 #ifndef _IF_JMEVAR_H 32 #define _IF_JMEVAR_H 33 34 #include <sys/queue.h> 35 #include <sys/callout.h> 36 #include <sys/taskqueue.h> 37 38 /* 39 * JMC250 supports upto JME_NDESC_MAX descriptors and the number of 40 * descriptors should be multiple of JME_NDESC_ALIGN. 41 */ 42 #define JME_TX_DESC_CNT_DEF 384 43 #define JME_RX_DESC_CNT_DEF 256 44 45 #define JME_NDESC_ALIGN 16 46 #define JME_NDESC_MAX 1024 47 48 #define JME_NRXRING_1 1 49 #define JME_NRXRING_2 2 50 #define JME_NRXRING_4 4 51 52 #define JME_NRXRING_DEF JME_NRXRING_1 53 #define JME_NRXRING_MIN JME_NRXRING_1 54 #define JME_NRXRING_MAX JME_NRXRING_4 55 56 /* 57 * Tx/Rx descriptor queue base should be 16bytes aligned and 58 * should not cross 4G bytes boundary on the 64bits address 59 * mode. 60 */ 61 #define JME_TX_RING_ALIGN 16 62 #define JME_RX_RING_ALIGN 16 63 #define JME_MAXSEGSIZE 4096 64 #define JME_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header)) 65 #define JME_MAXTXSEGS 32 66 #define JME_RX_BUF_ALIGN sizeof(uint64_t) 67 #define JME_SSB_ALIGN 16 68 69 #if (BUS_SPACE_MAXADDR != BUS_SPACE_MAXADDR_32BIT) 70 #define JME_RING_BOUNDARY 0x100000000ULL 71 #else 72 #define JME_RING_BOUNDARY 0 73 #endif 74 75 #define JME_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF) 76 #define JME_ADDR_HI(x) ((uint64_t) (x) >> 32) 77 78 #define JME_MSI_MESSAGES 8 79 #define JME_MSIX_MESSAGES 8 80 81 /* Water mark to kick reclaiming Tx buffers. */ 82 #define JME_TX_DESC_HIWAT(sc) \ 83 ((sc)->jme_tx_desc_cnt - (((sc)->jme_tx_desc_cnt * 3) / 10)) 84 85 /* 86 * JMC250 can send 9K jumbo frame on Tx path and can receive 87 * 65535 bytes. 88 */ 89 #define JME_JUMBO_FRAMELEN 9216 90 #define JME_JUMBO_MTU \ 91 (JME_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) - \ 92 ETHER_HDR_LEN - ETHER_CRC_LEN) 93 #define JME_MAX_MTU \ 94 (ETHER_MAX_LEN + sizeof(struct ether_vlan_header) - \ 95 ETHER_HDR_LEN - ETHER_CRC_LEN) 96 /* 97 * JMC250 can't handle Tx checksum offload/TSO if frame length 98 * is larger than its FIFO size(2K). It's also good idea to not 99 * use jumbo frame if hardware is running at half-duplex media. 100 * Because the jumbo frame may not fit into the Tx FIFO, 101 * collisions make hardware fetch frame from host memory with 102 * DMA again which in turn slows down Tx performance 103 * significantly. 104 */ 105 #define JME_TX_FIFO_SIZE 2000 106 /* 107 * JMC250 has just 4K Rx FIFO. To support jumbo frame that is 108 * larger than 4K bytes in length, Rx FIFO threshold should be 109 * adjusted to minimize Rx FIFO overrun. 110 */ 111 #define JME_RX_FIFO_SIZE 4000 112 113 #define JME_DESC_INC(x, y) ((x) = ((x) + 1) % (y)) 114 115 struct jme_txdesc { 116 struct mbuf *tx_m; 117 bus_dmamap_t tx_dmamap; 118 int tx_ndesc; 119 struct jme_desc *tx_desc; 120 }; 121 122 struct jme_rxdesc { 123 struct mbuf *rx_m; 124 bus_dmamap_t rx_dmamap; 125 struct jme_desc *rx_desc; 126 }; 127 128 /* 129 * RX ring/descs 130 */ 131 struct jme_rxdata { 132 bus_dma_tag_t jme_rx_tag; /* RX mbuf tag */ 133 bus_dmamap_t jme_rx_sparemap; 134 struct jme_rxdesc *jme_rxdesc; 135 136 struct jme_desc *jme_rx_ring; 137 bus_addr_t jme_rx_ring_paddr; 138 bus_dma_tag_t jme_rx_ring_tag; 139 bus_dmamap_t jme_rx_ring_map; 140 141 int jme_rx_cons; 142 143 int jme_rxlen; 144 struct mbuf *jme_rxhead; 145 struct mbuf *jme_rxtail; 146 }; 147 148 struct jme_chain_data { 149 /* 150 * Top level tags 151 */ 152 bus_dma_tag_t jme_ring_tag; /* parent ring tag */ 153 bus_dma_tag_t jme_buffer_tag; /* parent mbuf/ssb tag */ 154 155 /* 156 * Shadow status block 157 */ 158 struct jme_ssb *jme_ssb_block; 159 bus_addr_t jme_ssb_block_paddr; 160 bus_dma_tag_t jme_ssb_tag; 161 bus_dmamap_t jme_ssb_map; 162 163 /* 164 * TX ring/descs 165 */ 166 bus_dma_tag_t jme_tx_tag; /* TX mbuf tag */ 167 struct jme_txdesc *jme_txdesc; 168 169 struct jme_desc *jme_tx_ring; 170 bus_addr_t jme_tx_ring_paddr; 171 bus_dma_tag_t jme_tx_ring_tag; 172 bus_dmamap_t jme_tx_ring_map; 173 174 int jme_tx_prod; 175 int jme_tx_cons; 176 int jme_tx_cnt; 177 178 struct jme_rxdata jme_rx_data[JME_NRXRING_MAX]; 179 }; 180 181 #define JME_TX_RING_SIZE(sc) \ 182 (sizeof(struct jme_desc) * (sc)->jme_tx_desc_cnt) 183 #define JME_RX_RING_SIZE(sc) \ 184 (sizeof(struct jme_desc) * (sc)->jme_rx_desc_cnt) 185 #define JME_SSB_SIZE sizeof(struct jme_ssb) 186 187 /* 188 * Software state per device. 189 */ 190 struct jme_softc { 191 struct arpcom arpcom; 192 device_t jme_dev; 193 194 int jme_mem_rid; 195 struct resource *jme_mem_res; 196 bus_space_tag_t jme_mem_bt; 197 bus_space_handle_t jme_mem_bh; 198 199 int jme_irq_rid; 200 struct resource *jme_irq_res; 201 void *jme_irq_handle; 202 203 device_t jme_miibus; 204 int jme_phyaddr; 205 bus_addr_t jme_lowaddr; 206 207 uint32_t jme_clksrc; 208 uint32_t jme_clksrc_1000; 209 uint32_t jme_tx_dma_size; 210 uint32_t jme_rx_dma_size; 211 212 uint32_t jme_caps; 213 #define JME_CAP_FPGA 0x0001 214 #define JME_CAP_PCIE 0x0002 215 #define JME_CAP_PMCAP 0x0004 216 #define JME_CAP_FASTETH 0x0008 217 #define JME_CAP_JUMBO 0x0010 218 219 uint32_t jme_workaround; 220 #define JME_WA_EXTFIFO 0x0001 221 #define JME_WA_HDX 0x0002 222 223 uint32_t jme_flags; 224 #define JME_FLAG_MSI 0x0001 225 #define JME_FLAG_MSIX 0x0002 226 #define JME_FLAG_DETACH 0x0004 227 #define JME_FLAG_LINK 0x0008 228 229 struct callout jme_tick_ch; 230 struct jme_chain_data jme_cdata; 231 int jme_if_flags; 232 uint32_t jme_txcsr; 233 uint32_t jme_rxcsr; 234 235 int jme_txd_spare; 236 237 struct sysctl_ctx_list jme_sysctl_ctx; 238 struct sysctl_oid *jme_sysctl_tree; 239 240 /* 241 * Sysctl variables 242 */ 243 int jme_tx_coal_to; 244 int jme_tx_coal_pkt; 245 int jme_rx_coal_to; 246 int jme_rx_coal_pkt; 247 int jme_rx_desc_cnt; 248 int jme_tx_desc_cnt; 249 int jme_rx_ring_cnt; 250 int jme_rx_ring_inuse; 251 int jme_rss_debug; 252 u_int jme_rx_ring_pkt[JME_NRXRING_MAX]; 253 }; 254 255 /* Register access macros. */ 256 #define CSR_WRITE_4(_sc, reg, val) \ 257 bus_space_write_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg), (val)) 258 #define CSR_READ_4(_sc, reg) \ 259 bus_space_read_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg)) 260 261 #define JME_MAXERR 5 262 263 #define JME_RXCHAIN_RESET(sc, ring) \ 264 do { \ 265 (sc)->jme_cdata.jme_rx_data[(ring)].jme_rxhead = NULL; \ 266 (sc)->jme_cdata.jme_rx_data[(ring)].jme_rxtail = NULL; \ 267 (sc)->jme_cdata.jme_rx_data[(ring)].jme_rxlen = 0; \ 268 } while (0) 269 270 #define JME_TX_TIMEOUT 5 271 #define JME_TIMEOUT 1000 272 #define JME_PHY_TIMEOUT 1000 273 #define JME_EEPROM_TIMEOUT 1000 274 275 #define JME_TXD_RSVD 1 276 277 #endif 278