xref: /dragonfly/sys/dev/netif/jme/if_jmevar.h (revision e6e77800)
1 /*-
2  * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice unmodified, this list of conditions, and the following
10  *    disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD: src/sys/dev/jme/if_jmevar.h,v 1.1 2008/05/27 01:42:01 yongari Exp $
28  */
29 
30 #ifndef	_IF_JMEVAR_H
31 #define	_IF_JMEVAR_H
32 
33 #include <sys/queue.h>
34 #include <sys/callout.h>
35 #include <sys/taskqueue.h>
36 
37 /*
38  * JMC250 supports upto JME_NDESC_MAX descriptors and the number of
39  * descriptors should be multiple of JME_NDESC_ALIGN.
40  */
41 #define	JME_TX_DESC_CNT_DEF	512
42 #define	JME_RX_DESC_CNT_DEF	512
43 
44 #define JME_NDESC_ALIGN		16
45 #define JME_NDESC_MAX		1024
46 
47 #define JME_NRXRING_1		1
48 #define JME_NRXRING_2		2
49 #define JME_NRXRING_4		4
50 
51 #define JME_NRXRING_MIN		JME_NRXRING_1
52 #define JME_NRXRING_MAX		JME_NRXRING_4
53 
54 /* RX rings + TX ring + status */
55 #define JME_NSERIALIZE		(JME_NRXRING_MAX + 1 + 1)
56 
57 /* RX rings + TX ring + status */
58 #define JME_MSIXCNT(nrx)	((nrx) + 1 + 1)
59 #define JME_NMSIX		JME_MSIXCNT(JME_NRXRING_MAX)
60 
61 /*
62  * Tx/Rx descriptor queue base should be 16bytes aligned and
63  * should not cross 4G bytes boundary on the 64bits address
64  * mode.
65  */
66 #define	JME_TX_RING_ALIGN	__VM_CACHELINE_SIZE
67 #define	JME_RX_RING_ALIGN	__VM_CACHELINE_SIZE
68 #define	JME_MAXSEGSIZE		4096
69 #define	JME_TSO_MAXSIZE		(IP_MAXPACKET + sizeof(struct ether_vlan_header))
70 #define	JME_MAXTXSEGS		40
71 #define	JME_RX_BUF_ALIGN	sizeof(uint64_t)
72 #define	JME_SSB_ALIGN		__VM_CACHELINE_SIZE
73 
74 #if (BUS_SPACE_MAXADDR != BUS_SPACE_MAXADDR_32BIT)
75 #define JME_RING_BOUNDARY	0x100000000ULL
76 #else
77 #define JME_RING_BOUNDARY	0
78 #endif
79 
80 #define	JME_ADDR_LO(x)		((uint64_t) (x) & 0xFFFFFFFF)
81 #define	JME_ADDR_HI(x)		((uint64_t) (x) >> 32)
82 
83 /* Water mark to kick reclaiming Tx buffers. */
84 #define	JME_TX_DESC_HIWAT(tdata)	\
85 	((tdata)->jme_tx_desc_cnt - (((tdata)->jme_tx_desc_cnt * 3) / 10))
86 
87 /*
88  * JMC250 can send 9K jumbo frame on Tx path and can receive
89  * 65535 bytes.
90  */
91 #define JME_JUMBO_FRAMELEN	9216
92 #define JME_JUMBO_MTU							\
93 	(JME_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) -	\
94 	 ETHER_HDR_LEN - ETHER_CRC_LEN)
95 #define	JME_MAX_MTU							\
96 	(ETHER_MAX_LEN + sizeof(struct ether_vlan_header) -		\
97 	 ETHER_HDR_LEN - ETHER_CRC_LEN)
98 /*
99  * JMC250 can't handle Tx checksum offload/TSO if frame length
100  * is larger than its FIFO size(2K). It's also good idea to not
101  * use jumbo frame if hardware is running at half-duplex media.
102  * Because the jumbo frame may not fit into the Tx FIFO,
103  * collisions make hardware fetch frame from host memory with
104  * DMA again which in turn slows down Tx performance
105  * significantly.
106  */
107 #define	JME_TX_FIFO_SIZE	2000
108 /*
109  * JMC250 has just 4K Rx FIFO. To support jumbo frame that is
110  * larger than 4K bytes in length, Rx FIFO threshold should be
111  * adjusted to minimize Rx FIFO overrun.
112  */
113 #define	JME_RX_FIFO_SIZE	4000
114 
115 #define	JME_DESC_INC(x, y)	((x) = ((x) + 1) % (y))
116 #define JME_DESC_ADD(x, d, y)	((x) = ((x) + (d)) % (y))
117 
118 struct jme_txdesc {
119 	struct mbuf		*tx_m;
120 	bus_dmamap_t		tx_dmamap;
121 	int			tx_ndesc;
122 	struct jme_desc		*tx_desc;
123 };
124 
125 struct jme_rxdesc {
126 	struct mbuf 		*rx_m;
127 	bus_addr_t		rx_paddr;
128 	bus_dmamap_t		rx_dmamap;
129 	struct jme_desc		*rx_desc;
130 };
131 
132 struct jme_softc;
133 
134 /*
135  * RX ring/descs
136  */
137 struct jme_rxdata {
138 	struct lwkt_serialize	jme_rx_serialize;
139 	struct jme_softc	*jme_sc;
140 
141 	uint32_t		jme_rx_coal;
142 	uint32_t		jme_rx_comp;
143 	uint32_t		jme_rx_empty;
144 	int			jme_rx_idx;
145 
146 	bus_dma_tag_t		jme_rx_tag;	/* RX mbuf tag */
147 	bus_dmamap_t		jme_rx_sparemap;
148 	struct jme_rxdesc	*jme_rxdesc;
149 
150 	struct jme_desc		*jme_rx_ring;
151 	int			jme_rx_cons;
152 	int			jme_rx_desc_cnt;
153 
154 	int			jme_rxlen;
155 	struct mbuf		*jme_rxhead;
156 	struct mbuf		*jme_rxtail;
157 
158 	u_long			jme_rx_pkt;
159 	u_long			jme_rx_emp;
160 
161 	bus_addr_t		jme_rx_ring_paddr;
162 	bus_dma_tag_t		jme_rx_ring_tag;
163 	bus_dmamap_t		jme_rx_ring_map;
164 } __cachealign;
165 
166 struct jme_txdata {
167 	struct lwkt_serialize	jme_tx_serialize;
168 	struct jme_softc	*jme_sc;
169 
170 	bus_dma_tag_t		jme_tx_tag;	/* TX mbuf tag */
171 	struct jme_txdesc	*jme_txdesc;
172 
173 	struct jme_desc		*jme_tx_ring;
174 
175 	int			jme_tx_wreg;
176 	int			jme_tx_prod;
177 	int			jme_tx_cons;
178 	int			jme_tx_cnt;
179 	int			jme_tx_desc_cnt;
180 
181 	bus_addr_t		jme_tx_ring_paddr;
182 	bus_dma_tag_t		jme_tx_ring_tag;
183 	bus_dmamap_t		jme_tx_ring_map;
184 } __cachealign;
185 
186 struct jme_chain_data {
187 	/*
188 	 * TX ring
189 	 */
190 	struct jme_txdata	jme_tx_data;
191 
192 	/*
193 	 * RX rings
194 	 */
195 	int			jme_rx_ring_cnt;
196 	struct jme_rxdata	jme_rx_data[JME_NRXRING_MAX];
197 
198 	/*
199 	 * Top level tags
200 	 */
201 	bus_dma_tag_t		jme_ring_tag;	/* parent ring tag */
202 	bus_dma_tag_t		jme_buffer_tag;	/* parent mbuf/ssb tag */
203 
204 	/*
205 	 * Shadow status block (unused)
206 	 */
207 	struct jme_ssb		*jme_ssb_block;
208 	bus_addr_t		jme_ssb_block_paddr;
209 	bus_dma_tag_t		jme_ssb_tag;
210 	bus_dmamap_t		jme_ssb_map;
211 } __cachealign;
212 
213 struct jme_msix_data {
214 	int			jme_msix_rid;
215 	int			jme_msix_cpuid;
216 	u_int			jme_msix_vector;
217 	uint32_t		jme_msix_intrs;
218 	struct resource		*jme_msix_res;
219 	void			*jme_msix_handle;
220 	struct lwkt_serialize	*jme_msix_serialize;
221 	char			jme_msix_desc[64];
222 
223 	driver_intr_t		*jme_msix_func;
224 	void			*jme_msix_arg;
225 };
226 
227 #define JME_TX_RING_SIZE(tdata)	\
228     (sizeof(struct jme_desc) * (tdata)->jme_tx_desc_cnt)
229 #define JME_RX_RING_SIZE(rdata)	\
230     (sizeof(struct jme_desc) * (rdata)->jme_rx_desc_cnt)
231 #define	JME_SSB_SIZE		sizeof(struct jme_ssb)
232 
233 #define JME_RDRTABLE_SIZE	(RSSTBL_REGSIZE * RSSTBL_NREGS)
234 
235 /*
236  * Software state per device.
237  */
238 struct jme_softc {
239 	struct arpcom		arpcom;
240 	device_t		jme_dev;
241 
242 	int			jme_mem_rid;
243 	struct resource		*jme_mem_res;
244 	bus_space_tag_t		jme_mem_bt;
245 	bus_space_handle_t	jme_mem_bh;
246 
247 	int			jme_irq_type;
248 	int			jme_irq_rid;
249 	struct resource		*jme_irq_res;
250 	void			*jme_irq_handle;
251 	struct jme_msix_data	jme_msix[JME_NMSIX];
252 	int			jme_msix_cnt;
253 	uint32_t		jme_msinum[JME_MSINUM_CNT];
254 	int			jme_tx_cpuid;
255 	struct if_ringmap	*jme_rx_rmap;
256 	struct if_ringmap	*jme_tx_rmap;
257 
258 
259 	device_t		jme_miibus;
260 	int			jme_phyaddr;
261 	bus_addr_t		jme_lowaddr;
262 
263 	uint32_t		jme_clksrc;
264 	uint32_t		jme_clksrc_1000;
265 	uint16_t		jme_phycom0;
266 	uint16_t		jme_phycom1;
267 	uint32_t		jme_tx_dma_size;
268 	uint32_t		jme_rx_dma_size;
269 
270 	uint32_t		jme_caps;
271 #define	JME_CAP_FPGA		0x0001
272 #define	JME_CAP_PCIE		0x0002
273 #define	JME_CAP_PMCAP		0x0004
274 #define	JME_CAP_FASTETH		0x0008
275 #define	JME_CAP_JUMBO		0x0010
276 #define JME_CAP_PHYPWR		0x0020
277 
278 	uint32_t		jme_workaround;
279 #define JME_WA_EXTFIFO		0x0001
280 #define JME_WA_HDX		0x0002
281 
282 	boolean_t		jme_has_link;
283 	boolean_t		jme_in_tick;
284 
285 	struct lwkt_serialize	jme_serialize;
286 	struct lwkt_serialize	*jme_serialize_arr[JME_NSERIALIZE];
287 	int			jme_serialize_cnt;
288 
289 	struct callout		jme_tick_ch;
290 	struct jme_chain_data	jme_cdata;
291 	int			jme_if_flags;
292 	uint32_t		jme_txcsr;
293 	uint32_t		jme_rxcsr;
294 
295 	int			jme_rdrtable[JME_RDRTABLE_SIZE];
296 
297 	/*
298 	 * Sysctl variables
299 	 */
300 	int			jme_tx_coal_to;
301 	int			jme_tx_coal_pkt;
302 	int			jme_rx_coal_to;
303 	int			jme_rx_coal_pkt;
304 	int			jme_rss_debug;
305 };
306 
307 /* Register access macros. */
308 #define CSR_WRITE_4(_sc, reg, val)	\
309 	bus_space_write_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg), (val))
310 #define CSR_READ_4(_sc, reg)		\
311 	bus_space_read_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg))
312 
313 #define	JME_MAXERR	5
314 
315 #define	JME_RXCHAIN_RESET(rdata)	\
316 do {					\
317 	(rdata)->jme_rxhead = NULL;	\
318 	(rdata)->jme_rxtail = NULL;	\
319 	(rdata)->jme_rxlen = 0;		\
320 } while (0)
321 
322 #define	JME_TX_TIMEOUT		5
323 #define JME_TIMEOUT		1000
324 #define JME_PHY_TIMEOUT		1000
325 #define JME_EEPROM_TIMEOUT	1000
326 
327 #define JME_TXD_RSVD		1
328 /* Large enough to cooperate 64K TSO segment and one spare TX descriptor */
329 #define JME_TXD_SPARE		34
330 
331 #define JME_TXWREG_NSEGS	16
332 
333 #define JME_ENABLE_HWRSS(sc)	\
334 	((sc)->jme_cdata.jme_rx_ring_cnt > JME_NRXRING_MIN)
335 
336 #endif
337