1 /* $OpenBSD: ciphy.c,v 1.13 2006/03/10 09:53:16 jsg Exp $ */ 2 3 /* 4 * Copyright (c) 2004 5 * Bill Paul <wpaul@windriver.com>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: src/sys/dev/mii/ciphy.c,v 1.3 2005/09/30 19:39:27 imp Exp $ 35 * $DragonFly: src/sys/dev/netif/mii_layer/ciphy.c,v 1.2 2006/08/06 10:32:23 sephe Exp $ 36 */ 37 38 /* 39 * Driver for the Cicada CS8201 10/100/1000 copper PHY. 40 */ 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/module.h> 46 #include <sys/socket.h> 47 #include <sys/bus.h> 48 49 #include <machine/bus.h> 50 51 #include <net/if.h> 52 #include <net/if_arp.h> 53 #include <net/if_media.h> 54 55 #include <dev/netif/mii_layer/mii.h> 56 #include <dev/netif/mii_layer/miivar.h> 57 58 #include "miidevs.h" 59 #include "miibus_if.h" 60 61 #include <dev/netif/mii_layer/ciphyreg.h> 62 63 static int ciphy_probe(device_t); 64 static int ciphy_attach(device_t); 65 66 static device_method_t ciphy_methods[] = { 67 /* device interface */ 68 DEVMETHOD(device_probe, ciphy_probe), 69 DEVMETHOD(device_attach, ciphy_attach), 70 DEVMETHOD(device_detach, ukphy_detach), 71 DEVMETHOD(device_shutdown, bus_generic_shutdown), 72 { 0, 0 } 73 }; 74 75 static const struct mii_phydesc ciphys[] = { 76 MII_PHYDESC(CICADA, CS8201), 77 MII_PHYDESC(CICADA, CS8201A), 78 MII_PHYDESC(CICADA, CS8201B), 79 MII_PHYDESC(xxCICADA, CS8201), 80 MII_PHYDESC(xxCICADA, CS8201A), 81 MII_PHYDESC(xxCICADA, CS8201B), 82 MII_PHYDESC_NULL 83 }; 84 85 static devclass_t ciphy_devclass; 86 87 static driver_t ciphy_driver = { 88 "ciphy", 89 ciphy_methods, 90 sizeof(struct mii_softc) 91 }; 92 93 DRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0); 94 95 static int ciphy_service(struct mii_softc *, struct mii_data *, int); 96 static void ciphy_status(struct mii_softc *); 97 static void ciphy_reset(struct mii_softc *); 98 static void ciphy_fixup(struct mii_softc *); 99 100 static int 101 ciphy_probe(device_t dev) 102 { 103 struct mii_attach_args *ma = device_get_ivars(dev); 104 const struct mii_phydesc *mpd; 105 106 mpd = mii_phy_match(ma, ciphys); 107 if (mpd != NULL) { 108 device_set_desc(dev, mpd->mpd_name); 109 return (0); 110 } 111 return (ENXIO); 112 } 113 114 static int 115 ciphy_attach(device_t dev) 116 { 117 struct mii_softc *sc; 118 struct mii_attach_args *ma; 119 struct mii_data *mii; 120 121 sc = device_get_softc(dev); 122 ma = device_get_ivars(dev); 123 mii_softc_init(sc, ma); 124 125 sc->mii_dev = device_get_parent(dev); 126 mii = device_get_softc(sc->mii_dev); 127 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 128 129 sc->mii_inst = mii->mii_instance; 130 sc->mii_service = ciphy_service; 131 sc->mii_reset = ciphy_reset; 132 sc->mii_pdata = mii; 133 134 sc->mii_flags |= MIIF_NOISOLATE; 135 mii->mii_instance++; 136 137 ciphy_reset(sc); 138 139 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 140 if (sc->mii_capabilities & BMSR_EXTSTAT) 141 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 142 143 device_printf(dev, " "); 144 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 && 145 (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0) 146 printf("no media present"); 147 else 148 mii_phy_add_media(sc); 149 printf("\n"); 150 151 MIIBUS_MEDIAINIT(sc->mii_dev); 152 return(0); 153 } 154 155 static int 156 ciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 157 { 158 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 159 int reg, speed, gig; 160 161 switch (cmd) { 162 case MII_POLLSTAT: 163 /* 164 * If we're not polling our PHY instance, just return. 165 */ 166 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 167 return (0); 168 break; 169 170 case MII_MEDIACHG: 171 /* 172 * If the media indicates a different PHY instance, 173 * isolate ourselves. 174 */ 175 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 176 reg = PHY_READ(sc, MII_BMCR); 177 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 178 return (0); 179 } 180 181 /* 182 * If the interface is not up, don't do anything. 183 */ 184 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 185 break; 186 187 ciphy_fixup(sc); /* XXX hardware bug work-around */ 188 189 switch (IFM_SUBTYPE(ife->ifm_media)) { 190 case IFM_AUTO: 191 #ifdef foo 192 /* 193 * If we're already in auto mode, just return. 194 */ 195 if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN) 196 return (0); 197 #endif 198 if (mii_phy_auto(sc, 0) == EJUSTRETURN) 199 return (0); 200 break; 201 case IFM_1000_T: 202 speed = CIPHY_S1000; 203 goto setit; 204 case IFM_100_TX: 205 speed = CIPHY_S100; 206 goto setit; 207 case IFM_10_T: 208 speed = CIPHY_S10; 209 setit: 210 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) { 211 speed |= CIPHY_BMCR_FDX; 212 gig = CIPHY_1000CTL_AFD; 213 } else { 214 gig = CIPHY_1000CTL_AHD; 215 } 216 217 PHY_WRITE(sc, CIPHY_MII_1000CTL, 0); 218 PHY_WRITE(sc, CIPHY_MII_BMCR, speed); 219 PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE); 220 221 if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T) 222 break; 223 224 PHY_WRITE(sc, CIPHY_MII_1000CTL, gig); 225 PHY_WRITE(sc, CIPHY_MII_BMCR, 226 speed|CIPHY_BMCR_AUTOEN|CIPHY_BMCR_STARTNEG); 227 228 /* 229 * When setting the link manually, one side must 230 * be the master and the other the slave. However 231 * ifmedia doesn't give us a good way to specify 232 * this, so we fake it by using one of the LINK 233 * flags. If LINK0 is set, we program the PHY to 234 * be a master, otherwise it's a slave. 235 */ 236 if ((mii->mii_ifp->if_flags & IFF_LINK0)) { 237 PHY_WRITE(sc, CIPHY_MII_1000CTL, 238 gig|CIPHY_1000CTL_MSE|CIPHY_1000CTL_MSC); 239 } else { 240 PHY_WRITE(sc, CIPHY_MII_1000CTL, 241 gig|CIPHY_1000CTL_MSE); 242 } 243 break; 244 case IFM_NONE: 245 PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN); 246 break; 247 case IFM_100_T4: 248 default: 249 return (EINVAL); 250 } 251 break; 252 253 case MII_TICK: 254 /* 255 * If we're not currently selected, just return. 256 */ 257 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 258 return (0); 259 260 if (mii_phy_tick(sc) == EJUSTRETURN) 261 return (0); 262 break; 263 } 264 265 /* Update the media status. */ 266 ciphy_status(sc); 267 268 /* 269 * Callback if something changed. Note that we need to poke 270 * apply fixups for certain PHY revs. 271 */ 272 if (sc->mii_media_active != mii->mii_media_active || 273 sc->mii_media_status != mii->mii_media_status || 274 cmd == MII_MEDIACHG) 275 ciphy_fixup(sc); 276 mii_phy_update(sc, cmd); 277 return (0); 278 } 279 280 static void 281 ciphy_status(struct mii_softc *sc) 282 { 283 struct mii_data *mii = sc->mii_pdata; 284 int bmsr, bmcr; 285 286 mii->mii_media_status = IFM_AVALID; 287 mii->mii_media_active = IFM_ETHER; 288 289 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 290 291 if (bmsr & BMSR_LINK) 292 mii->mii_media_status |= IFM_ACTIVE; 293 294 bmcr = PHY_READ(sc, CIPHY_MII_BMCR); 295 296 if (bmcr & CIPHY_BMCR_LOOP) 297 mii->mii_media_active |= IFM_LOOP; 298 299 if (bmcr & CIPHY_BMCR_AUTOEN) { 300 if ((bmsr & CIPHY_BMSR_ACOMP) == 0) { 301 /* Erg, still trying, I guess... */ 302 mii->mii_media_active |= IFM_NONE; 303 return; 304 } 305 } 306 307 bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR); 308 switch (bmsr & CIPHY_AUXCSR_SPEED) { 309 case CIPHY_SPEED10: 310 mii->mii_media_active |= IFM_10_T; 311 break; 312 case CIPHY_SPEED100: 313 mii->mii_media_active |= IFM_100_TX; 314 break; 315 case CIPHY_SPEED1000: 316 mii->mii_media_active |= IFM_1000_T; 317 break; 318 default: 319 device_printf(sc->mii_dev, "unknown PHY speed %x\n", 320 bmsr & CIPHY_AUXCSR_SPEED); 321 break; 322 } 323 324 if (bmsr & CIPHY_AUXCSR_FDX) 325 mii->mii_media_active |= IFM_FDX; 326 } 327 328 static void 329 ciphy_reset(struct mii_softc *sc) 330 { 331 mii_phy_reset(sc); 332 DELAY(1000); 333 } 334 335 #define PHY_SETBIT(x, y, z) \ 336 PHY_WRITE(x, y, (PHY_READ(x, y) | (z))) 337 #define PHY_CLRBIT(x, y, z) \ 338 PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z))) 339 340 static void 341 ciphy_fixup(struct mii_softc *sc) 342 { 343 uint16_t model, status, speed; 344 device_t parent; 345 346 model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2)); 347 status = PHY_READ(sc, CIPHY_MII_AUXCSR); 348 speed = status & CIPHY_AUXCSR_SPEED; 349 350 parent = device_get_parent(sc->mii_dev); 351 if (strncmp(device_get_name(parent), "nfe", 3) == 0) { 352 /* Need to set for 2.5V RGMII for NVIDIA adapters */ 353 PHY_SETBIT(sc, CIPHY_MII_ECTL1, CIPHY_INTSEL_RGMII); 354 PHY_SETBIT(sc, CIPHY_MII_ECTL1, CIPHY_IOVOL_2500MV); 355 } 356 357 switch (model) { 358 case MII_MODEL_CICADA_CS8201: /* MII_MODEL_xxCICADA_CS8201 */ 359 /* Turn off "aux mode" (whatever that means) */ 360 PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS); 361 362 /* 363 * Work around speed polling bug in VT3119/VT3216 364 * when using MII in full duplex mode. 365 */ 366 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) && 367 (status & CIPHY_AUXCSR_FDX)) { 368 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 369 } else { 370 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 371 } 372 373 /* Enable link/activity LED blink. */ 374 PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK); 375 break; 376 377 case MII_MODEL_CICADA_CS8201A: /* MII_MODEL_xxCICADA_CS8201A */ 378 case MII_MODEL_CICADA_CS8201B: /* MII_MODEL_xxCICADA_CS8201B */ 379 /* 380 * Work around speed polling bug in VT3119/VT3216 381 * when using MII in full duplex mode. 382 */ 383 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) && 384 (status & CIPHY_AUXCSR_FDX)) { 385 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 386 } else { 387 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 388 } 389 break; 390 391 default: 392 device_printf(sc->mii_dev, 393 "unknown CICADA PHY model %x\n", model); 394 break; 395 } 396 } 397