1 /* 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * $FreeBSD: src/sys/dev/mii/dcphy.c,v 1.2.2.2 2000/10/14 00:44:40 wpaul Exp $ 33 * $DragonFly: src/sys/dev/netif/mii_layer/dcphy.c,v 1.9 2006/08/06 10:32:23 sephe Exp $ 34 */ 35 36 /* 37 * Pseudo-driver for internal NWAY support on DEC 21143 and workalike 38 * controllers. Technically we're abusing the miibus code to handle 39 * media selection and NWAY support here since there is no MII 40 * interface. However the logical operations are roughly the same, 41 * and the alternative is to create a fake MII interface in the driver, 42 * which is harder to do. 43 */ 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/kernel.h> 48 #include <sys/socket.h> 49 #include <sys/errno.h> 50 #include <sys/module.h> 51 #include <sys/bus.h> 52 53 #include <net/if.h> 54 #include <net/if_arp.h> 55 #include <net/if_media.h> 56 57 #include "mii.h" 58 #include "miivar.h" 59 #include "miidevs.h" 60 61 #include <machine/bus_pio.h> 62 #include <machine/bus_memio.h> 63 #include <machine/bus.h> 64 #include <machine/resource.h> 65 #include <sys/bus.h> 66 67 #include <bus/pci/pcivar.h> 68 #include "../dc/if_dcreg.h" 69 70 #include "miibus_if.h" 71 72 #define DC_SETBIT(sc, reg, x) \ 73 CSR_WRITE_4(sc, reg, \ 74 CSR_READ_4(sc, reg) | x) 75 76 #define DC_CLRBIT(sc, reg, x) \ 77 CSR_WRITE_4(sc, reg, \ 78 CSR_READ_4(sc, reg) & ~x) 79 80 #define MIIF_AUTOTIMEOUT 0x0004 81 82 /* 83 * This is the subsystem ID for the built-in 21143 ethernet 84 * in several Compaq Presario systems. Apparently these are 85 * 10Mbps only, so we need to treat them specially. 86 */ 87 #define COMPAQ_PRESARIO_ID 0xb0bb0e11 88 89 static int dcphy_probe (device_t); 90 static int dcphy_attach (device_t); 91 92 static device_method_t dcphy_methods[] = { 93 /* device interface */ 94 DEVMETHOD(device_probe, dcphy_probe), 95 DEVMETHOD(device_attach, dcphy_attach), 96 DEVMETHOD(device_detach, ukphy_detach), 97 DEVMETHOD(device_shutdown, bus_generic_shutdown), 98 { 0, 0 } 99 }; 100 101 static devclass_t dcphy_devclass; 102 103 static driver_t dcphy_driver = { 104 "dcphy", 105 dcphy_methods, 106 sizeof(struct mii_softc) 107 }; 108 109 DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0); 110 111 static int dcphy_service(struct mii_softc *, struct mii_data *, int); 112 static void dcphy_status(struct mii_softc *); 113 static void dcphy_auto(struct mii_softc *); 114 static void dcphy_reset(struct mii_softc *); 115 116 static int 117 dcphy_probe(device_t dev) 118 { 119 struct mii_attach_args *ma; 120 121 ma = device_get_ivars(dev); 122 123 /* 124 * The dc driver will report the 21143 vendor and device 125 * ID to let us know that it wants us to attach. 126 */ 127 if (ma->mii_id1 != DC_VENDORID_DEC || 128 ma->mii_id2 != DC_DEVICEID_21143) 129 return(ENXIO); 130 131 device_set_desc(dev, "Intel 21143 NWAY media interface"); 132 133 return (0); 134 } 135 136 static int 137 dcphy_attach(device_t dev) 138 { 139 struct mii_softc *sc; 140 struct mii_attach_args *ma; 141 struct mii_data *mii; 142 struct dc_softc *dc_sc; 143 144 sc = device_get_softc(dev); 145 ma = device_get_ivars(dev); 146 mii_softc_init(sc, ma); 147 sc->mii_dev = device_get_parent(dev); 148 mii = device_get_softc(sc->mii_dev); 149 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 150 151 sc->mii_inst = mii->mii_instance; 152 sc->mii_service = dcphy_service; 153 sc->mii_reset = dcphy_reset; 154 sc->mii_anegticks = 50; 155 sc->mii_pdata = mii; 156 157 sc->mii_flags |= MIIF_NOISOLATE; 158 mii->mii_instance++; 159 160 /*dcphy_reset(sc);*/ 161 dc_sc = mii->mii_ifp->if_softc; 162 CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0); 163 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0); 164 165 switch(pci_read_config(device_get_parent(sc->mii_dev), 166 DC_PCI_CSID, 4)) { 167 case COMPAQ_PRESARIO_ID: 168 /* Example of how to only allow 10Mbps modes. */ 169 sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX; 170 break; 171 default: 172 if (dc_sc->dc_pmode == DC_PMODE_SIA) { 173 sc->mii_capabilities = 174 BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX; 175 } else { 176 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 177 178 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, 179 sc->mii_inst), MII_MEDIA_100_TX); 180 181 #undef ADD 182 183 sc->mii_capabilities = 184 BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX| 185 BMSR_10TFDX|BMSR_10THDX; 186 } 187 break; 188 } 189 190 #ifdef notyet 191 if (dc_sc->dc_type == DC_TYPE_21145) 192 sc->mii_capabilities = BMSR_10THDX; 193 #endif 194 195 sc->mii_capabilities &= ma->mii_capmask; 196 device_printf(dev, " "); 197 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0) 198 printf("no media present"); 199 else 200 mii_phy_add_media(sc); 201 printf("\n"); 202 203 MIIBUS_MEDIAINIT(sc->mii_dev); 204 return(0); 205 } 206 207 static int 208 dcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 209 { 210 struct dc_softc *dc_sc; 211 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 212 int reg; 213 u_int32_t mode; 214 215 dc_sc = mii->mii_ifp->if_softc; 216 217 switch (cmd) { 218 case MII_POLLSTAT: 219 /* 220 * If we're not polling our PHY instance, just return. 221 */ 222 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 223 return (0); 224 } 225 break; 226 227 case MII_MEDIACHG: 228 /* 229 * If the media indicates a different PHY instance, 230 * isolate ourselves. XXX how? 231 */ 232 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 233 return (0); 234 } 235 236 /* 237 * If the interface is not up, don't do anything. 238 */ 239 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 240 break; 241 242 sc->mii_flags = 0; 243 mii->mii_media_active = IFM_NONE; 244 mode = CSR_READ_4(dc_sc, DC_NETCFG); 245 mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL| 246 DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL); 247 248 switch (IFM_SUBTYPE(ife->ifm_media)) { 249 case IFM_AUTO: 250 /*dcphy_reset(sc);*/ 251 dcphy_auto(sc); 252 break; 253 case IFM_100_T4: 254 /* 255 * XXX Not supported as a manual setting right now. 256 */ 257 return (EINVAL); 258 case IFM_100_TX: 259 dcphy_reset(sc); 260 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 261 mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS| 262 DC_NETCFG_SCRAMBLER; 263 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 264 mode |= DC_NETCFG_FULLDUPLEX; 265 else 266 mode &= ~DC_NETCFG_FULLDUPLEX; 267 CSR_WRITE_4(dc_sc, DC_NETCFG, mode); 268 break; 269 case IFM_10_T: 270 DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 271 DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF); 272 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 273 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D); 274 else 275 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F); 276 DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 277 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 278 mode &= ~DC_NETCFG_PORTSEL; 279 mode |= DC_NETCFG_SPEEDSEL; 280 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 281 mode |= DC_NETCFG_FULLDUPLEX; 282 else 283 mode &= ~DC_NETCFG_FULLDUPLEX; 284 CSR_WRITE_4(dc_sc, DC_NETCFG, mode); 285 break; 286 default: 287 return(EINVAL); 288 } 289 break; 290 291 case MII_TICK: 292 /* 293 * If we're not currently selected, just return. 294 */ 295 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 296 return (0); 297 298 /* 299 * Is the interface even up? 300 */ 301 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 302 return (0); 303 304 /* 305 * Only used for autonegotiation. 306 */ 307 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 308 break; 309 310 reg = CSR_READ_4(dc_sc, DC_10BTSTAT); 311 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100)) 312 return(0); 313 314 /* 315 * Only retry autonegotiation every mii_anegticks seconds. 316 * 317 * Otherwise, fall through to calling dcphy_status() 318 * since real Intel 21143 chips don't show valid link 319 * status until autonegotiation is switched off, and 320 * that only happens in dcphy_status(). Without this, 321 * successful autonegotation is never recognised on 322 * these chips. 323 */ 324 if (++sc->mii_ticks <= sc->mii_anegticks) 325 break; 326 327 sc->mii_ticks = 0; 328 dcphy_auto(sc); 329 330 break; 331 } 332 333 /* Update the media status. */ 334 dcphy_status(sc); 335 336 /* Callback if something changed. */ 337 mii_phy_update(sc, cmd); 338 return (0); 339 } 340 341 static void 342 dcphy_status(struct mii_softc *sc) 343 { 344 struct mii_data *mii = sc->mii_pdata; 345 int reg, anlpar, tstat = 0; 346 struct dc_softc *dc_sc; 347 348 dc_sc = mii->mii_ifp->if_softc; 349 350 mii->mii_media_status = IFM_AVALID; 351 mii->mii_media_active = IFM_ETHER; 352 353 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 354 return; 355 356 reg = CSR_READ_4(dc_sc, DC_10BTSTAT); 357 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100)) 358 mii->mii_media_status |= IFM_ACTIVE; 359 360 if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) { 361 /* Erg, still trying, I guess... */ 362 tstat = CSR_READ_4(dc_sc, DC_10BTSTAT); 363 if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) { 364 if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) && 365 (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE) 366 goto skip; 367 mii->mii_media_active |= IFM_NONE; 368 return; 369 } 370 371 if (tstat & DC_TSTAT_LP_CAN_NWAY) { 372 anlpar = tstat >> 16; 373 if (anlpar & ANLPAR_T4 && 374 sc->mii_capabilities & BMSR_100TXHDX) 375 mii->mii_media_active |= IFM_100_T4; 376 else if (anlpar & ANLPAR_TX_FD && 377 sc->mii_capabilities & BMSR_100TXFDX) 378 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 379 else if (anlpar & ANLPAR_TX && 380 sc->mii_capabilities & BMSR_100TXHDX) 381 mii->mii_media_active |= IFM_100_TX; 382 else if (anlpar & ANLPAR_10_FD) 383 mii->mii_media_active |= IFM_10_T|IFM_FDX; 384 else if (anlpar & ANLPAR_10) 385 mii->mii_media_active |= IFM_10_T; 386 else 387 mii->mii_media_active |= IFM_NONE; 388 if (DC_IS_INTEL(dc_sc)) 389 DC_CLRBIT(dc_sc, DC_10BTCTRL, 390 DC_TCTL_AUTONEGENBL); 391 return; 392 } 393 /* 394 * If the other side doesn't support NWAY, then the 395 * best we can do is determine if we have a 10Mbps or 396 * 100Mbps link. There's no way to know if the link 397 * is full or half duplex, so we default to half duplex 398 * and hope that the user is clever enough to manually 399 * change the media settings if we're wrong. 400 */ 401 if (!(reg & DC_TSTAT_LS100)) 402 mii->mii_media_active |= IFM_100_TX; 403 else if (!(reg & DC_TSTAT_LS10)) 404 mii->mii_media_active |= IFM_10_T; 405 else 406 mii->mii_media_active |= IFM_NONE; 407 if (DC_IS_INTEL(dc_sc)) 408 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 409 return; 410 } 411 412 skip: 413 414 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL) 415 mii->mii_media_active |= IFM_10_T; 416 else 417 mii->mii_media_active |= IFM_100_TX; 418 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX) 419 mii->mii_media_active |= IFM_FDX; 420 421 return; 422 } 423 424 static void 425 dcphy_auto(struct mii_softc *sc) 426 { 427 struct dc_softc *dc_sc = sc->mii_pdata->mii_ifp->if_softc; 428 429 DC_CLRBIT(dc_sc, DC_NETCFG, DC_NETCFG_PORTSEL); 430 DC_SETBIT(dc_sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX); 431 DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 432 if (sc->mii_capabilities & BMSR_100TXHDX) 433 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0x3FFFF); 434 else 435 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0xFFFF); 436 DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 437 DC_SETBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 438 DC_SETBIT(dc_sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE); 439 440 sc->mii_flags |= MIIF_DOINGAUTO; 441 } 442 443 static void 444 dcphy_reset(struct mii_softc *sc) 445 { 446 struct dc_softc *dc_sc = sc->mii_pdata->mii_ifp->if_softc; 447 448 DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 449 DELAY(1000); 450 DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 451 } 452