1 /* 2 * Copyright (c) 2001 Wind River Systems 3 * Copyright (c) 2001 4 * Bill Paul <wpaul@bsdi.com>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Bill Paul. 17 * 4. Neither the name of the author nor the names of any co-contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 * $FreeBSD: src/sys/dev/mii/nsgphy.c,v 1.1.2.3 2002/11/08 21:53:49 semenu Exp $ 34 */ 35 36 /* 37 * Driver for the National Semiconductor DP83891 and DP83861 38 * 10/100/1000 PHYs. 39 * Datasheet available at: http://www.national.com/ds/DP/DP83861.pdf 40 * 41 * The DP83891 is the older NatSemi gigE PHY which isn't being sold 42 * anymore. The DP83861 is its replacement, which is an 'enhanced' 43 * firmware driven component. The major difference between the 44 * two is that the 83891 can't generate interrupts, while the 45 * 83861 can. (I think it wasn't originally designed to do this, but 46 * it can now thanks to firmware updates.) The 83861 also allows 47 * access to its internal RAM via indirect register access. 48 */ 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/bus.h> 55 56 #include <machine/clock.h> 57 58 #include <net/if.h> 59 #include <net/if_var.h> 60 #include <net/if_media.h> 61 62 #include "mii.h" 63 #include "miivar.h" 64 #include "miidevs.h" 65 66 #include "nsgphyreg.h" 67 68 #include "miibus_if.h" 69 70 static int nsgphy_probe (device_t); 71 static int nsgphy_attach (device_t); 72 73 static device_method_t nsgphy_methods[] = { 74 /* device interface */ 75 DEVMETHOD(device_probe, nsgphy_probe), 76 DEVMETHOD(device_attach, nsgphy_attach), 77 DEVMETHOD(device_shutdown, bus_generic_shutdown), 78 DEVMETHOD_END 79 }; 80 81 static const struct mii_phydesc nsgphys[] = { 82 MII_PHYDESC(NATSEMI, DP83891), 83 MII_PHYDESC(NATSEMI, DP83861), 84 MII_PHYDESC_NULL 85 }; 86 87 static devclass_t nsgphy_devclass; 88 89 static driver_t nsgphy_driver = { 90 "nsgphy", 91 nsgphy_methods, 92 sizeof(struct mii_softc) 93 }; 94 95 DRIVER_MODULE(nsgphy, miibus, nsgphy_driver, nsgphy_devclass, NULL, NULL); 96 97 static int nsgphy_service(struct mii_softc *, struct mii_data *, int); 98 static void nsgphy_status(struct mii_softc *); 99 100 static int 101 nsgphy_probe(device_t dev) 102 { 103 struct mii_attach_args *ma = device_get_ivars(dev); 104 const struct mii_phydesc *mpd; 105 106 mpd = mii_phy_match(ma, nsgphys); 107 if (mpd != NULL) { 108 device_set_desc(dev, mpd->mpd_name); 109 return (0); 110 } 111 return(ENXIO); 112 } 113 114 static int 115 nsgphy_attach(device_t dev) 116 { 117 struct mii_softc *sc; 118 struct mii_attach_args *ma; 119 struct mii_data *mii; 120 121 sc = device_get_softc(dev); 122 ma = device_get_ivars(dev); 123 mii_softc_init(sc, ma); 124 sc->mii_dev = device_get_parent(dev); 125 mii = device_get_softc(sc->mii_dev); 126 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 127 128 sc->mii_inst = mii->mii_instance; 129 sc->mii_service = nsgphy_service; 130 /* 131 * Only retry autonegotiation every 17 seconds. 132 * Actually, for gigE PHYs, we should wait longer, since 133 * 5 seconds is the mimimum time the documentation 134 * says to wait for a 1000mbps link to be established. 135 */ 136 sc->mii_anegticks = 17; 137 sc->mii_pdata = mii; 138 139 sc->mii_flags |= MIIF_NOISOLATE; 140 mii->mii_instance++; 141 142 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 143 144 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 145 MII_MEDIA_NONE); 146 #if 0 147 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst), 148 MII_MEDIA_100_TX); 149 #endif 150 151 mii_phy_reset(sc); 152 153 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 154 if (sc->mii_capabilities & BMSR_EXTSTAT) 155 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 156 157 device_printf(dev, " "); 158 if ((sc->mii_capabilities & BMSR_MEDIAMASK) || 159 (sc->mii_extcapabilities & EXTSR_MEDIAMASK)) 160 mii_phy_add_media(sc); 161 else 162 kprintf("no media present"); 163 164 kprintf("\n"); 165 #undef ADD 166 167 MIIBUS_MEDIAINIT(sc->mii_dev); 168 return(0); 169 } 170 171 static int 172 nsgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 173 { 174 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 175 int reg; 176 177 switch (cmd) { 178 case MII_POLLSTAT: 179 /* 180 * If we're not polling our PHY instance, just return. 181 */ 182 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 183 return (0); 184 break; 185 186 case MII_MEDIACHG: 187 /* 188 * If the media indicates a different PHY instance, 189 * isolate ourselves. 190 */ 191 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 192 reg = PHY_READ(sc, MII_BMCR); 193 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 194 return (0); 195 } 196 197 /* 198 * If the interface is not up, don't do anything. 199 */ 200 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 201 break; 202 203 mii_phy_set_media(sc); 204 break; 205 206 case MII_TICK: 207 /* 208 * If we're not currently selected, just return. 209 */ 210 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 211 return (0); 212 213 if (mii_phy_tick(sc) == EJUSTRETURN) 214 return (0); 215 break; 216 } 217 218 /* Update the media status. */ 219 nsgphy_status(sc); 220 221 /* Callback if something changed. */ 222 mii_phy_update(sc, cmd); 223 return (0); 224 } 225 226 static void 227 nsgphy_status(struct mii_softc *sc) 228 { 229 struct mii_data *mii = sc->mii_pdata; 230 int bmsr, bmcr, physup, anlpar, gstat; 231 232 mii->mii_media_status = IFM_AVALID; 233 mii->mii_media_active = IFM_ETHER; 234 235 bmsr = PHY_READ(sc, NSGPHY_MII_BMSR); 236 physup = PHY_READ(sc, NSGPHY_MII_PHYSUP); 237 if (physup & NSGPHY_PHYSUP_LNKSTS) 238 mii->mii_media_status |= IFM_ACTIVE; 239 240 bmcr = PHY_READ(sc, NSGPHY_MII_BMCR); 241 242 if (bmcr & NSGPHY_BMCR_LOOP) 243 mii->mii_media_active |= IFM_LOOP; 244 245 if (bmcr & NSGPHY_BMCR_AUTOEN) { 246 if ((bmsr & NSGPHY_BMSR_ACOMP) == 0) { 247 /* Erg, still trying, I guess... */ 248 mii->mii_media_active |= IFM_NONE; 249 return; 250 } 251 anlpar = PHY_READ(sc, NSGPHY_MII_ANLPAR); 252 gstat = PHY_READ(sc, NSGPHY_MII_1000STS); 253 if (gstat & NSGPHY_1000STS_LPFD) 254 mii->mii_media_active |= IFM_1000_T | IFM_FDX; 255 else if (gstat & NSGPHY_1000STS_LPHD) 256 mii->mii_media_active |= IFM_1000_T | IFM_HDX; 257 else if (anlpar & NSGPHY_ANLPAR_100T4) 258 mii->mii_media_active |= IFM_100_T4; 259 else if (anlpar & NSGPHY_ANLPAR_100FDX) 260 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 261 else if (anlpar & NSGPHY_ANLPAR_100HDX) 262 mii->mii_media_active |= IFM_100_TX; 263 else if (anlpar & NSGPHY_ANLPAR_10FDX) 264 mii->mii_media_active |= IFM_10_T|IFM_FDX; 265 else if (anlpar & NSGPHY_ANLPAR_10HDX) 266 mii->mii_media_active |= IFM_10_T|IFM_HDX; 267 else 268 mii->mii_media_active |= IFM_NONE; 269 return; 270 } 271 272 switch(bmcr & (NSGPHY_BMCR_SPD1|NSGPHY_BMCR_SPD0)) { 273 case NSGPHY_S1000: 274 mii->mii_media_active |= IFM_1000_T; 275 break; 276 case NSGPHY_S100: 277 mii->mii_media_active |= IFM_100_TX; 278 break; 279 case NSGPHY_S10: 280 mii->mii_media_active |= IFM_10_T; 281 break; 282 default: 283 break; 284 } 285 286 if (bmcr & NSGPHY_BMCR_FDX) 287 mii->mii_media_active |= IFM_FDX; 288 else 289 mii->mii_media_active |= IFM_HDX; 290 } 291