1 /* 2 * Copyright (c) 2007 The DragonFly Project. All rights reserved. 3 * 4 * This code is derived from software contributed to The DragonFly Project 5 * by Sepherosa Ziehau <sepherosa@gmail.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 3. Neither the name of The DragonFly Project nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific, prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 #include <sys/kernel.h> 38 39 #include <net/if.h> 40 #include <net/if_media.h> 41 #include <net/if_arp.h> 42 #include <net/ethernet.h> 43 #include <net/vlan/if_vlan_var.h> 44 45 #include <dev/netif/mii_layer/mii.h> 46 #include <dev/netif/mii_layer/miivar.h> 47 #include <dev/netif/mii_layer/truephyreg.h> 48 49 #include "miibus_if.h" 50 #include "miidevs.h" 51 52 #define FRAMELEN(mtu) (ETHER_HDR_LEN + EVL_ENCAPLEN + (mtu) + ETHER_CRC_LEN) 53 54 static int truephy_service(struct mii_softc *, struct mii_data *, int); 55 static int truephy_attach(device_t); 56 static int truephy_probe(device_t); 57 static void truephy_reset(struct mii_softc *); 58 static void truephy_status(struct mii_softc *); 59 60 static device_method_t truephy_methods[] = { 61 /* device interface */ 62 DEVMETHOD(device_probe, truephy_probe), 63 DEVMETHOD(device_attach, truephy_attach), 64 DEVMETHOD(device_detach, ukphy_detach), 65 DEVMETHOD(device_shutdown, bus_generic_shutdown), 66 DEVMETHOD_END 67 }; 68 69 static const struct mii_phydesc truephys[] = { 70 MII_PHYDESC(AGERE, ET1011), 71 MII_PHYDESC(AGERE, ET1011C), 72 MII_PHYDESC_NULL 73 }; 74 75 static devclass_t truephy_devclass; 76 77 static driver_t truephy_driver = { 78 "truephy", 79 truephy_methods, 80 sizeof(struct mii_softc) 81 }; 82 83 DRIVER_MODULE(truephy, miibus, truephy_driver, truephy_devclass, NULL, NULL); 84 85 static const struct truephy_dsp { 86 uint16_t index; 87 uint16_t data; 88 } truephy_dspcode[] = { 89 { 0x880b, 0x0926 }, /* AfeIfCreg4B1000Msbs */ 90 { 0x880c, 0x0926 }, /* AfeIfCreg4B100Msbs */ 91 { 0x880d, 0x0926 }, /* AfeIfCreg4B10Msbs */ 92 93 { 0x880e, 0xb4d3 }, /* AfeIfCreg4B1000Lsbs */ 94 { 0x880f, 0xb4d3 }, /* AfeIfCreg4B100Lsbs */ 95 { 0x8810, 0xb4d3 }, /* AfeIfCreg4B10Lsbs */ 96 97 { 0x8805, 0xb03e }, /* AfeIfCreg3B1000Msbs */ 98 { 0x8806, 0xb03e }, /* AfeIfCreg3B100Msbs */ 99 { 0x8807, 0xff00 }, /* AfeIfCreg3B10Msbs */ 100 101 { 0x8808, 0xe090 }, /* AfeIfCreg3B1000Lsbs */ 102 { 0x8809, 0xe110 }, /* AfeIfCreg3B100Lsbs */ 103 { 0x880a, 0x0000 }, /* AfeIfCreg3B10Lsbs */ 104 105 { 0x300d, 1 }, /* DisableNorm */ 106 107 { 0x280c, 0x0180 }, /* LinkHoldEnd */ 108 109 { 0x1c21, 0x0002 }, /* AlphaM */ 110 111 { 0x3821, 6 }, /* FfeLkgTx0 */ 112 { 0x381d, 1 }, /* FfeLkg1g4 */ 113 { 0x381e, 1 }, /* FfeLkg1g5 */ 114 { 0x381f, 1 }, /* FfeLkg1g6 */ 115 { 0x3820, 1 }, /* FfeLkg1g7 */ 116 117 { 0x8402, 0x01f0 }, /* Btinact */ 118 { 0x800e, 20 }, /* LftrainTime */ 119 { 0x800f, 24 }, /* DvguardTime */ 120 { 0x8010, 46 } /* IdlguardTime */ 121 }; 122 123 static int 124 truephy_probe(device_t dev) 125 { 126 struct mii_attach_args *ma = device_get_ivars(dev); 127 const struct mii_phydesc *mpd; 128 129 mpd = mii_phy_match(ma, truephys); 130 if (mpd != NULL) { 131 device_set_desc(dev, mpd->mpd_name); 132 return 0; 133 } 134 return ENXIO; 135 } 136 137 static int 138 truephy_attach(device_t dev) 139 { 140 struct mii_softc *sc; 141 struct mii_attach_args *ma; 142 struct mii_data *mii; 143 144 sc = device_get_softc(dev); 145 ma = device_get_ivars(dev); 146 147 mii_softc_init(sc, ma); 148 sc->mii_dev = device_get_parent(dev); 149 mii = device_get_softc(sc->mii_dev); 150 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 151 152 sc->mii_inst = mii->mii_instance; 153 sc->mii_service = truephy_service; 154 sc->mii_reset = truephy_reset; 155 sc->mii_pdata = mii; 156 157 sc->mii_flags |= MIIF_NOISOLATE | MIIF_NOLOOP; 158 159 mii->mii_instance++; 160 161 truephy_reset(sc); 162 163 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 164 if (sc->mii_capabilities & BMSR_EXTSTAT) { 165 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 166 /* No 1000baseT half-duplex support */ 167 sc->mii_extcapabilities &= ~EXTSR_1000THDX; 168 } 169 170 device_printf(dev, " "); 171 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 && 172 (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0) 173 kprintf("no media present"); 174 else 175 mii_phy_add_media(sc); 176 kprintf("\n"); 177 178 MIIBUS_MEDIAINIT(sc->mii_dev); 179 return 0; 180 } 181 182 static int 183 truephy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 184 { 185 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 186 int bmcr; 187 188 switch (cmd) { 189 case MII_POLLSTAT: 190 /* 191 * If we're not polling our PHY instance, just return. 192 */ 193 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 194 return 0; 195 break; 196 197 case MII_MEDIACHG: 198 /* 199 * If the media indicates a different PHY instance, 200 * isolate ourselves. 201 */ 202 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 203 bmcr = PHY_READ(sc, MII_BMCR); 204 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO); 205 return 0; 206 } 207 208 /* 209 * If the interface is not up, don't do anything. 210 */ 211 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 212 break; 213 214 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 215 bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_AUTOEN; 216 PHY_WRITE(sc, MII_BMCR, bmcr); 217 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_PDOWN); 218 } 219 220 mii_phy_set_media(sc); 221 222 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 223 bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_PDOWN; 224 PHY_WRITE(sc, MII_BMCR, bmcr); 225 226 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { 227 PHY_WRITE(sc, MII_BMCR, 228 bmcr | BMCR_AUTOEN | BMCR_STARTNEG); 229 } 230 } 231 break; 232 233 case MII_TICK: 234 /* 235 * If we're not currently selected, just return. 236 */ 237 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 238 return 0; 239 240 if (mii_phy_tick(sc) == EJUSTRETURN) 241 return 0; 242 break; 243 } 244 245 /* Update the media status. */ 246 truephy_status(sc); 247 248 /* Callback if something changed. */ 249 mii_phy_update(sc, cmd); 250 return 0; 251 } 252 253 static void 254 truephy_reset(struct mii_softc *sc) 255 { 256 int i; 257 258 if (sc->mii_model == MII_MODEL_AGERE_ET1011) { 259 kprintf("phy phy phy model\n"); 260 mii_phy_reset(sc); 261 return; 262 } 263 264 for (i = 0; i < 2; ++i) { 265 PHY_READ(sc, MII_PHYIDR1); 266 PHY_READ(sc, MII_PHYIDR2); 267 268 PHY_READ(sc, TRUEPHY_CTRL); 269 PHY_WRITE(sc, TRUEPHY_CTRL, 270 TRUEPHY_CTRL_DIAG | TRUEPHY_CTRL_RSV1); 271 272 PHY_WRITE(sc, TRUEPHY_INDEX, TRUEPHY_INDEX_MAGIC); 273 PHY_READ(sc, TRUEPHY_DATA); 274 275 PHY_WRITE(sc, TRUEPHY_CTRL, TRUEPHY_CTRL_RSV1); 276 } 277 278 PHY_READ(sc, MII_BMCR); 279 PHY_READ(sc, TRUEPHY_CTRL); 280 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN | BMCR_S1000); 281 PHY_WRITE(sc, TRUEPHY_CTRL, 282 TRUEPHY_CTRL_DIAG | TRUEPHY_CTRL_RSV1 | TRUEPHY_CTRL_RSV0); 283 284 for (i = 0; i < NELEM(truephy_dspcode); ++i) { 285 const struct truephy_dsp *dsp = &truephy_dspcode[i]; 286 287 PHY_WRITE(sc, TRUEPHY_INDEX, dsp->index); 288 PHY_WRITE(sc, TRUEPHY_DATA, dsp->data); 289 290 PHY_WRITE(sc, TRUEPHY_INDEX, dsp->index); 291 PHY_READ(sc, TRUEPHY_DATA); 292 } 293 294 PHY_READ(sc, MII_BMCR); 295 PHY_READ(sc, TRUEPHY_CTRL); 296 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_S1000); 297 PHY_WRITE(sc, TRUEPHY_CTRL, TRUEPHY_CTRL_RSV1); 298 299 mii_phy_reset(sc); 300 301 if (FRAMELEN(sc->mii_pdata->mii_ifp->if_mtu) > 2048) { 302 int conf; 303 304 conf = PHY_READ(sc, TRUEPHY_CONF); 305 conf &= ~TRUEPHY_CONF_TXFIFO_MASK; 306 conf |= TRUEPHY_CONF_TXFIFO_24; 307 PHY_WRITE(sc, TRUEPHY_CONF, conf); 308 } 309 } 310 311 static void 312 truephy_status(struct mii_softc *sc) 313 { 314 struct mii_data *mii = sc->mii_pdata; 315 int bmsr, bmcr, sr; 316 317 mii->mii_media_status = IFM_AVALID; 318 mii->mii_media_active = IFM_ETHER; 319 320 sr = PHY_READ(sc, TRUEPHY_SR); 321 bmcr = PHY_READ(sc, MII_BMCR); 322 323 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 324 if (bmsr & BMSR_LINK) 325 mii->mii_media_status |= IFM_ACTIVE; 326 327 if (bmcr & BMCR_AUTOEN) { 328 if ((bmsr & BMSR_ACOMP) == 0) { 329 mii->mii_media_active |= IFM_NONE; 330 return; 331 } 332 } 333 334 switch (sr & TRUEPHY_SR_SPD_MASK) { 335 case TRUEPHY_SR_SPD_1000T: 336 mii->mii_media_active |= IFM_1000_T; 337 break; 338 case TRUEPHY_SR_SPD_100TX: 339 mii->mii_media_active |= IFM_100_TX; 340 break; 341 case TRUEPHY_SR_SPD_10T: 342 mii->mii_media_active |= IFM_10_T; 343 break; 344 default: 345 /* XXX will this ever happen? */ 346 kprintf("invalid media SR %#x\n", sr); 347 mii->mii_media_active |= IFM_NONE; 348 return; 349 } 350 351 if (sr & TRUEPHY_SR_FDX) 352 mii->mii_media_active |= IFM_FDX; 353 else 354 mii->mii_media_active |= IFM_HDX; 355 } 356