1 /* 2 * Copyright (c) 2007 The DragonFly Project. All rights reserved. 3 * 4 * This code is derived from software contributed to The DragonFly Project 5 * by Sepherosa Ziehau <sepherosa@gmail.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 3. Neither the name of The DragonFly Project nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific, prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 #include <sys/kernel.h> 38 39 #include <net/if.h> 40 #include <net/if_media.h> 41 #include <net/if_arp.h> 42 #include <net/ethernet.h> 43 #include <net/vlan/if_vlan_var.h> 44 45 #include <dev/netif/mii_layer/mii.h> 46 #include <dev/netif/mii_layer/miivar.h> 47 #include <dev/netif/mii_layer/miidevs.h> 48 #include <dev/netif/mii_layer/truephyreg.h> 49 50 #include "miibus_if.h" 51 52 #define FRAMELEN(mtu) (ETHER_HDR_LEN + EVL_ENCAPLEN + (mtu) + ETHER_CRC_LEN) 53 54 static int truephy_service(struct mii_softc *, struct mii_data *, int); 55 static int truephy_attach(device_t); 56 static int truephy_probe(device_t); 57 static void truephy_reset(struct mii_softc *); 58 static void truephy_status(struct mii_softc *); 59 60 static device_method_t truephy_methods[] = { 61 /* device interface */ 62 DEVMETHOD(device_probe, truephy_probe), 63 DEVMETHOD(device_attach, truephy_attach), 64 DEVMETHOD(device_detach, ukphy_detach), 65 DEVMETHOD(device_shutdown, bus_generic_shutdown), 66 { 0, 0 } 67 }; 68 69 static const struct mii_phydesc truephys[] = { 70 MII_PHYDESC(AGERE, ET1011C), 71 MII_PHYDESC_NULL 72 }; 73 74 static devclass_t truephy_devclass; 75 76 static driver_t truephy_driver = { 77 "truephy", 78 truephy_methods, 79 sizeof(struct mii_softc) 80 }; 81 82 DRIVER_MODULE(truephy, miibus, truephy_driver, truephy_devclass, NULL, NULL); 83 84 static const struct truephy_dsp { 85 uint16_t index; 86 uint16_t data; 87 } truephy_dspcode[] = { 88 { 0x880b, 0x0926 }, /* AfeIfCreg4B1000Msbs */ 89 { 0x880c, 0x0926 }, /* AfeIfCreg4B100Msbs */ 90 { 0x880d, 0x0926 }, /* AfeIfCreg4B10Msbs */ 91 92 { 0x880e, 0xb4d3 }, /* AfeIfCreg4B1000Lsbs */ 93 { 0x880f, 0xb4d3 }, /* AfeIfCreg4B100Lsbs */ 94 { 0x8810, 0xb4d3 }, /* AfeIfCreg4B10Lsbs */ 95 96 { 0x8805, 0xb03e }, /* AfeIfCreg3B1000Msbs */ 97 { 0x8806, 0xb03e }, /* AfeIfCreg3B100Msbs */ 98 { 0x8807, 0xff00 }, /* AfeIfCreg3B10Msbs */ 99 100 { 0x8808, 0xe090 }, /* AfeIfCreg3B1000Lsbs */ 101 { 0x8809, 0xe110 }, /* AfeIfCreg3B100Lsbs */ 102 { 0x880a, 0x0000 }, /* AfeIfCreg3B10Lsbs */ 103 104 { 0x300d, 1 }, /* DisableNorm */ 105 106 { 0x280c, 0x0180 }, /* LinkHoldEnd */ 107 108 { 0x1c21, 0x0002 }, /* AlphaM */ 109 110 { 0x3821, 6 }, /* FfeLkgTx0 */ 111 { 0x381d, 1 }, /* FfeLkg1g4 */ 112 { 0x381e, 1 }, /* FfeLkg1g5 */ 113 { 0x381f, 1 }, /* FfeLkg1g6 */ 114 { 0x3820, 1 }, /* FfeLkg1g7 */ 115 116 { 0x8402, 0x01f0 }, /* Btinact */ 117 { 0x800e, 20 }, /* LftrainTime */ 118 { 0x800f, 24 }, /* DvguardTime */ 119 { 0x8010, 46 } /* IdlguardTime */ 120 }; 121 122 static int 123 truephy_probe(device_t dev) 124 { 125 struct mii_attach_args *ma = device_get_ivars(dev); 126 const struct mii_phydesc *mpd; 127 128 mpd = mii_phy_match(ma, truephys); 129 if (mpd != NULL) { 130 device_set_desc(dev, mpd->mpd_name); 131 return 0; 132 } 133 return ENXIO; 134 } 135 136 static int 137 truephy_attach(device_t dev) 138 { 139 struct mii_softc *sc; 140 struct mii_attach_args *ma; 141 struct mii_data *mii; 142 143 sc = device_get_softc(dev); 144 ma = device_get_ivars(dev); 145 146 mii_softc_init(sc, ma); 147 sc->mii_dev = device_get_parent(dev); 148 mii = device_get_softc(sc->mii_dev); 149 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 150 151 sc->mii_inst = mii->mii_instance; 152 sc->mii_service = truephy_service; 153 sc->mii_reset = truephy_reset; 154 sc->mii_pdata = mii; 155 156 sc->mii_flags |= MIIF_NOISOLATE | MIIF_NOLOOP; 157 158 mii->mii_instance++; 159 160 truephy_reset(sc); 161 162 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 163 if (sc->mii_capabilities & BMSR_EXTSTAT) { 164 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 165 /* No 1000baseT half-duplex support */ 166 sc->mii_extcapabilities &= ~EXTSR_1000THDX; 167 } 168 169 device_printf(dev, " "); 170 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 && 171 (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0) 172 kprintf("no media present"); 173 else 174 mii_phy_add_media(sc); 175 kprintf("\n"); 176 177 MIIBUS_MEDIAINIT(sc->mii_dev); 178 return 0; 179 } 180 181 static int 182 truephy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 183 { 184 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 185 int bmcr; 186 187 switch (cmd) { 188 case MII_POLLSTAT: 189 /* 190 * If we're not polling our PHY instance, just return. 191 */ 192 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 193 return 0; 194 break; 195 196 case MII_MEDIACHG: 197 /* 198 * If the media indicates a different PHY instance, 199 * isolate ourselves. 200 */ 201 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 202 bmcr = PHY_READ(sc, MII_BMCR); 203 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO); 204 return 0; 205 } 206 207 /* 208 * If the interface is not up, don't do anything. 209 */ 210 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 211 break; 212 213 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 214 bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_AUTOEN; 215 PHY_WRITE(sc, MII_BMCR, bmcr); 216 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_PDOWN); 217 } 218 219 mii_phy_set_media(sc); 220 221 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 222 bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_PDOWN; 223 PHY_WRITE(sc, MII_BMCR, bmcr); 224 225 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { 226 PHY_WRITE(sc, MII_BMCR, 227 bmcr | BMCR_AUTOEN | BMCR_STARTNEG); 228 } 229 } 230 break; 231 232 case MII_TICK: 233 /* 234 * If we're not currently selected, just return. 235 */ 236 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 237 return 0; 238 239 if (mii_phy_tick(sc) == EJUSTRETURN) 240 return 0; 241 break; 242 } 243 244 /* Update the media status. */ 245 truephy_status(sc); 246 247 /* Callback if something changed. */ 248 mii_phy_update(sc, cmd); 249 return 0; 250 } 251 252 static void 253 truephy_reset(struct mii_softc *sc) 254 { 255 int i; 256 257 for (i = 0; i < 2; ++i) { 258 PHY_READ(sc, MII_PHYIDR1); 259 PHY_READ(sc, MII_PHYIDR2); 260 261 PHY_READ(sc, TRUEPHY_CTRL); 262 PHY_WRITE(sc, TRUEPHY_CTRL, 263 TRUEPHY_CTRL_DIAG | TRUEPHY_CTRL_RSV1); 264 265 PHY_WRITE(sc, TRUEPHY_INDEX, TRUEPHY_INDEX_MAGIC); 266 PHY_READ(sc, TRUEPHY_DATA); 267 268 PHY_WRITE(sc, TRUEPHY_CTRL, TRUEPHY_CTRL_RSV1); 269 } 270 271 PHY_READ(sc, MII_BMCR); 272 PHY_READ(sc, TRUEPHY_CTRL); 273 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN | BMCR_S1000); 274 PHY_WRITE(sc, TRUEPHY_CTRL, 275 TRUEPHY_CTRL_DIAG | TRUEPHY_CTRL_RSV1 | TRUEPHY_CTRL_RSV0); 276 277 for (i = 0; i < NELEM(truephy_dspcode); ++i) { 278 const struct truephy_dsp *dsp = &truephy_dspcode[i]; 279 280 PHY_WRITE(sc, TRUEPHY_INDEX, dsp->index); 281 PHY_WRITE(sc, TRUEPHY_DATA, dsp->data); 282 283 PHY_WRITE(sc, TRUEPHY_INDEX, dsp->index); 284 PHY_READ(sc, TRUEPHY_DATA); 285 } 286 287 PHY_READ(sc, MII_BMCR); 288 PHY_READ(sc, TRUEPHY_CTRL); 289 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_S1000); 290 PHY_WRITE(sc, TRUEPHY_CTRL, TRUEPHY_CTRL_RSV1); 291 292 mii_phy_reset(sc); 293 294 if (FRAMELEN(sc->mii_pdata->mii_ifp->if_mtu) > 2048) { 295 int conf; 296 297 conf = PHY_READ(sc, TRUEPHY_CONF); 298 conf &= ~TRUEPHY_CONF_TXFIFO_MASK; 299 conf |= TRUEPHY_CONF_TXFIFO_24; 300 PHY_WRITE(sc, TRUEPHY_CONF, conf); 301 } 302 } 303 304 static void 305 truephy_status(struct mii_softc *sc) 306 { 307 struct mii_data *mii = sc->mii_pdata; 308 int bmsr, bmcr, sr; 309 310 mii->mii_media_status = IFM_AVALID; 311 mii->mii_media_active = IFM_ETHER; 312 313 sr = PHY_READ(sc, TRUEPHY_SR); 314 bmcr = PHY_READ(sc, MII_BMCR); 315 316 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 317 if (bmsr & BMSR_LINK) 318 mii->mii_media_status |= IFM_ACTIVE; 319 320 if (bmcr & BMCR_AUTOEN) { 321 if ((bmsr & BMSR_ACOMP) == 0) { 322 mii->mii_media_active |= IFM_NONE; 323 return; 324 } 325 } 326 327 switch (sr & TRUEPHY_SR_SPD_MASK) { 328 case TRUEPHY_SR_SPD_1000T: 329 mii->mii_media_active |= IFM_1000_T; 330 break; 331 case TRUEPHY_SR_SPD_100TX: 332 mii->mii_media_active |= IFM_100_TX; 333 break; 334 case TRUEPHY_SR_SPD_10T: 335 mii->mii_media_active |= IFM_10_T; 336 break; 337 default: 338 /* XXX will this ever happen? */ 339 kprintf("invalid media SR %#x\n", sr); 340 mii->mii_media_active |= IFM_NONE; 341 return; 342 } 343 344 if (sr & TRUEPHY_SR_FDX) 345 mii->mii_media_active |= IFM_FDX; 346 else 347 mii->mii_media_active |= IFM_HDX; 348 } 349