xref: /dragonfly/sys/dev/netif/nfe/if_nfevar.h (revision 36a3d1d6)
1 /*	$OpenBSD: if_nfevar.h,v 1.11 2006/02/19 13:57:02 damien Exp $	*/
2 /*	$DragonFly: src/sys/dev/netif/nfe/if_nfevar.h,v 1.13 2008/07/12 11:44:17 sephe Exp $	*/
3 
4 /*
5  * Copyright (c) 2005 Jonathan Gray <jsg@openbsd.org>
6  *
7  * Permission to use, copy, modify, and distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 struct nfe_tx_data {
21 	bus_dmamap_t	map;
22 	struct mbuf	*m;
23 };
24 
25 struct nfe_tx_ring {
26 	bus_dma_tag_t		tag;
27 	bus_dmamap_t		map;
28 	bus_addr_t		physaddr;
29 	struct nfe_desc32	*desc32;
30 	struct nfe_desc64	*desc64;
31 
32 	bus_dma_tag_t		data_tag;
33 	struct nfe_tx_data	*data;
34 	int			queued;
35 	int			cur;
36 	int			next;
37 };
38 
39 struct nfe_softc;
40 
41 struct nfe_jbuf {
42 	struct nfe_softc	*sc;
43 	struct nfe_rx_ring	*ring;
44 	int			inuse;
45 	int			slot;
46 	caddr_t			buf;
47 	bus_addr_t		physaddr;
48 	SLIST_ENTRY(nfe_jbuf)	jnext;
49 };
50 
51 struct nfe_rx_data {
52 	bus_dmamap_t	map;
53 	struct mbuf	*m;
54 };
55 
56 struct nfe_rx_ring {
57 	bus_dma_tag_t		tag;
58 	bus_dmamap_t		map;
59 	bus_addr_t		physaddr;
60 	struct nfe_desc32	*desc32;
61 	struct nfe_desc64	*desc64;
62 
63 	bus_dma_tag_t		jtag;
64 	bus_dmamap_t		jmap;
65 	caddr_t			jpool;
66 	struct nfe_jbuf		*jbuf;
67 	SLIST_HEAD(, nfe_jbuf)	jfreelist;
68 
69 	bus_dma_tag_t		data_tag;
70 	bus_dmamap_t		data_tmpmap;
71 	struct nfe_rx_data	*data;
72 	int			bufsz;
73 	int			cur;
74 	int			next;
75 };
76 
77 struct nfe_softc {
78 	struct arpcom		arpcom;
79 
80 	int			sc_mem_rid;
81 	time_t			sc_rate_second;
82 	int			sc_rate_acc;
83 	int			sc_rate_avg;
84 	struct resource		*sc_mem_res;
85 	bus_space_handle_t	sc_memh;
86 	bus_space_tag_t		sc_memt;
87 
88 	int			sc_irq_rid;
89 	struct resource		*sc_irq_res;
90 	void			*sc_ih;
91 
92 	device_t		sc_miibus;
93 	struct callout		sc_tick_ch;
94 
95 	int			sc_if_flags;
96 	uint32_t		sc_caps;	/* hardware capabilities */
97 #define NFE_JUMBO_SUP	0x01
98 #define NFE_40BIT_ADDR	0x02
99 #define NFE_HW_CSUM	0x04
100 #define NFE_HW_VLAN	0x08
101 #define NFE_FIX_EADDR	0x10
102 #define NFE_NO_PWRCTL	0x20
103 #define NFE_WORDALIGN	0x40	/* word alignment DMA */
104 
105 	uint32_t		sc_flags;
106 #define NFE_F_USE_JUMBO	0x01	/* use jumbo frame */
107 #define NFE_F_DYN_IM	0x02	/* enable dynamic interrupt moderation */
108 #define NFE_F_IRQ_TIMER	0x04	/* hardware timer irq is used */
109 
110 	uint32_t		rxtxctl_desc;
111 	uint32_t		rxtxctl;
112 	uint8_t			mii_phyaddr;
113 
114 	bus_dma_tag_t		sc_dtag;
115 	struct nfe_tx_ring	txq;
116 	struct nfe_rx_ring	rxq;
117 
118 	uint32_t		sc_irq_enable;
119 	int			sc_tx_spare;
120 	int			sc_imtime;
121 	int			sc_rx_ring_count;
122 	int			sc_tx_ring_count;
123 	int			sc_debug;
124 	struct sysctl_ctx_list	sc_sysctl_ctx;
125 	struct sysctl_oid	*sc_sysctl_tree;
126 
127 	struct lwkt_serialize	sc_jbuf_serializer;
128 };
129 
130 #define NFE_IRQ_ENABLE(sc)	\
131 	((sc)->sc_imtime == 0 ? NFE_IRQ_NOIMTIMER : \
132 	 (((sc)->sc_flags & NFE_F_DYN_IM) ? NFE_IRQ_NOIMTIMER: NFE_IRQ_IMTIMER))
133 
134 #define NFE_ADDR_HI(addr)	((uint64_t) (addr) >> 32)
135 #define NFE_ADDR_LO(addr)	((uint64_t) (addr) & 0xffffffff)
136